Changeset 72634 in vbox for trunk/src/VBox/VMM/include

Timestamp:

Jun 20, 2018 4:08:42 PM (7 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

123137

Message:

EM[R3]: Use pVCpu->cpum.GstCtx and stop keeping and passing pCtx around.

Location:

trunk/src/VBox/VMM/include

Files:

• EMHandleRCTmpl.h (modified) (9 diffs)
• EMInternal.h (modified) (2 diffs)
• NEMInternal.h (modified) (1 diff)

trunk/src/VBox/VMM/include/EMHandleRCTmpl.h

@@ -25 +25 @@
 
 /**
- * Process a subset of the raw-mode and hm return codes.
+ * Process a subset of the raw-mode, HM and NEM return codes.
  *
  * Since we have to share this with raw-mode single stepping, this inline
@@ -35 +35 @@
  * @param   pVM     The cross context VM structure.
  * @param   pVCpu   The cross context virtual CPU structure.
- * @param   pCtx    Pointer to the guest CPU context.
  * @param   rc      The return code.
  */
 #ifdef EMHANDLERC_WITH_PATM
-int emR3RawHandleRC(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx, int rc)
+int emR3RawHandleRC(PVM pVM, PVMCPU pVCpu, int rc)
 #elif defined(EMHANDLERC_WITH_HM) || defined(DOXYGEN_RUNNING)
-int emR3HmHandleRC(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx, int rc)
+int emR3HmHandleRC(PVM pVM, PVMCPU pVCpu, int rc)
 #elif defined(EMHANDLERC_WITH_NEM)
-int emR3NemHandleRC(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx, int rc)
+int emR3NemHandleRC(PVM pVM, PVMCPU pVCpu, int rc)
 #endif
 {
-    NOREF(pCtx);
-
     switch (rc)
     {
@@ -77 +74 @@
              * Got a trap which needs dispatching.
              */
-            if (PATMR3IsInsidePatchJump(pVM, pCtx->eip, NULL))
+            if (PATMR3IsInsidePatchJump(pVM, pVCpu->cpum.GstCtx.eip, NULL))
             {
                 AssertReleaseMsgFailed(("FATAL ERROR: executing random instruction inside generated patch jump %08X\n", CPUMGetGuestEIP(pVCpu)));
@@ -91 +88 @@
         case VINF_PATM_PATCH_TRAP_PF:
         case VINF_PATM_PATCH_INT3:
-            rc = emR3RawPatchTrap(pVM, pVCpu, pCtx, rc);
+            rc = emR3RawPatchTrap(pVM, pVCpu, rc);
             break;
 
         case VINF_PATM_DUPLICATE_FUNCTION:
-            Assert(PATMIsPatchGCAddr(pVM, pCtx->eip));
-            rc = PATMR3DuplicateFunctionRequest(pVM, pCtx);
+            Assert(PATMIsPatchGCAddr(pVM, pVCpu->cpum.GstCtx.eip));
+            rc = PATMR3DuplicateFunctionRequest(pVM, &pVCpu->cpum.GstCtx);
             AssertRC(rc);
             rc = VINF_SUCCESS;
@@ -118 +115 @@
          */
         case VINF_PATM_HC_MMIO_PATCH_READ:
-            rc = PATMR3InstallPatch(pVM, SELMToFlat(pVM, DISSELREG_CS, CPUMCTX2CORE(pCtx), pCtx->eip),
+            rc = PATMR3InstallPatch(pVM, SELMToFlat(pVM, DISSELREG_CS, CPUMCTX2CORE(&pVCpu->cpum.GstCtx), pVCpu->cpum.GstCtx.eip),
                                       PATMFL_MMIO_ACCESS
                                     | (CPUMGetGuestCodeBits(pVCpu) == 32 ? PATMFL_CODE32 : 0));
@@ -167 +164 @@
         case VINF_PGM_CHANGE_MODE:
             CPUM_ASSERT_NOT_EXTRN(pVCpu, CPUMCTX_EXTRN_CR0 | CPUMCTX_EXTRN_CR3 | CPUMCTX_EXTRN_CR4 | CPUMCTX_EXTRN_EFER);
-            rc = PGMChangeMode(pVCpu, pCtx->cr0, pCtx->cr4, pCtx->msrEFER);
+            rc = PGMChangeMode(pVCpu, pVCpu->cpum.GstCtx.cr0, pVCpu->cpum.GstCtx.cr4, pVCpu->cpum.GstCtx.msrEFER);
             if (rc == VINF_SUCCESS)
                 rc = VINF_EM_RESCHEDULE;
@@ -188 +185 @@
         case VINF_EM_RAW_RING_SWITCH_INT:
             Assert(TRPMHasTrap(pVCpu));
-            Assert(!PATMIsPatchGCAddr(pVM, pCtx->eip));
+            Assert(!PATMIsPatchGCAddr(pVM, pVCpu->cpum.GstCtx.eip));
 
             if (TRPMHasTrap(pVCpu))
@@ -260 +257 @@
          */
         case VINF_EM_RAW_EMULATE_IO_BLOCK:
-            rc = HMR3EmulateIoBlock(pVM, pCtx);
+            rc = HMR3EmulateIoBlock(pVM, &pVCpu->cpum.GstCtx);
             break;
 
         case VINF_EM_HM_PATCH_TPR_INSTR:
-            rc = HMR3PatchTprInstr(pVM, pVCpu, pCtx);
+            rc = HMR3PatchTprInstr(pVM, pVCpu, &pVCpu->cpum.GstCtx);
             break;
 #endif
@@ -313 +310 @@
         case VINF_EM_RAW_IRET_TRAP:
             /* We will not go to the recompiler if EIP points to patch code. */
-            if (PATMIsPatchGCAddr(pVM, pCtx->eip))
+            if (PATMIsPatchGCAddr(pVM, pVCpu->cpum.GstCtx.eip))
             {
-                pCtx->eip = PATMR3PatchToGCPtr(pVM, (RTGCPTR)pCtx->eip, 0);
+                pVCpu->cpum.GstCtx.eip = PATMR3PatchToGCPtr(pVM, (RTGCPTR)pVCpu->cpum.GstCtx.eip, 0);
             }
             LogFlow(("emR3RawHandleRC: %Rrc -> %Rrc\n", rc, VINF_EM_RESCHEDULE_REM));

trunk/src/VBox/VMM/include/EMInternal.h

@@ -399 +399 @@
     RTR3PTR                 R3PtrPaddingNoRaw;
 #endif
-
-    /** Pointer to the guest CPUM state. (R3 Ptr)
-     * @deprecated Use pVCpu->cpum.GstCtx!  */
-    R3PTRTYPE(PCPUMCTX)     pCtx;
-
+    RTR3PTR                 R3PtrNullPadding; /**< Used to be pCtx. */
 #if GC_ARCH_BITS == 64
     RTGCPTR                 aPadding1;
@@ -550 +546 @@
 /** @} */
 
-int     emR3InitDbg(PVM pVM);
-
-int          emR3HmExecute(PVM pVM, PVMCPU pVCpu, bool *pfFFDone);
-VBOXSTRICTRC emR3NemExecute(PVM pVM, PVMCPU pVCpu, bool *pfFFDone);
-int          emR3RawExecute(PVM pVM, PVMCPU pVCpu, bool *pfFFDone);
-
-int     emR3RawHandleRC(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx, int rc);
-int     emR3HmHandleRC(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx, int rc);
-int     emR3NemHandleRC(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx, int rc);
-
-EMSTATE emR3Reschedule(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx);
-int     emR3ForcedActions(PVM pVM, PVMCPU pVCpu, int rc);
-VBOXSTRICTRC emR3HighPriorityPostForcedActions(PVM pVM, PVMCPU pVCpu, VBOXSTRICTRC rc);
-
-int     emR3RawUpdateForceFlag(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx, int rc);
-int     emR3RawResumeHyper(PVM pVM, PVMCPU pVCpu);
-int     emR3RawStep(PVM pVM, PVMCPU pVCpu);
-
-VBOXSTRICTRC emR3NemSingleInstruction(PVM pVM, PVMCPU pVCpu, uint32_t fFlags);
-
-int     emR3SingleStepExecRem(PVM pVM, PVMCPU pVCpu, uint32_t cIterations);
-
-bool    emR3IsExecutionAllowed(PVM pVM, PVMCPU pVCpu);
-
-VBOXSTRICTRC emR3ExecutePendingIoPortWrite(PVM pVM, PVMCPU pVCpu);
-VBOXSTRICTRC emR3ExecutePendingIoPortRead(PVM pVM, PVMCPU pVCpu);
+int             emR3InitDbg(PVM pVM);
+
+int             emR3HmExecute(PVM pVM, PVMCPU pVCpu, bool *pfFFDone);
+VBOXSTRICTRC    emR3NemExecute(PVM pVM, PVMCPU pVCpu, bool *pfFFDone);
+int             emR3RawExecute(PVM pVM, PVMCPU pVCpu, bool *pfFFDone);
+
+EMSTATE         emR3Reschedule(PVM pVM, PVMCPU pVCpu);
+int             emR3ForcedActions(PVM pVM, PVMCPU pVCpu, int rc);
+VBOXSTRICTRC    emR3HighPriorityPostForcedActions(PVM pVM, PVMCPU pVCpu, VBOXSTRICTRC rc);
+
+int             emR3RawResumeHyper(PVM pVM, PVMCPU pVCpu);
+int             emR3RawStep(PVM pVM, PVMCPU pVCpu);
+
+VBOXSTRICTRC    emR3NemSingleInstruction(PVM pVM, PVMCPU pVCpu, uint32_t fFlags);
+
+int             emR3SingleStepExecRem(PVM pVM, PVMCPU pVCpu, uint32_t cIterations);
+
+bool            emR3IsExecutionAllowed(PVM pVM, PVMCPU pVCpu);
+
+VBOXSTRICTRC    emR3ExecutePendingIoPortWrite(PVM pVM, PVMCPU pVCpu);
+VBOXSTRICTRC    emR3ExecutePendingIoPortRead(PVM pVM, PVMCPU pVCpu);
 
 RT_C_DECLS_END

trunk/src/VBox/VMM/include/NEMInternal.h

@@ -398 +398 @@
 void    nemR3NativeResetCpu(PVMCPU pVCpu, bool fInitIpi);
 VBOXSTRICTRC    nemR3NativeRunGC(PVM pVM, PVMCPU pVCpu);
-bool            nemR3NativeCanExecuteGuest(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx);
+bool            nemR3NativeCanExecuteGuest(PVM pVM, PVMCPU pVCpu);
 bool            nemR3NativeSetSingleInstruction(PVM pVM, PVMCPU pVCpu, bool fEnable);
 void            nemR3NativeNotifyFF(PVM pVM, PVMCPU pVCpu, uint32_t fFlags);