VirtualBox

Changeset 72636 in vbox


Ignore:
Timestamp:
Jun 21, 2018 10:47:43 AM (7 years ago)
Author:
vboxsync
svn:sync-xref-src-repo-rev:
123139
Message:

EM,HM: Removed EMInterpretRdtsc and EMInterpretRdtscp (reapplying r123092 backed out in r123118). Use VINF_IEM_RAISED_XCPT rather than VINF_EM_RESCHEDULE for clarity. bugref:6973

Location:
trunk
Files:
4 edited

Legend:

Unmodified
Added
Removed

  • trunk/include/VBox/vmm/em.h

    r72619 r72636  
    314314#endif
    315315VMM_INT_DECL(int)               EMInterpretCpuId(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame);
    316 #if 1 /** @todo Remove after testing and enabling @bugref{6973}. */
    317 VMM_INT_DECL(int)               EMInterpretRdtsc(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame);
    318 VMM_INT_DECL(int)               EMInterpretRdtscp(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx);
    319 #endif
    320316VMM_INT_DECL(int)               EMInterpretRdpmc(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame);
    321317VMM_INT_DECL(VBOXSTRICTRC)      EMInterpretInvlpg(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, RTGCPTR pAddrGC);

  • trunk/src/VBox/VMM/VMMAll/EMAll.cpp

    r72619 r72636  
    18651865}
    18661866
    1867 
    1868 #if 1 /** @todo Remove after testing and enabling @bugref{6973}. */
    1869 
    1870 /**
    1871  * Interpret RDTSC.
    1872  *
    1873  * @returns VBox status code.
    1874  * @param   pVM         The cross context VM structure.
    1875  * @param   pVCpu       The cross context virtual CPU structure.
    1876  * @param   pRegFrame   The register frame.
    1877  *
    1878  */
    1879 VMM_INT_DECL(int) EMInterpretRdtsc(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame)
    1880 {
    1881     Assert(pRegFrame == CPUMGetGuestCtxCore(pVCpu));
    1882     unsigned uCR4 = CPUMGetGuestCR4(pVCpu);
    1883 
    1884     if (uCR4 & X86_CR4_TSD)
    1885         return VERR_EM_INTERPRETER; /* genuine #GP */
    1886 
    1887     uint64_t uTicks = TMCpuTickGet(pVCpu);
    1888 #ifdef VBOX_WITH_NESTED_HWVIRT_SVM
    1889     uTicks = CPUMApplyNestedGuestTscOffset(pVCpu, uTicks);
    1890 #endif
    1891 
    1892     /* Same behaviour in 32 & 64 bits mode */
    1893     pRegFrame->rax = RT_LO_U32(uTicks);
    1894     pRegFrame->rdx = RT_HI_U32(uTicks);
    1895 #ifdef VBOX_COMPARE_IEM_AND_EM
    1896     g_fIgnoreRaxRdx = true;
    1897 #endif
    1898 
    1899     NOREF(pVM);
    1900     return VINF_SUCCESS;
    1901 }
    1902 
    1903 /**
    1904  * Interpret RDTSCP.
    1905  *
    1906  * @returns VBox status code.
    1907  * @param   pVM         The cross context VM structure.
    1908  * @param   pVCpu       The cross context virtual CPU structure.
    1909  * @param   pCtx        The CPU context.
    1910  *
    1911  */
    1912 VMM_INT_DECL(int) EMInterpretRdtscp(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx)
    1913 {
    1914     Assert(pCtx == CPUMQueryGuestCtxPtr(pVCpu));
    1915     uint32_t uCR4 = CPUMGetGuestCR4(pVCpu);
    1916 
    1917     if (!pVM->cpum.ro.GuestFeatures.fRdTscP)
    1918     {
    1919         AssertFailed();
    1920         return VERR_EM_INTERPRETER; /* genuine #UD */
    1921     }
    1922 
    1923     if (uCR4 & X86_CR4_TSD)
    1924         return VERR_EM_INTERPRETER; /* genuine #GP */
    1925 
    1926     uint64_t uTicks = TMCpuTickGet(pVCpu);
    1927 #ifdef VBOX_WITH_NESTED_HWVIRT_SVM
    1928     uTicks = CPUMApplyNestedGuestTscOffset(pVCpu, uTicks);
    1929 #endif
    1930 
    1931     /* Same behaviour in 32 & 64 bits mode */
    1932     pCtx->rax = RT_LO_U32(uTicks);
    1933     pCtx->rdx = RT_HI_U32(uTicks);
    1934 #ifdef VBOX_COMPARE_IEM_AND_EM
    1935     g_fIgnoreRaxRdx = true;
    1936 #endif
    1937     /* Low dword of the TSC_AUX msr only. */
    1938     VBOXSTRICTRC rc2 = CPUMQueryGuestMsr(pVCpu, MSR_K8_TSC_AUX, &pCtx->rcx); Assert(rc2 == VINF_SUCCESS); NOREF(rc2);
    1939     pCtx->rcx &= UINT32_C(0xffffffff);
    1940 
    1941     return VINF_SUCCESS;
    1942 }
    1943 
    1944 #endif /* Trying to use IEM APIs instead. */
    19451867
    19461868/**

  • trunk/src/VBox/VMM/VMMR0/HMSVMR0.cpp

    r72623 r72636  
    62556255{
    62566256    HMSVM_VALIDATE_EXIT_HANDLER_PARAMS();
    6257 #if 1 /** @todo Needs testing. @bugref{6973} */
    62586257    VBOXSTRICTRC rcStrict = IEMExecDecodedRdtsc(pVCpu, hmR0SvmGetInstrLengthHwAssist(pVCpu, pCtx, 2));
    62596258    if (rcStrict == VINF_SUCCESS)
    62606259        pSvmTransient->fUpdateTscOffsetting = true;
    6261     else if (rcStrict == VINF_EM_RESCHEDULE)
     6260    else if (rcStrict == VINF_IEM_RAISED_XCPT)
    62626261        rcStrict = VINF_SUCCESS;
    62636262    HMSVM_CHECK_SINGLE_STEP(pVCpu, rcStrict);
    62646263    STAM_COUNTER_INC(&pVCpu->hm.s.StatExitRdtsc);
    62656264    return VBOXSTRICTRC_TODO(rcStrict);
    6266 #else
    6267     int rc = EMInterpretRdtsc(pVCpu->CTX_SUFF(pVM), pVCpu, CPUMCTX2CORE(pCtx));
    6268     if (RT_LIKELY(rc == VINF_SUCCESS))
    6269     {
    6270         pSvmTransient->fUpdateTscOffsetting = true;
    6271         hmR0SvmAdvanceRipHwAssist(pVCpu, pCtx, 2);
    6272         HMSVM_CHECK_SINGLE_STEP(pVCpu, rc);
    6273     }
    6274     else
    6275     {
    6276         AssertMsgFailed(("hmR0SvmExitRdtsc: EMInterpretRdtsc failed with %Rrc\n", rc));
    6277         rc = VERR_EM_INTERPRETER;
    6278     }
    6279     STAM_COUNTER_INC(&pVCpu->hm.s.StatExitRdtsc);
    6280     return rc;
    6281 #endif
    62826265}
    62836266
    … …  
    62896272{
    62906273    HMSVM_VALIDATE_EXIT_HANDLER_PARAMS();
    6291 #if 1 /** @todo Needs testing. @bugref{6973} */
    62926274    VBOXSTRICTRC rcStrict = IEMExecDecodedRdtscp(pVCpu, hmR0SvmGetInstrLengthHwAssist(pVCpu, pCtx, 3));
    62936275    if (rcStrict == VINF_SUCCESS)
    62946276        pSvmTransient->fUpdateTscOffsetting = true;
    6295     else if (rcStrict == VINF_EM_RESCHEDULE)
     6277    else if (rcStrict == VINF_IEM_RAISED_XCPT)
    62966278        rcStrict = VINF_SUCCESS;
    62976279    HMSVM_CHECK_SINGLE_STEP(pVCpu, rcStrict);
    62986280    STAM_COUNTER_INC(&pVCpu->hm.s.StatExitRdtscp);
    62996281    return VBOXSTRICTRC_TODO(rcStrict);
    6300 #else
    6301     int rc = EMInterpretRdtscp(pVCpu->CTX_SUFF(pVM), pVCpu, pCtx);
    6302     if (RT_LIKELY(rc == VINF_SUCCESS))
    6303     {
    6304         pSvmTransient->fUpdateTscOffsetting = true;
    6305         hmR0SvmAdvanceRipHwAssist(pVCpu, pCtx, 3);
    6306         HMSVM_CHECK_SINGLE_STEP(pVCpu, rc);
    6307     }
    6308     else
    6309     {
    6310         AssertMsgFailed(("hmR0SvmExitRdtsc: EMInterpretRdtscp failed with %Rrc\n", rc));
    6311         rc = VERR_EM_INTERPRETER;
    6312     }
    6313     STAM_COUNTER_INC(&pVCpu->hm.s.StatExitRdtscp);
    6314     return rc;
    6315 #endif
    63166282}
    63176283

  • trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp

    r72620 r72636  
    1191711917{
    1191811918    HMVMX_VALIDATE_EXIT_HANDLER_PARAMS();
    11919 #if 1 /** @todo Needs testing. @bugref{6973} */
    1192011919    int rc = hmR0VmxSaveGuestCR4(pVCpu, pMixedCtx);      /* Needed for CPL < 0 only, really. */
    1192111920    rc    |= hmR0VmxSaveGuestRegsForIemExec(pVCpu, pMixedCtx, false /*fMemory*/, false /*fNeedRsp*/);
    … …  
    1193411933    STAM_COUNTER_INC(&pVCpu->hm.s.StatExitRdtsc);
    1193511934    return rcStrict;
    11936 #else
    11937     int rc = hmR0VmxSaveGuestCR4(pVCpu, pMixedCtx);
    11938     AssertRCReturn(rc, rc);
    11939 
    11940     PVM pVM = pVCpu->CTX_SUFF(pVM);
    11941     rc = EMInterpretRdtsc(pVM, pVCpu, CPUMCTX2CORE(pMixedCtx));
    11942     if (RT_LIKELY(rc == VINF_SUCCESS))
    11943     {
    11944         rc = hmR0VmxAdvanceGuestRip(pVCpu, pMixedCtx, pVmxTransient);
    11945         Assert(pVmxTransient->cbInstr == 2);
    11946         /* If we get a spurious VM-exit when offsetting is enabled, we must reset offsetting on VM-reentry. See @bugref{6634}. */
    11947         if (pVCpu->hm.s.vmx.u32ProcCtls & VMX_VMCS_CTRL_PROC_EXEC_USE_TSC_OFFSETTING)
    11948             pVmxTransient->fUpdateTscOffsettingAndPreemptTimer = true;
    11949     }
    11950     else
    11951         rc = VERR_EM_INTERPRETER;
    11952     STAM_COUNTER_INC(&pVCpu->hm.s.StatExitRdtsc);
    11953     return rc;
    11954 #endif
    1195511935}
    1195611936
    … …  
    1196211942{
    1196311943    HMVMX_VALIDATE_EXIT_HANDLER_PARAMS();
    11964 #if 1 /** @todo Needs testing. @bugref{6973} */
    1196511944    int rc = hmR0VmxSaveGuestCR4(pVCpu, pMixedCtx);      /* Needed for CPL < 0 only, really. */
    1196611945    rc    |= hmR0VmxSaveGuestRegsForIemExec(pVCpu, pMixedCtx, false /*fMemory*/, false /*fNeedRsp*/);
    … …  
    1198011959    STAM_COUNTER_INC(&pVCpu->hm.s.StatExitRdtscp);
    1198111960    return rcStrict;
    11982 #else
    11983     int rc = hmR0VmxSaveGuestCR4(pVCpu, pMixedCtx);
    11984     rc    |= hmR0VmxSaveGuestAutoLoadStoreMsrs(pVCpu, pMixedCtx);  /* For MSR_K8_TSC_AUX */
    11985     AssertRCReturn(rc, rc);
    11986 
    11987     PVM pVM = pVCpu->CTX_SUFF(pVM);
    11988     rc = EMInterpretRdtscp(pVM, pVCpu, pMixedCtx);
    11989     if (RT_SUCCESS(rc))
    11990     {
    11991         rc  = hmR0VmxAdvanceGuestRip(pVCpu, pMixedCtx, pVmxTransient);
    11992         Assert(pVmxTransient->cbInstr == 3);
    11993         /* If we get a spurious VM-exit when offsetting is enabled, we must reset offsetting on VM-reentry. See @bugref{6634}. */
    11994         if (pVCpu->hm.s.vmx.u32ProcCtls & VMX_VMCS_CTRL_PROC_EXEC_USE_TSC_OFFSETTING)
    11995             pVmxTransient->fUpdateTscOffsettingAndPreemptTimer = true;
    11996     }
    11997     else
    11998     {
    11999         AssertMsgFailed(("hmR0VmxExitRdtscp: EMInterpretRdtscp failed with %Rrc\n", rc));
    12000         rc = VERR_EM_INTERPRETER;
    12001     }
    12002     STAM_COUNTER_INC(&pVCpu->hm.s.StatExitRdtscp);
    12003     return rc;
    12004 #endif
    1200511961}
    1200611962
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