Changeset 72643 in vbox for trunk/src/VBox/VMM/VMMR3

Timestamp:

Jun 21, 2018 4:02:03 PM (7 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

123151

Message:

VMM: Make SVM R0 code use CPUMCTX_EXTRN_xxx flags and cleanups. bugref:9193

Location:

trunk/src/VBox/VMM/VMMR3

Files:

• CPUM.cpp (modified) (2 diffs)
• EM.cpp (modified) (3 diffs)
• HM.cpp (modified) (4 diffs)

trunk/src/VBox/VMM/VMMR3/CPUM.cpp

@@ -1433 +1433 @@
             SSMR3PutU16(pSSM,    pGstCtx->hwvirt.svm.cPauseFilterThreshold);
             SSMR3PutBool(pSSM,   pGstCtx->hwvirt.svm.fInterceptEvents);
-            SSMR3PutBool(pSSM,   pGstCtx->hwvirt.svm.fHMCachedVmcb);
             SSMR3PutStructEx(pSSM, &pGstCtx->hwvirt.svm.HostState, sizeof(pGstCtx->hwvirt.svm.HostState), 0 /* fFlags */,
                              g_aSvmHwvirtHostState, NULL /* pvUser */);
@@ -1674 +1673 @@
                         SSMR3GetU16(pSSM,      &pGstCtx->hwvirt.svm.cPauseFilterThreshold);
                         SSMR3GetBool(pSSM,     &pGstCtx->hwvirt.svm.fInterceptEvents);
-                        SSMR3GetBool(pSSM,     &pGstCtx->hwvirt.svm.fHMCachedVmcb);
                         SSMR3GetStructEx(pSSM, &pGstCtx->hwvirt.svm.HostState, sizeof(pGstCtx->hwvirt.svm.HostState),
                                          0 /* fFlags */, g_aSvmHwvirtHostState, NULL /* pvUser */);

trunk/src/VBox/VMM/VMMR3/EM.cpp

@@ -1886 +1886 @@
                     if (CPUMIsGuestSvmCtrlInterceptSet(pVCpu, &pVCpu->cpum.GstCtx, SVM_CTRL_INTERCEPT_INTR))
                     {
+                        CPUM_IMPORT_EXTRN_RET(pVCpu, IEM_CPUMCTX_EXTRN_SVM_VMEXIT_MASK);
                         VBOXSTRICTRC rcStrict = IEMExecSvmVmexit(pVCpu, SVM_EXIT_INTR, 0, 0);
                         if (RT_SUCCESS(rcStrict))
@@ -1904 +1905 @@
                     /* Note: it's important to make sure the return code from TRPMR3InjectEvent isn't ignored! */
                     /** @todo this really isn't nice, should properly handle this */
+                    CPUM_IMPORT_EXTRN_RET(pVCpu, IEM_CPUMCTX_EXTRN_XCPT_MASK);
                     int rc = TRPMR3InjectEvent(pVM, pVCpu, TRPM_HARDWARE_INT);
                     Assert(rc != VINF_PGM_CHANGE_MODE);
@@ -1926 +1928 @@
                 if (CPUMIsGuestSvmCtrlInterceptSet(pVCpu, &pVCpu->cpum.GstCtx, SVM_CTRL_INTERCEPT_VINTR))
                 {
+                    CPUM_IMPORT_EXTRN_RET(pVCpu, IEM_CPUMCTX_EXTRN_SVM_VMEXIT_MASK);
                     VBOXSTRICTRC rcStrict = IEMExecSvmVmexit(pVCpu, SVM_EXIT_VINTR, 0, 0);
                     if (RT_SUCCESS(rcStrict))

trunk/src/VBox/VMM/VMMR3/HM.cpp

@@ -3491 +3491 @@
         {
             PCSVMNESTEDVMCBCACHE pVmcbNstGstCache = &pVM->aCpus[i].hm.s.svm.NstGstVmcbCache;
-            rc  = SSMR3PutU16(pSSM,  pVmcbNstGstCache->u16InterceptRdCRx);
+            rc  = SSMR3PutBool(pSSM, pVmcbNstGstCache->fCacheValid);
+            rc |= SSMR3PutU16(pSSM,  pVmcbNstGstCache->u16InterceptRdCRx);
             rc |= SSMR3PutU16(pSSM,  pVmcbNstGstCache->u16InterceptWrCRx);
             rc |= SSMR3PutU16(pSSM,  pVmcbNstGstCache->u16InterceptRdDRx);
@@ -3576 +3577 @@
             {
                 PSVMNESTEDVMCBCACHE pVmcbNstGstCache = &pVM->aCpus[i].hm.s.svm.NstGstVmcbCache;
-                rc  = SSMR3GetU16(pSSM,  &pVmcbNstGstCache->u16InterceptRdCRx);
+                rc  = SSMR3GetBool(pSSM, &pVmcbNstGstCache->fCacheValid);
+                rc |= SSMR3GetU16(pSSM,  &pVmcbNstGstCache->u16InterceptRdCRx);
                 rc |= SSMR3GetU16(pSSM,  &pVmcbNstGstCache->u16InterceptWrCRx);
                 rc |= SSMR3GetU16(pSSM,  &pVmcbNstGstCache->u16InterceptRdDRx);
@@ -3687 +3689 @@
 
 /**
- * Displays the guest VM-exit history.
+ * Displays HM info.
  *
  * @param   pVM         The cross context VM structure.
@@ -3761 +3763 @@
         && pVM->cpum.ro.GuestFeatures.fSvm)
     {
-        PCCPUMCTX            pCtx = CPUMQueryGuestCtxPtr(pVCpu);
         PCSVMNESTEDVMCBCACHE pVmcbNstGstCache = &pVCpu->hm.s.svm.NstGstVmcbCache;
         pHlp->pfnPrintf(pHlp, "CPU[%u]: HM SVM nested-guest VMCB cache\n", pVCpu->idCpu);
-        pHlp->pfnPrintf(pHlp, "  fHMCachedVmcb           = %#RTbool\n", pCtx->hwvirt.svm.fHMCachedVmcb);
+        pHlp->pfnPrintf(pHlp, "  fCacheValid             = %#RTbool\n", pVmcbNstGstCache->fCacheValid);
         pHlp->pfnPrintf(pHlp, "  u16InterceptRdCRx       = %#RX16\n",   pVmcbNstGstCache->u16InterceptRdCRx);
         pHlp->pfnPrintf(pHlp, "  u16InterceptWrCRx       = %#RX16\n",   pVmcbNstGstCache->u16InterceptWrCRx);