VirtualBox

Changeset 72805 in vbox for trunk/src/VBox/VMM/VMMR3


Ignore:
Timestamp:
Jul 3, 2018 4:05:43 AM (7 years ago)
Author:
vboxsync
svn:sync-xref-src-repo-rev:
123348
Message:

VMM/HM: bugref:9193 Fixes honoring pending VMCPU_FF_HM_UPDATE_CR3 and VMCPU_FF_HM_UPDATE_PAE_PDPES
before re-entering guest execution with VT-x R0 code.
Avoid a couple of VMWRITES because we already have cache's of the values (CR4 Mask, CR0 mask).
Parameter cleanup.

File:
1 edited

Legend:

Unmodified
Added
Removed

  • trunk/src/VBox/VMM/VMMR3/HM.cpp

    r72785 r72805  
    140140    EXIT_REASON(VMX_EXIT_INVPCID                ,  58, "INVPCID instruction."),
    141141    EXIT_REASON(VMX_EXIT_VMFUNC                 ,  59, "VMFUNC instruction."),
    142     EXIT_REASON(VMX_EXIT_ENCLS                  ,  60, "ENCLS instrunction."),
     142    EXIT_REASON(VMX_EXIT_ENCLS                  ,  60, "ENCLS instruction."),
    143143    EXIT_REASON(VMX_EXIT_RDSEED                 ,  61, "RDSEED instruction."),
    144144    EXIT_REASON(VMX_EXIT_PML_FULL               ,  62, "Page-modification log full."),
    … …  
    258258    EXIT_REASON(SVM_EXIT_INIT         ,   99, "Physical INIT signal (host)."),
    259259    EXIT_REASON(SVM_EXIT_VINTR        ,  100, "Virtual interrupt-window exit."),
    260     EXIT_REASON(SVM_EXIT_CR0_SEL_WRITE,  101, "Write to CR0 that changed any bits other than CR0.TS or CR0.MP."),
    261     EXIT_REASON(SVM_EXIT_IDTR_READ    ,  102, "Read IDTR"),
    262     EXIT_REASON(SVM_EXIT_GDTR_READ    ,  103, "Read GDTR"),
     260    EXIT_REASON(SVM_EXIT_CR0_SEL_WRITE,  101, "Selective CR0 Write (to bits other than CR0.TS and CR0.MP)."),
     261    EXIT_REASON(SVM_EXIT_IDTR_READ    ,  102, "Read IDTR."),
     262    EXIT_REASON(SVM_EXIT_GDTR_READ    ,  103, "Read GDTR."),
    263263    EXIT_REASON(SVM_EXIT_LDTR_READ    ,  104, "Read LDTR."),
    264264    EXIT_REASON(SVM_EXIT_TR_READ      ,  105, "Read TR."),
    … …  
    280280    EXIT_REASON(SVM_EXIT_INVLPG       ,  121, "INVLPG instruction."),
    281281    EXIT_REASON(SVM_EXIT_INVLPGA      ,  122, "INVLPGA instruction."),
    282     EXIT_REASON(SVM_EXIT_IOIO         ,  123, "IN/OUT accessing protected port."),
     282    EXIT_REASON(SVM_EXIT_IOIO         ,  123, "IN/OUT/INS/OUTS instruction."),
    283283    EXIT_REASON(SVM_EXIT_MSR          ,  124, "RDMSR or WRMSR access to protected MSR."),
    284284    EXIT_REASON(SVM_EXIT_TASK_SWITCH  ,  125, "Task switch."),
    285     EXIT_REASON(SVM_EXIT_FERR_FREEZE  ,  126, "Legacy FPU handling enabled; CPU frozen in an x87/mmx instr. waiting for interrupt."),
     285    EXIT_REASON(SVM_EXIT_FERR_FREEZE  ,  126, "FERR Freeze; CPU frozen in an x87/mmx instruction waiting for interrupt."),
    286286    EXIT_REASON(SVM_EXIT_SHUTDOWN     ,  127, "Shutdown."),
    287287    EXIT_REASON(SVM_EXIT_VMRUN        ,  128, "VMRUN instruction."),
    … …  
    883883                             "/PROF/CPU%d/HM/StatEntry", i);
    884884        AssertRC(rc);
    885         rc = STAMR3RegisterF(pVM, &pVCpu->hm.s.StatExit1, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL,
    886                              "Profiling of VMXR0RunGuestCode exit part 1",
     885        rc = STAMR3RegisterF(pVM, &pVCpu->hm.s.StatPreExit, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL,
     886                             "Profiling of pre-exit processing after returning from GC",
    887887                             "/PROF/CPU%d/HM/SwitchFromGC_1", i);
    888888        AssertRC(rc);
    889         rc = STAMR3RegisterF(pVM, &pVCpu->hm.s.StatExit2, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL,
    890                              "Profiling of VMXR0RunGuestCode exit part 2",
     889        rc = STAMR3RegisterF(pVM, &pVCpu->hm.s.StatExitHandling, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL,
     890                             "Profiling of exit handling (longjmps not included!)",
    891891                             "/PROF/CPU%d/HM/SwitchFromGC_2", i);
    892892        AssertRC(rc);
    … …  
    958958        HM_REG_COUNTER(&pVCpu->hm.s.StatExitGuestXF,            "/HM/CPU%d/Exit/Trap/Gst/#XF", "Guest #XF (extended math fault, SIMD FPU) exception.");
    959959        HM_REG_COUNTER(&pVCpu->hm.s.StatExitGuestXcpUnk,        "/HM/CPU%d/Exit/Trap/Gst/Other", "Other guest exceptions.");
    960         HM_REG_COUNTER(&pVCpu->hm.s.StatExitHlt,                "/HM/CPU%d/Exit/Instr/Hlt", "Guest attempted to execute HLT.");
    961         HM_REG_COUNTER(&pVCpu->hm.s.StatExitRdmsr,              "/HM/CPU%d/Exit/Instr/Rdmsr", "Guest attempted to execute RDMSR.");
    962         HM_REG_COUNTER(&pVCpu->hm.s.StatExitWrmsr,              "/HM/CPU%d/Exit/Instr/Wrmsr", "Guest attempted to execute WRMSR.");
    963         HM_REG_COUNTER(&pVCpu->hm.s.StatExitMwait,              "/HM/CPU%d/Exit/Instr/Mwait", "Guest attempted to execute MWAIT.");
    964         HM_REG_COUNTER(&pVCpu->hm.s.StatExitMonitor,            "/HM/CPU%d/Exit/Instr/Monitor", "Guest attempted to execute MONITOR.");
    965         HM_REG_COUNTER(&pVCpu->hm.s.StatExitDRxWrite,           "/HM/CPU%d/Exit/Instr/DR-Write", "Guest attempted to write a debug register.");
    966         HM_REG_COUNTER(&pVCpu->hm.s.StatExitDRxRead,            "/HM/CPU%d/Exit/Instr/DR-Read", "Guest attempted to read a debug register.");
    967         HM_REG_COUNTER(&pVCpu->hm.s.StatExitCR0Read,            "/HM/CPU%d/Exit/Instr/CR-Read/CR0", "Guest attempted to read CR0.");
    968         HM_REG_COUNTER(&pVCpu->hm.s.StatExitCR2Read,            "/HM/CPU%d/Exit/Instr/CR-Read/CR2", "Guest attempted to read CR2.");
    969         HM_REG_COUNTER(&pVCpu->hm.s.StatExitCR3Read,            "/HM/CPU%d/Exit/Instr/CR-Read/CR3", "Guest attempted to read CR3.");
    970         HM_REG_COUNTER(&pVCpu->hm.s.StatExitCR4Read,            "/HM/CPU%d/Exit/Instr/CR-Read/CR4", "Guest attempted to read CR4.");
    971         HM_REG_COUNTER(&pVCpu->hm.s.StatExitCR8Read,            "/HM/CPU%d/Exit/Instr/CR-Read/CR8", "Guest attempted to read CR8.");
    972         HM_REG_COUNTER(&pVCpu->hm.s.StatExitCR0Write,           "/HM/CPU%d/Exit/Instr/CR-Write/CR0", "Guest attempted to write CR0.");
    973         HM_REG_COUNTER(&pVCpu->hm.s.StatExitCR2Write,           "/HM/CPU%d/Exit/Instr/CR-Write/CR2", "Guest attempted to write CR2.");
    974         HM_REG_COUNTER(&pVCpu->hm.s.StatExitCR3Write,           "/HM/CPU%d/Exit/Instr/CR-Write/CR3", "Guest attempted to write CR3.");
    975         HM_REG_COUNTER(&pVCpu->hm.s.StatExitCR4Write,           "/HM/CPU%d/Exit/Instr/CR-Write/CR4", "Guest attempted to write CR4.");
    976         HM_REG_COUNTER(&pVCpu->hm.s.StatExitCR8Write,           "/HM/CPU%d/Exit/Instr/CR-Write/CR8", "Guest attempted to write CR8.");
    977         HM_REG_COUNTER(&pVCpu->hm.s.StatExitClts,               "/HM/CPU%d/Exit/Instr/CLTS", "Guest attempted to execute CLTS.");
    978         HM_REG_COUNTER(&pVCpu->hm.s.StatExitLmsw,               "/HM/CPU%d/Exit/Instr/LMSW", "Guest attempted to execute LMSW.");
    979         HM_REG_COUNTER(&pVCpu->hm.s.StatExitCli,                "/HM/CPU%d/Exit/Instr/Cli", "Guest attempted to execute CLI.");
    980         HM_REG_COUNTER(&pVCpu->hm.s.StatExitSti,                "/HM/CPU%d/Exit/Instr/Sti", "Guest attempted to execute STI.");
    981         HM_REG_COUNTER(&pVCpu->hm.s.StatExitPushf,              "/HM/CPU%d/Exit/Instr/Pushf", "Guest attempted to execute PUSHF.");
    982         HM_REG_COUNTER(&pVCpu->hm.s.StatExitPopf,               "/HM/CPU%d/Exit/Instr/Popf", "Guest attempted to execute POPF.");
    983         HM_REG_COUNTER(&pVCpu->hm.s.StatExitIret,               "/HM/CPU%d/Exit/Instr/Iret", "Guest attempted to execute IRET.");
    984         HM_REG_COUNTER(&pVCpu->hm.s.StatExitInt,                "/HM/CPU%d/Exit/Instr/Int", "Guest attempted to execute INT.");
    985         HM_REG_COUNTER(&pVCpu->hm.s.StatExitXdtrAccess,         "/HM/CPU%d/Exit/Instr/XdtrAccess", "Guest attempted to access descriptor table register (GDTR, IDTR, LDTR).");
     960        HM_REG_COUNTER(&pVCpu->hm.s.StatExitHlt,                "/HM/CPU%d/Exit/Instr/Hlt", "HLT instruction.");
     961        HM_REG_COUNTER(&pVCpu->hm.s.StatExitRdmsr,              "/HM/CPU%d/Exit/Instr/Rdmsr", "RDMSR instruction.");
     962        HM_REG_COUNTER(&pVCpu->hm.s.StatExitWrmsr,              "/HM/CPU%d/Exit/Instr/Wrmsr", "WRMSR instruction.");
     963        HM_REG_COUNTER(&pVCpu->hm.s.StatExitMwait,              "/HM/CPU%d/Exit/Instr/Mwait", "MWAIT instruction.");
     964        HM_REG_COUNTER(&pVCpu->hm.s.StatExitMonitor,            "/HM/CPU%d/Exit/Instr/Monitor", "MONITOR instruction.");
     965        HM_REG_COUNTER(&pVCpu->hm.s.StatExitDRxWrite,           "/HM/CPU%d/Exit/Instr/DR-Write", "Debug register write.");
     966        HM_REG_COUNTER(&pVCpu->hm.s.StatExitDRxRead,            "/HM/CPU%d/Exit/Instr/DR-Read", "Debug register read.");
     967        HM_REG_COUNTER(&pVCpu->hm.s.StatExitCR0Read,            "/HM/CPU%d/Exit/Instr/CR-Read/CR0", "CR0 read.");
     968        HM_REG_COUNTER(&pVCpu->hm.s.StatExitCR2Read,            "/HM/CPU%d/Exit/Instr/CR-Read/CR2", "CR2 read.");
     969        HM_REG_COUNTER(&pVCpu->hm.s.StatExitCR3Read,            "/HM/CPU%d/Exit/Instr/CR-Read/CR3", "CR3 read.");
     970        HM_REG_COUNTER(&pVCpu->hm.s.StatExitCR4Read,            "/HM/CPU%d/Exit/Instr/CR-Read/CR4", "CR4 read.");
     971        HM_REG_COUNTER(&pVCpu->hm.s.StatExitCR8Read,            "/HM/CPU%d/Exit/Instr/CR-Read/CR8", "CR8 read.");
     972        HM_REG_COUNTER(&pVCpu->hm.s.StatExitCR0Write,           "/HM/CPU%d/Exit/Instr/CR-Write/CR0", "CR0 write.");
     973        HM_REG_COUNTER(&pVCpu->hm.s.StatExitCR2Write,           "/HM/CPU%d/Exit/Instr/CR-Write/CR2", "CR2 write.");
     974        HM_REG_COUNTER(&pVCpu->hm.s.StatExitCR3Write,           "/HM/CPU%d/Exit/Instr/CR-Write/CR3", "CR3 write.");
     975        HM_REG_COUNTER(&pVCpu->hm.s.StatExitCR4Write,           "/HM/CPU%d/Exit/Instr/CR-Write/CR4", "CR4 write.");
     976        HM_REG_COUNTER(&pVCpu->hm.s.StatExitCR8Write,           "/HM/CPU%d/Exit/Instr/CR-Write/CR8", "CR8 write.");
     977        HM_REG_COUNTER(&pVCpu->hm.s.StatExitClts,               "/HM/CPU%d/Exit/Instr/CLTS", "CLTS instruction.");
     978        HM_REG_COUNTER(&pVCpu->hm.s.StatExitLmsw,               "/HM/CPU%d/Exit/Instr/LMSW", "LMSW instruction.");
     979        HM_REG_COUNTER(&pVCpu->hm.s.StatExitCli,                "/HM/CPU%d/Exit/Instr/Cli", "CLI instruction.");
     980        HM_REG_COUNTER(&pVCpu->hm.s.StatExitSti,                "/HM/CPU%d/Exit/Instr/Sti", "STI instruction.");
     981        HM_REG_COUNTER(&pVCpu->hm.s.StatExitPushf,              "/HM/CPU%d/Exit/Instr/Pushf", "PUSHF instruction.");
     982        HM_REG_COUNTER(&pVCpu->hm.s.StatExitPopf,               "/HM/CPU%d/Exit/Instr/Popf", "POPF instruction.");
     983        HM_REG_COUNTER(&pVCpu->hm.s.StatExitIret,               "/HM/CPU%d/Exit/Instr/Iret", "IRET instruction.");
     984        HM_REG_COUNTER(&pVCpu->hm.s.StatExitInt,                "/HM/CPU%d/Exit/Instr/Int", "INT instruction.");
     985        HM_REG_COUNTER(&pVCpu->hm.s.StatExitXdtrAccess,         "/HM/CPU%d/Exit/Instr/XdtrAccess", "GDTR, IDTR, LDTR access.");
    986986        HM_REG_COUNTER(&pVCpu->hm.s.StatExitIOWrite,            "/HM/CPU%d/Exit/IO/Write", "I/O write.");
    987987        HM_REG_COUNTER(&pVCpu->hm.s.StatExitIORead,             "/HM/CPU%d/Exit/IO/Read", "I/O read.");
    … …  
    989989        HM_REG_COUNTER(&pVCpu->hm.s.StatExitIOStringRead,       "/HM/CPU%d/Exit/IO/ReadString", "String I/O read.");
    990990        HM_REG_COUNTER(&pVCpu->hm.s.StatExitIntWindow,          "/HM/CPU%d/Exit/IntWindow", "Interrupt-window exit. Guest is ready to receive interrupts again.");
    991         HM_REG_COUNTER(&pVCpu->hm.s.StatExitExtInt,             "/HM/CPU%d/Exit/ExtInt", "Host interrupt received.");
     991        HM_REG_COUNTER(&pVCpu->hm.s.StatExitExtInt,             "/HM/CPU%d/Exit/ExtInt", "Physical maskable interrupt (host).");
    992992#endif
    993993        HM_REG_COUNTER(&pVCpu->hm.s.StatExitHostNmiInGC,        "/HM/CPU%d/Exit/HostNmiInGC", "Host NMI received while in guest context.");
    … …  
    995995        HM_REG_COUNTER(&pVCpu->hm.s.StatExitPreemptTimer,       "/HM/CPU%d/Exit/PreemptTimer", "VMX-preemption timer expired.");
    996996        HM_REG_COUNTER(&pVCpu->hm.s.StatExitTprBelowThreshold,  "/HM/CPU%d/Exit/TprBelowThreshold", "TPR lowered below threshold by the guest.");
    997         HM_REG_COUNTER(&pVCpu->hm.s.StatExitTaskSwitch,         "/HM/CPU%d/Exit/TaskSwitch", "Guest attempted a task switch.");
     997        HM_REG_COUNTER(&pVCpu->hm.s.StatExitTaskSwitch,         "/HM/CPU%d/Exit/TaskSwitch", "Task switch.");
    998998        HM_REG_COUNTER(&pVCpu->hm.s.StatExitMtf,                "/HM/CPU%d/Exit/MonitorTrapFlag", "Monitor Trap Flag.");
    999999        HM_REG_COUNTER(&pVCpu->hm.s.StatExitApicAccess,         "/HM/CPU%d/Exit/ApicAccess", "APIC access. Guest attempted to access memory at a physical address on the APIC-access page.");
    … …  
    15901590
    15911591            /*
    1592              * Construct a 1024 element page directory with 4 MB pages for
    1593              * the identity mapped page table used in real and protected mode
    1594              * without paging with EPT.
     1592             * Construct a 1024 element page directory with 4 MB pages for the identity mapped
     1593             * page table used in real and protected mode without paging with EPT.
    15951594             */
    15961595            pVM->hm.s.vmx.pNonPagingModeEPTPageTable = (PX86PD)((char *)pVM->hm.s.vmx.pRealModeTSS + PAGE_SIZE * 3);
    … …  
    21042103#ifdef LOG_ENABLED
    21052104        char            szOutput[256];
    2106 
    21072105        rc = DBGFR3DisasInstrEx(pVM->pUVM, pVCpu->idCpu, CPUMGetGuestCS(pVCpu), pInstrGC, DBGF_DISAS_FLAGS_DEFAULT_MODE,
    21082106                                szOutput, sizeof(szOutput), NULL);
    … …  
    24732471             * pop ECX                       [59]
    24742472             * jmp return_address            [E9 return_address]
    2475              *
    24762473             */
    24772474            bool fUsesEax = (pDis->Param2.fUse == DISUSE_REG_GEN32 && pDis->Param2.Base.idxGenReg == DISGREG_EAX);
    … …  
    25242521             * pop ECX                       [59]
    25252522             * jmp return_address            [E9 return_address]
    2526              *
    25272523             */
    25282524            Assert(pDis->Param1.fUse == DISUSE_REG_GEN32);
    … …  
    27302726                        /*
    27312727                         * The following two requirements are VT-x specific:
    2732                          *  - G bit must be set if any high limit bits are set.
    2733                          *  - G bit must be clear if any low limit bits are clear.
     2728                         *   - G bit must be set if any high limit bits are set.
     2729                         *   - G bit must be clear if any low limit bits are clear.
    27342730                         */
    27352731                        if (   ((pSel->u32Limit & 0xfff00000) == 0x00000000 ||  pSel->Attr.n.u1Granularity)
    … …  
    27732769    AssertMsgReturn(   (pSel->Attr.u & (X86_SEL_TYPE_ACCESSED | X86_SEL_TYPE_WRITE | X86DESCATTR_DT | X86DESCATTR_P | X86_SEL_TYPE_CODE))
    27742770                    ==                 (X86_SEL_TYPE_ACCESSED | X86_SEL_TYPE_WRITE | X86DESCATTR_DT | X86DESCATTR_P),
    2775                     ("%#x\n", pSel->Attr.u),
    2776                     false);
     2771                    ("%#x\n", pSel->Attr.u), false);
    27772772
    27782773    /* DPL must equal RPL.
    27792774       Note! This is also a hard requirement like above. */
    27802775    AssertMsgReturn(pSel->Attr.n.u2Dpl == (pSel->Sel & X86_SEL_RPL),
    2781                     ("u2Dpl=%u Sel=%#x\n", pSel->Attr.n.u2Dpl, pSel->Sel),
    2782                     false);
     2776                    ("u2Dpl=%u Sel=%#x\n", pSel->Attr.n.u2Dpl, pSel->Sel), false);
    27832777
    27842778    /*
    27852779     * The following two requirements are VT-x specific:
    2786      *  - G bit must be set if any high limit bits are set.
    2787      *  - G bit must be clear if any low limit bits are clear.
     2780     *   - G bit must be set if any high limit bits are set.
     2781     *   - G bit must be clear if any low limit bits are clear.
    27882782     */
    27892783    if (   ((pSel->u32Limit & 0xfff00000) == 0x00000000 ||  pSel->Attr.n.u1Granularity)
    … …  
    28432837
    28442838    /* If we're still executing the IO code, then return false. */
    2845     if (    RT_UNLIKELY(pVCpu->hm.s.EmulateIoBlock.fEnabled)
    2846         &&  pCtx->rip <  pVCpu->hm.s.EmulateIoBlock.GCPtrFunctionEip + 0x200
    2847         &&  pCtx->rip >  pVCpu->hm.s.EmulateIoBlock.GCPtrFunctionEip - 0x200
    2848         &&  pCtx->cr0 == pVCpu->hm.s.EmulateIoBlock.cr0)
     2839    if (   RT_UNLIKELY(pVCpu->hm.s.EmulateIoBlock.fEnabled)
     2840        && pCtx->rip <  pVCpu->hm.s.EmulateIoBlock.GCPtrFunctionEip + 0x200
     2841        && pCtx->rip >  pVCpu->hm.s.EmulateIoBlock.GCPtrFunctionEip - 0x200
     2842        && pCtx->cr0 == pVCpu->hm.s.EmulateIoBlock.cr0)
    28492843        return false;
    28502844
    … …  
    28752869            if (CPUMIsGuestInRealModeEx(pCtx))
    28762870            {
    2877                 /* In V86 mode (VT-x or not), the CPU enforces real-mode compatible selector
     2871                /*
     2872                 * In V86 mode (VT-x or not), the CPU enforces real-mode compatible selector
    28782873                 * bases and limits, i.e. limit must be 64K and base must be selector * 16.
    28792874                 * If this is not true, we cannot execute real mode as V86 and have to fall
    … …  
    29042899            else
    29052900            {
    2906                 /* Verify the requirements for executing code in protected
    2907                    mode. VT-x can't handle the CPU state right after a switch
    2908                    from real to protected mode. (all sorts of RPL & DPL assumptions). */
     2901                /*
     2902                 * Verify the requirements for executing code in protected mode. VT-x can't
     2903                 * handle the CPU state right after a switch from real to protected mode
     2904                 * (all sorts of RPL & DPL assumptions).
     2905                 */
    29092906                if (pVCpu->hm.s.vmx.fWasInRealMode)
    29102907                {
    … …  
    29452942        else
    29462943        {
    2947             if (    !CPUMIsGuestInLongModeEx(pCtx)
    2948                 &&  !pVM->hm.s.vmx.fUnrestrictedGuest)
     2944            if (   !CPUMIsGuestInLongModeEx(pCtx)
     2945                && !pVM->hm.s.vmx.fUnrestrictedGuest)
    29492946            {
    29502947                if (   !pVM->hm.s.fNestedPaging        /* Requires a fake PD for real *and* protected mode without paging - stored in the VMM device heap */
    … …  
    29562953                    return false;
    29572954
    2958                 /* The guest is about to complete the switch to protected mode. Wait a bit longer. */
    2959                 /* Windows XP; switch to protected mode; all selectors are marked not present in the
    2960                  * hidden registers (possible recompiler bug; see load_seg_vm) */
     2955                /*
     2956                 * The guest is about to complete the switch to protected mode. Wait a bit longer.
     2957                 * Windows XP; switch to protected mode; all selectors are marked not present
     2958                 * in the hidden registers (possible recompiler bug; see load_seg_vm).
     2959                 */
    29612960                /** @todo Is this supposed recompiler bug still relevant with IEM? */
    29622961                if (pCtx->cs.Attr.n.u1Present == 0)
    … …  
    29652964                    return false;
    29662965
    2967                 /* Windows XP: possible same as above, but new recompiler requires new heuristics?
    2968                    VT-x doesn't seem to like something about the guest state and this stuff avoids it. */
     2966                /*
     2967                 * Windows XP: possible same as above, but new recompiler requires new
     2968                 * heuristics? VT-x doesn't seem to like something about the guest state and
     2969                 * this stuff avoids it.
     2970                 */
    29692971                /** @todo This check is actually wrong, it doesn't take the direction of the
    29702972                 *        stack segment into account. But, it does the job for now. */
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