Changeset 72882 in vbox for trunk/src/VBox/VMM/VMMAll

Timestamp:

Jul 4, 2018 3:19:44 PM (7 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

123427

Message:

EM,HM,IEM: Replaced EMInterpretRdmsr with IEMExecDecodedRdmsr.

Location:

trunk/src/VBox/VMM/VMMAll

Files:

• EMAll.cpp (modified) (2 diffs)
• IEMAll.cpp (modified) (3 diffs)
• IEMAllCImpl.cpp.h (modified) (4 diffs)

trunk/src/VBox/VMM/VMMAll/EMAll.cpp

@@ -2100 +2100 @@
 
 /**
- * Interpret RDMSR
- *
- * @returns VBox status code.
- * @param   pVM         The cross context VM structure.
- * @param   pVCpu       The cross context virtual CPU structure.
- * @param   pRegFrame   The register frame.
- */
-VMM_INT_DECL(int) EMInterpretRdmsr(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame)
-{
-    NOREF(pVM);
-
-    /* Get the current privilege level. */
-    if (CPUMGetGuestCPL(pVCpu) != 0)
-    {
-        Log4(("EM: Refuse RDMSR: CPL != 0\n"));
-        return VERR_EM_INTERPRETER; /* supervisor only */
-    }
-
-    uint64_t uValue;
-    VBOXSTRICTRC rcStrict = CPUMQueryGuestMsr(pVCpu, pRegFrame->ecx, &uValue);
-    if (RT_UNLIKELY(rcStrict != VINF_SUCCESS))
-    {
-        Log4(("EM: Refuse RDMSR: rc=%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
-        Assert(rcStrict == VERR_CPUM_RAISE_GP_0 || rcStrict == VERR_EM_INTERPRETER || rcStrict == VINF_CPUM_R3_MSR_READ);
-        return VERR_EM_INTERPRETER;
-    }
-    pRegFrame->rax = RT_LO_U32(uValue);
-    pRegFrame->rdx = RT_HI_U32(uValue);
-    LogFlow(("EMInterpretRdmsr %s (%x) -> %RX64\n", emMSRtoString(pRegFrame->ecx), pRegFrame->ecx, uValue));
-    return VINF_SUCCESS;
-}
-
-
-/**
  * Interpret DRx write.
  *
@@ -4205 +4171 @@
     Assert(!(pDis->fPrefix & DISPREFIX_REX));
     NOREF(pDis); NOREF(pvFault); NOREF(pcbSize);
-    return EMInterpretRdmsr(pVM, pVCpu, pRegFrame);
+
+    /* Get the current privilege level. */
+    if (CPUMGetGuestCPL(pVCpu) != 0)
+    {
+        Log4(("EM: Refuse RDMSR: CPL != 0\n"));
+        return VERR_EM_INTERPRETER; /* supervisor only */
+    }
+
+    uint64_t uValue;
+    VBOXSTRICTRC rcStrict = CPUMQueryGuestMsr(pVCpu, pRegFrame->ecx, &uValue);
+    if (RT_UNLIKELY(rcStrict != VINF_SUCCESS))
+    {
+        Log4(("EM: Refuse RDMSR: rc=%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
+        Assert(rcStrict == VERR_CPUM_RAISE_GP_0 || rcStrict == VERR_EM_INTERPRETER || rcStrict == VINF_CPUM_R3_MSR_READ);
+        return VERR_EM_INTERPRETER;
+    }
+    pRegFrame->rax = RT_LO_U32(uValue);
+    pRegFrame->rdx = RT_HI_U32(uValue);
+    LogFlow(("EMInterpretRdmsr %s (%x) -> %RX64\n", emMSRtoString(pRegFrame->ecx), pRegFrame->ecx, uValue));
+    return VINF_SUCCESS;
 }
 

trunk/src/VBox/VMM/VMMAll/IEMAll.cpp

@@ -14999 +14999 @@
 
 /**
- * Interface for HM and EM to emulate the WRMSR instruction.
+ * Interface for HM and EM to emulate the RDMSR instruction.
  *
  * @returns Strict VBox status code.
@@ -15007 +15007 @@
  * @param   cbInstr             The instruction length in bytes.
  *
- * @remarks Not all of the state needs to be synced in.  Recommended
- *          to include CPUMCTX_EXTRN_TSC_AUX, to avoid extra fetch call.
+ * @remarks Not all of the state needs to be synced in.  Requires RCX and
+ *          (currently) all MSRs.
+ */
+VMM_INT_DECL(VBOXSTRICTRC)  IEMExecDecodedRdmsr(PVMCPU pVCpu, uint8_t cbInstr)
+{
+    IEMEXEC_ASSERT_INSTR_LEN_RETURN(cbInstr, 2);
+    IEM_CTX_ASSERT(pVCpu, IEM_CPUMCTX_EXTRN_EXEC_DECODED_NO_MEM_MASK | CPUMCTX_EXTRN_RCX | CPUMCTX_EXTRN_ALL_MSRS);
+
+    iemInitExec(pVCpu, false /*fBypassHandlers*/);
+    VBOXSTRICTRC rcStrict = IEM_CIMPL_CALL_0(iemCImpl_rdmsr);
+    Assert(!pVCpu->iem.s.cActiveMappings);
+    return iemUninitExecAndFiddleStatusAndMaybeReenter(pVCpu, rcStrict);
+}
+
+
+/**
+ * Interface for HM and EM to emulate the WRMSR instruction.
+ *
+ * @returns Strict VBox status code.
+ * @retval  VINF_IEM_RAISED_XCPT (VINF_EM_RESCHEDULE) if exception is raised.
+ *
+ * @param   pVCpu               The cross context virtual CPU structure.
+ * @param   cbInstr             The instruction length in bytes.
+ *
+ * @remarks Not all of the state needs to be synced in.  Requires RCX, RAX, RDX,
+ *          and (currently) all MSRs.
  */
 VMM_INT_DECL(VBOXSTRICTRC)  IEMExecDecodedWrmsr(PVMCPU pVCpu, uint8_t cbInstr)
@@ -15015 +15039 @@
     IEM_CTX_ASSERT(pVCpu, IEM_CPUMCTX_EXTRN_EXEC_DECODED_NO_MEM_MASK
                         | CPUMCTX_EXTRN_RCX | CPUMCTX_EXTRN_RAX | CPUMCTX_EXTRN_RDX | CPUMCTX_EXTRN_ALL_MSRS);
-    //CPUMCTX_EXTRN_RSP
 
     iemInitExec(pVCpu, false /*fBypassHandlers*/);

trunk/src/VBox/VMM/VMMAll/IEMAllCImpl.cpp.h

@@ -6235 +6235 @@
 #endif
 
+    /** @todo make CPUMAllMsrs.cpp import the necessary MSR state. */
     IEM_CTX_IMPORT_RET(pVCpu, CPUMCTX_EXTRN_ALL_MSRS);
 
@@ -6242 +6243 @@
         pVCpu->cpum.GstCtx.rax = uValue.s.Lo;
         pVCpu->cpum.GstCtx.rdx = uValue.s.Hi;
+        pVCpu->cpum.GstCtx.fExtrn &= ~(CPUMCTX_EXTRN_RAX | CPUMCTX_EXTRN_RDX);
 
         iemRegAddToRipAndClearRF(pVCpu, cbInstr);
@@ -6304 +6306 @@
 #endif
 
+    /** @todo make CPUMAllMsrs.cpp import the necessary MSR state. */
     IEM_CTX_IMPORT_RET(pVCpu, CPUMCTX_EXTRN_ALL_MSRS);
 
@@ -6803 +6806 @@
     }
 
+    /** @todo make CPUMGetGuestCpuId import any necessary MSR state. */
     IEM_CTX_IMPORT_RET(pVCpu, CPUMCTX_EXTRN_ALL_MSRS);
     CPUMGetGuestCpuId(pVCpu, pVCpu->cpum.GstCtx.eax, pVCpu->cpum.GstCtx.ecx, &pVCpu->cpum.GstCtx.eax, &pVCpu->cpum.GstCtx.ebx, &pVCpu->cpum.GstCtx.ecx, &pVCpu->cpum.GstCtx.edx);