VirtualBox

Changeset 72924 in vbox for trunk/src/VBox/VMM/VMMR0


Ignore:
Timestamp:
Jul 5, 2018 4:14:26 PM (6 years ago)
Author:
vboxsync
Message:

NEM/win: Make it possible to select between ring-0 runloop hypercalls+VID.SYS and ring-3 runloop using WHv API via CFGM setting. bugref:9044

File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/src/VBox/VMM/VMMR0/NEMR0Native-win.cpp

    r72918 r72924  
    8282                                      uint32_t cPages, uint32_t fFlags);
    8383NEM_TMPL_STATIC int  nemR0WinUnmapPages(PGVM pGVM, PGVMCPU pGVCpu, RTGCPHYS GCPhys, uint32_t cPages);
     84#if defined(NEM_WIN_WITH_RING0_RUNLOOP) || defined(NEM_WIN_USE_HYPERCALLS_FOR_REGISTERS)
    8485NEM_TMPL_STATIC int  nemR0WinExportState(PGVM pGVM, PGVMCPU pGVCpu, PCPUMCTX pCtx);
    8586NEM_TMPL_STATIC int  nemR0WinImportState(PGVM pGVM, PGVMCPU pGVCpu, PCPUMCTX pCtx, uint64_t fWhat);
    8687NEM_TMPL_STATIC int  nemR0WinQueryCpuTick(PGVM pGVM, PGVMCPU pGVCpu, uint64_t *pcTicks, uint32_t *pcAux);
    8788NEM_TMPL_STATIC int  nemR0WinResumeCpuTickOnAll(PGVM pGVM, PGVMCPU pGVCpu, uint64_t uPausedTscValue);
     89#endif
    8890DECLINLINE(NTSTATUS) nemR0NtPerformIoControl(PGVM pGVM, uint32_t uFunction, void *pvInput, uint32_t cbInput,
    8991                                             void *pvOutput, uint32_t cbOutput);
     
    9395 * Instantate the code we share with ring-0.
    9496 */
     97#ifdef NEM_WIN_WITH_RING0_RUNLOOP
     98# define NEM_WIN_TEMPLATE_MODE_OWN_RUN_API
     99#else
     100# undef NEM_WIN_TEMPLATE_MODE_OWN_RUN_API
     101#endif
    95102#include "../VMMAll/NEMAllNativeTemplate-win.cpp.h"
     103
     104
    96105
    97106/**
     
    582591
    583592
     593#if defined(NEM_WIN_WITH_RING0_RUNLOOP) || defined(NEM_WIN_USE_HYPERCALLS_FOR_REGISTERS)
    584594/**
    585595 * Worker for NEMR0ExportState.
     
    722732
    723733    /* Segments */
    724 #define COPY_OUT_SEG(a_idx, a_enmName, a_SReg) \
     734# define COPY_OUT_SEG(a_idx, a_enmName, a_SReg) \
    725735        do { \
    726736            HV_REGISTER_ASSOC_ZERO_PADDING(&pInput->Elements[a_idx]); \
     
    10981108        pInput->Elements[iReg].Value.Reg64          = pCtx->msrPAT;
    10991109        iReg++;
    1100 #if 0 /** @todo HvX64RegisterMtrrCap is read only?  Seems it's not even readable. */
     1110# if 0 /** @todo HvX64RegisterMtrrCap is read only?  Seems it's not even readable. */
    11011111        HV_REGISTER_ASSOC_ZERO_PADDING_AND_HI64(&pInput->Elements[iReg]);
    11021112        pInput->Elements[iReg].Name                 = HvX64RegisterMtrrCap;
    11031113        pInput->Elements[iReg].Value.Reg64          = CPUMGetGuestIa32MtrrCap(pVCpu);
    11041114        iReg++;
    1105 #endif
     1115# endif
    11061116
    11071117        PCPUMCTXMSRS pCtxMsrs = CPUMQueryGuestCtxMsrsPtr(pVCpu);
     
    11631173        iReg++;
    11641174
    1165 #if 0 /** @todo Why can't we write these on Intel systems? Not that we really care... */
     1175# if 0 /** @todo Why can't we write these on Intel systems? Not that we really care... */
    11661176        const CPUMCPUVENDOR enmCpuVendor = CPUMGetHostCpuVendor(pGVM->pVM);
    11671177        if (enmCpuVendor != CPUMCPUVENDOR_AMD)
     
    11761186            iReg++;
    11771187        }
    1178 #endif
     1188# endif
    11791189    }
    11801190
     
    12601270    return VINF_SUCCESS;
    12611271}
     1272#endif /* NEM_WIN_WITH_RING0_RUNLOOP || NEM_WIN_USE_HYPERCALLS_FOR_REGISTERS */
    12621273
    12631274
     
    12731284VMMR0_INT_DECL(int)  NEMR0ExportState(PGVM pGVM, PVM pVM, VMCPUID idCpu)
    12741285{
     1286#if defined(NEM_WIN_WITH_RING0_RUNLOOP) || defined(NEM_WIN_USE_HYPERCALLS_FOR_REGISTERS)
    12751287    /*
    12761288     * Validate the call.
     
    12891301    }
    12901302    return rc;
     1303#else
     1304    RT_NOREF(pGVM, pVM, idCpu);
     1305    return VERR_NOT_IMPLEMENTED;
     1306#endif
    12911307}
    12921308
    12931309
     1310#if defined(NEM_WIN_WITH_RING0_RUNLOOP) || defined(NEM_WIN_USE_HYPERCALLS_FOR_REGISTERS)
    12941311/**
    12951312 * Worker for NEMR0ImportState.
     
    14701487    }
    14711488
    1472 #ifdef LOG_ENABLED
     1489# ifdef LOG_ENABLED
    14731490    const CPUMCPUVENDOR enmCpuVendor = CPUMGetHostCpuVendor(pGVM->pVM);
    1474 #endif
     1491# endif
    14751492    if (fWhat & CPUMCTX_EXTRN_OTHER_MSRS)
    14761493    {
    14771494        pInput->Names[iReg++] = HvX64RegisterApicBase; /// @todo APIC BASE
    14781495        pInput->Names[iReg++] = HvX64RegisterPat;
    1479 #if 0 /*def LOG_ENABLED*/ /** @todo something's wrong with HvX64RegisterMtrrCap? (AMD) */
     1496# if 0 /*def LOG_ENABLED*/ /** @todo something's wrong with HvX64RegisterMtrrCap? (AMD) */
    14801497        pInput->Names[iReg++] = HvX64RegisterMtrrCap;
    1481 #endif
     1498# endif
    14821499        pInput->Names[iReg++] = HvX64RegisterMtrrDefType;
    14831500        pInput->Names[iReg++] = HvX64RegisterMtrrFix64k00000;
     
    14931510        pInput->Names[iReg++] = HvX64RegisterMtrrFix4kF8000;
    14941511        pInput->Names[iReg++] = HvX64RegisterTscAux;
    1495 #if 0 /** @todo why can't we read HvX64RegisterIa32MiscEnable? */
     1512# if 0 /** @todo why can't we read HvX64RegisterIa32MiscEnable? */
    14961513        if (enmCpuVendor != CPUMCPUVENDOR_AMD)
    14971514            pInput->Names[iReg++] = HvX64RegisterIa32MiscEnable;
    1498 #endif
    1499 #ifdef LOG_ENABLED
     1515# endif
     1516# ifdef LOG_ENABLED
    15001517        if (enmCpuVendor != CPUMCPUVENDOR_AMD)
    15011518            pInput->Names[iReg++] = HvX64RegisterIa32FeatureControl;
    1502 #endif
     1519# endif
    15031520    }
    15041521
     
    16091626
    16101627    /* Segments */
    1611 #define COPY_BACK_SEG(a_idx, a_enmName, a_SReg) \
     1628# define COPY_BACK_SEG(a_idx, a_enmName, a_SReg) \
    16121629        do { \
    16131630            Assert(pInput->Names[a_idx] == a_enmName); \
     
    19892006        iReg++;
    19902007
    1991 #if 0 /*def LOG_ENABLED*/ /** @todo something's wrong with HvX64RegisterMtrrCap? (AMD) */
     2008# if 0 /*def LOG_ENABLED*/ /** @todo something's wrong with HvX64RegisterMtrrCap? (AMD) */
    19922009        Assert(pInput->Names[iReg] == HvX64RegisterMtrrCap);
    19932010        if (paValues[iReg].Reg64 != CPUMGetGuestIa32MtrrCap(pVCpu))
    19942011            Log7(("NEM/%u: MSR MTRR_CAP changed %RX64 -> %RX64 (!!)\n", pVCpu->idCpu, CPUMGetGuestIa32MtrrCap(pVCpu), paValues[iReg].Reg64));
    19952012        iReg++;
    1996 #endif
     2013# endif
    19972014
    19982015        PCPUMCTXMSRS pCtxMsrs = CPUMQueryGuestCtxMsrsPtr(pVCpu);
     
    20772094        iReg++;
    20782095
    2079 #if 0 /** @todo why can't we even read HvX64RegisterIa32MiscEnable? */
     2096# if 0 /** @todo why can't we even read HvX64RegisterIa32MiscEnable? */
    20802097        if (enmCpuVendor != CPUMCPUVENDOR_AMD)
    20812098        {
     
    20862103            iReg++;
    20872104        }
    2088 #endif
    2089 #ifdef LOG_ENABLED
     2105# endif
     2106# ifdef LOG_ENABLED
    20902107        if (enmCpuVendor != CPUMCPUVENDOR_AMD)
    20912108        {
     
    20952112            iReg++;
    20962113        }
    2097 #endif
     2114# endif
    20982115    }
    20992116
     
    21792196    return rc;
    21802197}
     2198#endif /* NEM_WIN_WITH_RING0_RUNLOOP || NEM_WIN_USE_HYPERCALLS_FOR_REGISTERS */
    21812199
    21822200
     
    21942212VMMR0_INT_DECL(int) NEMR0ImportState(PGVM pGVM, PVM pVM, VMCPUID idCpu, uint64_t fWhat)
    21952213{
     2214#if defined(NEM_WIN_WITH_RING0_RUNLOOP) || defined(NEM_WIN_USE_HYPERCALLS_FOR_REGISTERS)
    21962215    /*
    21972216     * Validate the call.
     
    22102229    }
    22112230    return rc;
     2231#else
     2232    RT_NOREF(pGVM, pVM, idCpu, fWhat);
     2233    return VERR_NOT_IMPLEMENTED;
     2234#endif
    22122235}
    22132236
    22142237
     2238#if defined(NEM_WIN_WITH_RING0_RUNLOOP) || defined(NEM_WIN_USE_HYPERCALLS_FOR_REGISTERS)
    22152239/**
    22162240 * Worker for NEMR0QueryCpuTick and the ring-0 NEMHCQueryCpuTick.
     
    22582282    return VINF_SUCCESS;
    22592283}
     2284#endif /* NEM_WIN_WITH_RING0_RUNLOOP || NEM_WIN_USE_HYPERCALLS_FOR_REGISTERS */
    22602285
    22612286
     
    22712296VMMR0_INT_DECL(int) NEMR0QueryCpuTick(PGVM pGVM, PVM pVM, VMCPUID idCpu)
    22722297{
     2298#if defined(NEM_WIN_WITH_RING0_RUNLOOP) || defined(NEM_WIN_USE_HYPERCALLS_FOR_REGISTERS)
    22732299    /*
    22742300     * Validate the call.
     
    22902316    }
    22912317    return rc;
     2318#else
     2319    RT_NOREF(pGVM, pVM, idCpu);
     2320    return VERR_NOT_IMPLEMENTED;
     2321#endif
    22922322}
    22932323
    22942324
     2325#if defined(NEM_WIN_WITH_RING0_RUNLOOP) || defined(NEM_WIN_USE_HYPERCALLS_FOR_REGISTERS)
    22952326/**
    22962327 * Worker for NEMR0ResumeCpuTickOnAll and the ring-0 NEMHCResumeCpuTickOnAll.
     
    23602391    return VINF_SUCCESS;
    23612392}
     2393#endif /* NEM_WIN_WITH_RING0_RUNLOOP || NEM_WIN_USE_HYPERCALLS_FOR_REGISTERS */
    23622394
    23632395
     
    23742406VMMR0_INT_DECL(int) NEMR0ResumeCpuTickOnAll(PGVM pGVM, PVM pVM, VMCPUID idCpu, uint64_t uPausedTscValue)
    23752407{
     2408#if defined(NEM_WIN_WITH_RING0_RUNLOOP) || defined(NEM_WIN_USE_HYPERCALLS_FOR_REGISTERS)
    23762409    /*
    23772410     * Validate the call.
     
    23922425    }
    23932426    return rc;
     2427#else
     2428    RT_NOREF(pGVM, pVM, idCpu, uPausedTscValue);
     2429    return VERR_NOT_IMPLEMENTED;
     2430#endif
    23942431}
    23952432
     
    23972434VMMR0_INT_DECL(VBOXSTRICTRC) NEMR0RunGuestCode(PGVM pGVM, VMCPUID idCpu)
    23982435{
    2399 #ifdef NEM_WIN_USE_OUR_OWN_RUN_API
     2436#ifdef NEM_WIN_WITH_RING0_RUNLOOP
    24002437    PVM pVM = pGVM->pVM;
    24012438    return nemHCWinRunGC(pVM, &pVM->aCpus[idCpu], pGVM, &pGVM->aCpus[idCpu]);
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