Changeset 73055 in vbox

Timestamp:

Jul 11, 2018 6:11:24 AM (7 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

123615

Message:

VMM/HMSVMR0: bugref:9193 Attempt to fix regression with nested SVM smoketests.

File:

• trunk/src/VBox/VMM/VMMR0/HMSVMR0.cpp (modified) (12 diffs)

trunk/src/VBox/VMM/VMMR0/HMSVMR0.cpp

@@ -7833 +7833 @@
 {
     HMSVM_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pSvmTransient);
-    HMSVM_CPUMCTX_IMPORT_STATE(pVCpu, IEM_CPUMCTX_EXTRN_MUST_MASK | CPUMCTX_EXTRN_HWVIRT);
 
 #ifdef VBOX_STRICT
@@ -7842 +7841 @@
 #endif
 
-    VBOXSTRICTRC rcStrict;
-    bool const fSupportsNextRipSave = hmR0SvmSupportsNextRipSave(pVCpu);
+    VBOXSTRICTRC   rcStrict;
+    bool const     fSupportsNextRipSave = hmR0SvmSupportsNextRipSave(pVCpu);
+    uint64_t const fImport = CPUMCTX_EXTRN_HWVIRT;
     if (fSupportsNextRipSave)
     {
+        HMSVM_CPUMCTX_IMPORT_STATE(pVCpu, IEM_CPUMCTX_EXTRN_EXEC_DECODED_NO_MEM_MASK | fImport);
         uint8_t const cbInstr = hmR0SvmGetInstrLength(pVCpu);
         rcStrict = IEMExecDecodedClgi(pVCpu, cbInstr);
     }
     else
+    {
+        HMSVM_CPUMCTX_IMPORT_STATE(pVCpu, IEM_CPUMCTX_EXTRN_MUST_MASK | fImport);
         rcStrict = IEMExecOne(pVCpu);
+    }
 
     if (rcStrict == VINF_SUCCESS)
@@ -7870 +7874 @@
 {
     HMSVM_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pSvmTransient);
-    HMSVM_CPUMCTX_IMPORT_STATE(pVCpu, IEM_CPUMCTX_EXTRN_MUST_MASK | CPUMCTX_EXTRN_HWVIRT);
 
     /*
@@ -7880 +7883 @@
         hmR0SvmClearCtrlIntercept(pVCpu, pVmcb, SVM_CTRL_INTERCEPT_STGI);
 
-    VBOXSTRICTRC rcStrict;
-    bool const fSupportsNextRipSave = hmR0SvmSupportsNextRipSave(pVCpu);
+    VBOXSTRICTRC   rcStrict;
+    bool const     fSupportsNextRipSave = hmR0SvmSupportsNextRipSave(pVCpu);
+    uint64_t const fImport = CPUMCTX_EXTRN_HWVIRT;
     if (fSupportsNextRipSave)
     {
+        HMSVM_CPUMCTX_IMPORT_STATE(pVCpu, IEM_CPUMCTX_EXTRN_EXEC_DECODED_NO_MEM_MASK | fImport);
         uint8_t const cbInstr = hmR0SvmGetInstrLength(pVCpu);
         rcStrict = IEMExecDecodedStgi(pVCpu, cbInstr);
     }
     else
+    {
+        HMSVM_CPUMCTX_IMPORT_STATE(pVCpu, IEM_CPUMCTX_EXTRN_MUST_MASK | fImport);
         rcStrict = IEMExecOne(pVCpu);
+    }
 
     if (rcStrict == VINF_SUCCESS)
@@ -7908 +7916 @@
 {
     HMSVM_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pSvmTransient);
-    HMSVM_CPUMCTX_IMPORT_STATE(pVCpu, IEM_CPUMCTX_EXTRN_MUST_MASK
-                                    | CPUMCTX_EXTRN_FS   | CPUMCTX_EXTRN_GS             | CPUMCTX_EXTRN_TR
-                                    | CPUMCTX_EXTRN_LDTR | CPUMCTX_EXTRN_KERNEL_GS_BASE | CPUMCTX_EXTRN_SYSCALL_MSRS
-                                    | CPUMCTX_EXTRN_SYSENTER_MSRS);
 
 #ifdef VBOX_STRICT
@@ -7920 +7924 @@
 #endif
 
-    VBOXSTRICTRC rcStrict;
-    bool const fSupportsNextRipSave = hmR0SvmSupportsNextRipSave(pVCpu);
+    VBOXSTRICTRC   rcStrict;
+    bool const     fSupportsNextRipSave = hmR0SvmSupportsNextRipSave(pVCpu);
+    uint64_t const fImport = CPUMCTX_EXTRN_FS   | CPUMCTX_EXTRN_GS   | CPUMCTX_EXTRN_KERNEL_GS_BASE
+                           | CPUMCTX_EXTRN_TR   | CPUMCTX_EXTRN_LDTR | CPUMCTX_EXTRN_SYSCALL_MSRS
+                           | CPUMCTX_EXTRN_SYSENTER_MSRS;
     if (fSupportsNextRipSave)
     {
+        HMSVM_CPUMCTX_IMPORT_STATE(pVCpu, IEM_CPUMCTX_EXTRN_EXEC_DECODED_NO_MEM_MASK | fImport);
         uint8_t const cbInstr = hmR0SvmGetInstrLength(pVCpu);
         rcStrict = IEMExecDecodedVmload(pVCpu, cbInstr);
     }
     else
+    {
+        HMSVM_CPUMCTX_IMPORT_STATE(pVCpu, IEM_CPUMCTX_EXTRN_MUST_MASK | fImport);
         rcStrict = IEMExecOne(pVCpu);
+    }
 
     if (rcStrict == VINF_SUCCESS)
@@ -7953 +7964 @@
 {
     HMSVM_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pSvmTransient);
-    HMSVM_CPUMCTX_IMPORT_STATE(pVCpu, IEM_CPUMCTX_EXTRN_MUST_MASK);
 
 #ifdef VBOX_STRICT
@@ -7965 +7975 @@
     if (fSupportsNextRipSave)
     {
+        HMSVM_CPUMCTX_IMPORT_STATE(pVCpu, IEM_CPUMCTX_EXTRN_EXEC_DECODED_NO_MEM_MASK);
         uint8_t const cbInstr = hmR0SvmGetInstrLength(pVCpu);
         rcStrict = IEMExecDecodedVmsave(pVCpu, cbInstr);
     }
     else
+    {
+        HMSVM_CPUMCTX_IMPORT_STATE(pVCpu, IEM_CPUMCTX_EXTRN_MUST_MASK);
         rcStrict = IEMExecOne(pVCpu);
+    }
 
     if (rcStrict == VINF_IEM_RAISED_XCPT)
@@ -7987 +8001 @@
 {
     HMSVM_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pSvmTransient);
-    HMSVM_CPUMCTX_IMPORT_STATE(pVCpu, IEM_CPUMCTX_EXTRN_MUST_MASK);
 
     VBOXSTRICTRC rcStrict;
@@ -7993 +8006 @@
     if (fSupportsNextRipSave)
     {
+        HMSVM_CPUMCTX_IMPORT_STATE(pVCpu, IEM_CPUMCTX_EXTRN_EXEC_DECODED_NO_MEM_MASK);
         uint8_t const cbInstr = hmR0SvmGetInstrLength(pVCpu);
         rcStrict = IEMExecDecodedInvlpga(pVCpu, cbInstr);
     }
     else
+    {
+        HMSVM_CPUMCTX_IMPORT_STATE(pVCpu, IEM_CPUMCTX_EXTRN_MUST_MASK);
         rcStrict = IEMExecOne(pVCpu);
+    }
 
     if (rcStrict == VINF_IEM_RAISED_XCPT)
@@ -8015 +8032 @@
 {
     HMSVM_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pSvmTransient);
-    HMSVM_CPUMCTX_IMPORT_STATE(pVCpu, IEM_CPUMCTX_EXTRN_MUST_MASK | IEM_CPUMCTX_EXTRN_SVM_VMRUN_MASK);
+    HMSVM_CPUMCTX_IMPORT_STATE(pVCpu, IEM_CPUMCTX_EXTRN_SVM_VMRUN_MASK);
 
     VBOXSTRICTRC rcStrict;
@@ -8025 +8042 @@
     }
     else
-        rcStrict = IEMExecOne(pVCpu);
+        rcStrict = IEMExecOneBypassEx(pVCpu, CPUMCTX2CORE(&pVCpu->cpum.GstCtx), NULL /* pcbWritten */);
 
     if (rcStrict == VINF_SUCCESS)