VirtualBox

Changeset 73246 in vbox for trunk/src


Ignore:
Timestamp:
Jul 19, 2018 3:51:20 PM (6 years ago)
Author:
vboxsync
Message:

PGM: Working on eliminating PGMMODEDATA and the corresponding PGMCPU section so we can do mode switching in ring-0. This second part deals with shadow paging pointers and expands PGM_TYPE_NESTED & PGMMODE_NESTED into 32BIT, PAE and AMD64 variants to better map to reality at the expense of a little bit of more code. bugref:9044

Location:
trunk/src/VBox/VMM
Files:
11 edited

Legend:

Unmodified
Added
Removed

  • trunk/src/VBox/VMM/VMMAll/HMAll.cpp

    r72744 r73246  
    149149#endif /* IN_RING0 */
    150150#ifndef IN_RC
     151
    151152/**
    152153 * Flushes the guest TLB.
    … …  
    371372
    372373/**
    373  * Return the shadow paging mode for nested paging/ept
    374  *
    375  * @returns shadow paging mode
    376  * @param   pVM         The cross context VM structure.
    377  */
    378 VMM_INT_DECL(PGMMODE) HMGetShwPagingMode(PVM pVM)
    379 {
    380     Assert(HMIsNestedPagingActive(pVM));
    381     if (pVM->hm.s.svm.fSupported)
    382         return PGMMODE_NESTED;
    383 
    384     Assert(pVM->hm.s.vmx.fSupported);
    385     return PGMMODE_EPT;
    386 }
     374 * Checks if AMD-V is active.
     375 *
     376 * @returns true if AMD-V is active.
     377 * @param   pVM         The cross context VM structure.
     378 *
     379 * @remarks Works before hmR3InitFinalizeR0.
     380 */
     381VMM_INT_DECL(bool) HMIsSvmActive(PVM pVM)
     382{
     383    return pVM->hm.s.svm.fSupported && HMIsEnabled(pVM);
     384}
     385
     386
     387/**
     388 * Checks if VT-x is active.
     389 *
     390 * @returns true if AMD-V is active.
     391 * @param   pVM         The cross context VM structure.
     392 *
     393 * @remarks Works before hmR3InitFinalizeR0.
     394 */
     395VMM_INT_DECL(bool) HMIsVmxActive(PVM pVM)
     396{
     397    return pVM->hm.s.vmx.fSupported && HMIsEnabled(pVM);
     398}
     399
    387400#endif /* !IN_RC */
    388 
    389401
    390402/**

  • trunk/src/VBox/VMM/VMMAll/PGMAll.cpp

    r73200 r73246  
    258258
    259259/*
    260  * Shadow - Nested paging mode
    261  */
    262 # define PGM_SHW_TYPE               PGM_TYPE_NESTED
    263 # define PGM_SHW_NAME(name)         PGM_SHW_NAME_NESTED(name)
     260 * Shadow - 32-bit nested paging mode.
     261 */
     262# define PGM_SHW_TYPE               PGM_TYPE_NESTED_32BIT
     263# define PGM_SHW_NAME(name)         PGM_SHW_NAME_NESTED_32BIT(name)
    264264# include "PGMAllShw.h"
    265265
    … …  
    267267# define PGM_GST_TYPE               PGM_TYPE_REAL
    268268# define PGM_GST_NAME(name)         PGM_GST_NAME_REAL(name)
    269 # define PGM_BTH_NAME(name)         PGM_BTH_NAME_NESTED_REAL(name)
     269# define PGM_BTH_NAME(name)         PGM_BTH_NAME_NESTED_32BIT_REAL(name)
    270270# include "PGMGstDefs.h"
    271271# include "PGMAllBth.h"
    … …  
    277277# define PGM_GST_TYPE               PGM_TYPE_PROT
    278278# define PGM_GST_NAME(name)         PGM_GST_NAME_PROT(name)
    279 # define PGM_BTH_NAME(name)         PGM_BTH_NAME_NESTED_PROT(name)
     279# define PGM_BTH_NAME(name)         PGM_BTH_NAME_NESTED_32BIT_PROT(name)
    280280# include "PGMGstDefs.h"
    281281# include "PGMAllBth.h"
    … …  
    287287# define PGM_GST_TYPE               PGM_TYPE_32BIT
    288288# define PGM_GST_NAME(name)         PGM_GST_NAME_32BIT(name)
    289 # define PGM_BTH_NAME(name)         PGM_BTH_NAME_NESTED_32BIT(name)
     289# define PGM_BTH_NAME(name)         PGM_BTH_NAME_NESTED_32BIT_32BIT(name)
    290290# include "PGMGstDefs.h"
    291291# include "PGMAllBth.h"
    … …  
    297297# define PGM_GST_TYPE               PGM_TYPE_PAE
    298298# define PGM_GST_NAME(name)         PGM_GST_NAME_PAE(name)
    299 # define PGM_BTH_NAME(name)         PGM_BTH_NAME_NESTED_PAE(name)
     299# define PGM_BTH_NAME(name)         PGM_BTH_NAME_NESTED_32BIT_PAE(name)
    300300# include "PGMGstDefs.h"
    301301# include "PGMAllBth.h"
    … …  
    308308#  define PGM_GST_TYPE              PGM_TYPE_AMD64
    309309#  define PGM_GST_NAME(name)        PGM_GST_NAME_AMD64(name)
    310 #  define PGM_BTH_NAME(name)        PGM_BTH_NAME_NESTED_AMD64(name)
     310#  define PGM_BTH_NAME(name)        PGM_BTH_NAME_NESTED_32BIT_AMD64(name)
    311311#  include "PGMGstDefs.h"
    312312#  include "PGMAllBth.h"
    … …  
    321321
    322322/*
    323  * Shadow - EPT
     323 * Shadow - PAE nested paging mode.
     324 */
     325# define PGM_SHW_TYPE               PGM_TYPE_NESTED_PAE
     326# define PGM_SHW_NAME(name)         PGM_SHW_NAME_NESTED_PAE(name)
     327# include "PGMAllShw.h"
     328
     329/* Guest - real mode */
     330# define PGM_GST_TYPE               PGM_TYPE_REAL
     331# define PGM_GST_NAME(name)         PGM_GST_NAME_REAL(name)
     332# define PGM_BTH_NAME(name)         PGM_BTH_NAME_NESTED_PAE_REAL(name)
     333# include "PGMGstDefs.h"
     334# include "PGMAllBth.h"
     335# undef PGM_BTH_NAME
     336# undef PGM_GST_TYPE
     337# undef PGM_GST_NAME
     338
     339/* Guest - protected mode */
     340# define PGM_GST_TYPE               PGM_TYPE_PROT
     341# define PGM_GST_NAME(name)         PGM_GST_NAME_PROT(name)
     342# define PGM_BTH_NAME(name)         PGM_BTH_NAME_NESTED_PAE_PROT(name)
     343# include "PGMGstDefs.h"
     344# include "PGMAllBth.h"
     345# undef PGM_BTH_NAME
     346# undef PGM_GST_TYPE
     347# undef PGM_GST_NAME
     348
     349/* Guest - 32-bit mode */
     350# define PGM_GST_TYPE               PGM_TYPE_32BIT
     351# define PGM_GST_NAME(name)         PGM_GST_NAME_32BIT(name)
     352# define PGM_BTH_NAME(name)         PGM_BTH_NAME_NESTED_PAE_32BIT(name)
     353# include "PGMGstDefs.h"
     354# include "PGMAllBth.h"
     355# undef PGM_BTH_NAME
     356# undef PGM_GST_TYPE
     357# undef PGM_GST_NAME
     358
     359/* Guest - PAE mode */
     360# define PGM_GST_TYPE               PGM_TYPE_PAE
     361# define PGM_GST_NAME(name)         PGM_GST_NAME_PAE(name)
     362# define PGM_BTH_NAME(name)         PGM_BTH_NAME_NESTED_PAE_PAE(name)
     363# include "PGMGstDefs.h"
     364# include "PGMAllBth.h"
     365# undef PGM_BTH_NAME
     366# undef PGM_GST_TYPE
     367# undef PGM_GST_NAME
     368
     369# ifdef VBOX_WITH_64_BITS_GUESTS
     370/* Guest - AMD64 mode */
     371#  define PGM_GST_TYPE              PGM_TYPE_AMD64
     372#  define PGM_GST_NAME(name)        PGM_GST_NAME_AMD64(name)
     373#  define PGM_BTH_NAME(name)        PGM_BTH_NAME_NESTED_PAE_AMD64(name)
     374#  include "PGMGstDefs.h"
     375#  include "PGMAllBth.h"
     376#  undef PGM_BTH_NAME
     377#  undef PGM_GST_TYPE
     378#  undef PGM_GST_NAME
     379# endif /* VBOX_WITH_64_BITS_GUESTS */
     380
     381# undef PGM_SHW_TYPE
     382# undef PGM_SHW_NAME
     383
     384
     385/*
     386 * Shadow - AMD64 nested paging mode.
     387 */
     388# define PGM_SHW_TYPE               PGM_TYPE_NESTED_AMD64
     389# define PGM_SHW_NAME(name)         PGM_SHW_NAME_NESTED_AMD64(name)
     390# include "PGMAllShw.h"
     391
     392/* Guest - real mode */
     393# define PGM_GST_TYPE               PGM_TYPE_REAL
     394# define PGM_GST_NAME(name)         PGM_GST_NAME_REAL(name)
     395# define PGM_BTH_NAME(name)         PGM_BTH_NAME_NESTED_AMD64_REAL(name)
     396# include "PGMGstDefs.h"
     397# include "PGMAllBth.h"
     398# undef PGM_BTH_NAME
     399# undef PGM_GST_TYPE
     400# undef PGM_GST_NAME
     401
     402/* Guest - protected mode */
     403# define PGM_GST_TYPE               PGM_TYPE_PROT
     404# define PGM_GST_NAME(name)         PGM_GST_NAME_PROT(name)
     405# define PGM_BTH_NAME(name)         PGM_BTH_NAME_NESTED_AMD64_PROT(name)
     406# include "PGMGstDefs.h"
     407# include "PGMAllBth.h"
     408# undef PGM_BTH_NAME
     409# undef PGM_GST_TYPE
     410# undef PGM_GST_NAME
     411
     412/* Guest - 32-bit mode */
     413# define PGM_GST_TYPE               PGM_TYPE_32BIT
     414# define PGM_GST_NAME(name)         PGM_GST_NAME_32BIT(name)
     415# define PGM_BTH_NAME(name)         PGM_BTH_NAME_NESTED_AMD64_32BIT(name)
     416# include "PGMGstDefs.h"
     417# include "PGMAllBth.h"
     418# undef PGM_BTH_NAME
     419# undef PGM_GST_TYPE
     420# undef PGM_GST_NAME
     421
     422/* Guest - PAE mode */
     423# define PGM_GST_TYPE               PGM_TYPE_PAE
     424# define PGM_GST_NAME(name)         PGM_GST_NAME_PAE(name)
     425# define PGM_BTH_NAME(name)         PGM_BTH_NAME_NESTED_AMD64_PAE(name)
     426# include "PGMGstDefs.h"
     427# include "PGMAllBth.h"
     428# undef PGM_BTH_NAME
     429# undef PGM_GST_TYPE
     430# undef PGM_GST_NAME
     431
     432# ifdef VBOX_WITH_64_BITS_GUESTS
     433/* Guest - AMD64 mode */
     434#  define PGM_GST_TYPE              PGM_TYPE_AMD64
     435#  define PGM_GST_NAME(name)        PGM_GST_NAME_AMD64(name)
     436#  define PGM_BTH_NAME(name)        PGM_BTH_NAME_NESTED_AMD64_AMD64(name)
     437#  include "PGMGstDefs.h"
     438#  include "PGMAllBth.h"
     439#  undef PGM_BTH_NAME
     440#  undef PGM_GST_TYPE
     441#  undef PGM_GST_NAME
     442# endif /* VBOX_WITH_64_BITS_GUESTS */
     443
     444# undef PGM_SHW_TYPE
     445# undef PGM_SHW_NAME
     446
     447
     448/*
     449 * Shadow - EPT.
    324450 */
    325451# define PGM_SHW_TYPE               PGM_TYPE_EPT
    … …  
    400526PGMMODEDATAGST const g_aPgmGuestModeData[PGM_GUEST_MODE_DATA_ARRAY_SIZE] =
    401527{
    402     /* NULL entry. */
    403     { UINT32_MAX, NULL, NULL, NULL, NULL, NULL },
     528    { UINT32_MAX, NULL, NULL, NULL, NULL, NULL }, /* 0 */
    404529    {
    405530        PGM_TYPE_REAL,
    … …  
    472597
    473598
     599/** The shadow mode data array. */
     600PGMMODEDATASHW const g_aPgmShadowModeData[PGM_SHADOW_MODE_DATA_ARRAY_SIZE] =
     601{
     602    { UINT8_MAX, NULL, NULL, NULL, NULL, NULL }, /* 0 */
     603    { UINT8_MAX, NULL, NULL, NULL, NULL, NULL }, /* PGM_TYPE_REAL */
     604    { UINT8_MAX, NULL, NULL, NULL, NULL, NULL }, /* PGM_TYPE_PROT */
     605    {
     606        PGM_TYPE_32BIT,
     607        PGM_SHW_NAME_32BIT(GetPage),
     608        PGM_SHW_NAME_32BIT(ModifyPage),
     609#ifdef IN_RING3
     610        PGM_SHW_NAME_32BIT(Enter),
     611        PGM_SHW_NAME_32BIT(Exit),
     612        PGM_SHW_NAME_32BIT(Relocate),
     613#else
     614        NULL, NULL, NULL,
     615#endif
     616    },
     617    {
     618        PGM_TYPE_PAE,
     619        PGM_SHW_NAME_PAE(GetPage),
     620        PGM_SHW_NAME_PAE(ModifyPage),
     621#ifdef IN_RING3
     622        PGM_SHW_NAME_PAE(Enter),
     623        PGM_SHW_NAME_PAE(Exit),
     624        PGM_SHW_NAME_PAE(Relocate),
     625#else
     626        NULL, NULL, NULL,
     627#endif
     628    },
     629#ifndef IN_RC
     630    {
     631        PGM_TYPE_AMD64,
     632        PGM_SHW_NAME_AMD64(GetPage),
     633        PGM_SHW_NAME_AMD64(ModifyPage),
     634# ifdef IN_RING3
     635        PGM_SHW_NAME_AMD64(Enter),
     636        PGM_SHW_NAME_AMD64(Exit),
     637        PGM_SHW_NAME_AMD64(Relocate),
     638# else
     639        NULL, NULL, NULL,
     640# endif
     641    },
     642    {
     643        PGM_TYPE_NESTED_32BIT,
     644        PGM_SHW_NAME_NESTED_32BIT(GetPage),
     645        PGM_SHW_NAME_NESTED_32BIT(ModifyPage),
     646# ifdef IN_RING3
     647        PGM_SHW_NAME_NESTED_32BIT(Enter),
     648        PGM_SHW_NAME_NESTED_32BIT(Exit),
     649        PGM_SHW_NAME_NESTED_32BIT(Relocate),
     650# else
     651        NULL, NULL, NULL,
     652# endif
     653    },
     654    {
     655        PGM_TYPE_NESTED_PAE,
     656        PGM_SHW_NAME_NESTED_PAE(GetPage),
     657        PGM_SHW_NAME_NESTED_PAE(ModifyPage),
     658# ifdef IN_RING3
     659        PGM_SHW_NAME_NESTED_PAE(Enter),
     660        PGM_SHW_NAME_NESTED_PAE(Exit),
     661        PGM_SHW_NAME_NESTED_PAE(Relocate),
     662# else
     663        NULL, NULL, NULL,
     664# endif
     665    },
     666    {
     667        PGM_TYPE_NESTED_AMD64,
     668        PGM_SHW_NAME_NESTED_AMD64(GetPage),
     669        PGM_SHW_NAME_NESTED_AMD64(ModifyPage),
     670# ifdef IN_RING3
     671        PGM_SHW_NAME_NESTED_AMD64(Enter),
     672        PGM_SHW_NAME_NESTED_AMD64(Exit),
     673        PGM_SHW_NAME_NESTED_AMD64(Relocate),
     674# else
     675        NULL, NULL, NULL,
     676# endif
     677    },
     678    {
     679        PGM_TYPE_EPT,
     680        PGM_SHW_NAME_EPT(GetPage),
     681        PGM_SHW_NAME_EPT(ModifyPage),
     682# ifdef IN_RING3
     683        PGM_SHW_NAME_EPT(Enter),
     684        PGM_SHW_NAME_EPT(Exit),
     685        PGM_SHW_NAME_EPT(Relocate),
     686# else
     687        NULL, NULL, NULL,
     688# endif
     689    },
     690#endif /* IN_RC */
     691};
     692
     693
    474694#ifndef IN_RING3
    475695/**
    … …  
    9121132VMMDECL(int) PGMShwGetPage(PVMCPU pVCpu, RTGCPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys)
    9131133{
    914     pgmLock(pVCpu->CTX_SUFF(pVM));
    915     int rc = PGM_SHW_PFN(GetPage, pVCpu)(pVCpu, GCPtr, pfFlags, pHCPhys);
    916     pgmUnlock(pVCpu->CTX_SUFF(pVM));
     1134    PVM pVM = pVCpu->CTX_SUFF(pVM);
     1135    pgmLock(pVM);
     1136
     1137    uintptr_t idxShw = pVCpu->pgm.s.idxShadowModeData;
     1138    AssertReturn(idxShw < RT_ELEMENTS(g_aPgmShadowModeData), VERR_PGM_MODE_IPE);
     1139    AssertReturn(g_aPgmShadowModeData[idxShw].pfnGetPage, VERR_PGM_MODE_IPE);
     1140    int rc = g_aPgmShadowModeData[idxShw].pfnGetPage(pVCpu, GCPtr, pfFlags, pHCPhys);
     1141
     1142    pgmUnlock(pVM);
    9171143    return rc;
    9181144}
    … …  
    9421168    PVM pVM = pVCpu->CTX_SUFF(pVM);
    9431169    pgmLock(pVM);
    944     int rc = PGM_SHW_PFN(ModifyPage, pVCpu)(pVCpu, GCPtr, PAGE_SIZE, fFlags, fMask, fOpFlags);
     1170
     1171    uintptr_t idxShw = pVCpu->pgm.s.idxShadowModeData;
     1172    AssertReturn(idxShw < RT_ELEMENTS(g_aPgmShadowModeData), VERR_PGM_MODE_IPE);
     1173    AssertReturn(g_aPgmShadowModeData[idxShw].pfnModifyPage, VERR_PGM_MODE_IPE);
     1174    int rc = g_aPgmShadowModeData[idxShw].pfnModifyPage(pVCpu, GCPtr, PAGE_SIZE, fFlags, fMask, fOpFlags);
     1175
    9451176    pgmUnlock(pVM);
    9461177    return rc;
    … …  
    15441775        case PGMMODE_AMD64_NX:
    15451776#endif
    1546         case PGMMODE_NESTED:
     1777        case PGMMODE_NESTED_32BIT:
     1778        case PGMMODE_NESTED_PAE:
     1779        case PGMMODE_NESTED_AMD64:
    15471780        case PGMMODE_EPT:
    15481781        default:
    … …  
    20842317            return pVM->pgm.s.HCPhysInterPaePML4;
    20852318
     2319        case PGMMODE_NESTED_32BIT:
     2320        case PGMMODE_NESTED_PAE:
     2321        case PGMMODE_NESTED_AMD64:
    20862322        case PGMMODE_EPT:
    2087         case PGMMODE_NESTED:
    20882323            return 0; /* not relevant */
    20892324
    … …  
    26112846    switch (enmMode)
    26122847    {
    2613         case PGMMODE_REAL:      return "Real";
    2614         case PGMMODE_PROTECTED: return "Protected";
    2615         case PGMMODE_32_BIT:    return "32-bit";
    2616         case PGMMODE_PAE:       return "PAE";
    2617         case PGMMODE_PAE_NX:    return "PAE+NX";
    2618         case PGMMODE_AMD64:     return "AMD64";
    2619         case PGMMODE_AMD64_NX:  return "AMD64+NX";
    2620         case PGMMODE_NESTED:    return "Nested";
    2621         case PGMMODE_EPT:       return "EPT";
    2622         default:                return "unknown mode value";
     2848        case PGMMODE_REAL:          return "Real";
     2849        case PGMMODE_PROTECTED:     return "Protected";
     2850        case PGMMODE_32_BIT:        return "32-bit";
     2851        case PGMMODE_PAE:           return "PAE";
     2852        case PGMMODE_PAE_NX:        return "PAE+NX";
     2853        case PGMMODE_AMD64:         return "AMD64";
     2854        case PGMMODE_AMD64_NX:      return "AMD64+NX";
     2855        case PGMMODE_NESTED_32BIT:  return "Nested-32";
     2856        case PGMMODE_NESTED_PAE:    return "Nested-PAE";
     2857        case PGMMODE_NESTED_AMD64:  return "Nested-AMD64";
     2858        case PGMMODE_EPT:           return "EPT";
     2859        default:                    return "unknown mode value";
    26232860    }
    26242861}
    … …  
    30463283
    30473284#endif /* VBOX_STRICT */
     3285

  • trunk/src/VBox/VMM/VMMAll/PGMAllBth.h

    r70977 r73246  
    33 * VBox - Page Manager, Shadow+Guest Paging Template - All context code.
    44 *
    5  * @remarks The nested page tables on AMD makes use of PGM_SHW_TYPE in
    6  *          {PGM_TYPE_AMD64, PGM_TYPE_PAE and PGM_TYPE_32BIT} and PGM_GST_TYPE
    7  *          set to PGM_TYPE_PROT.  Half of the code in this file is not
    8  *          exercised with PGM_SHW_TYPE set to PGM_TYPE_NESTED.
    9  *
    105 * @remarks Extended page tables (intel) are built with PGM_GST_TYPE set to
    116 *          PGM_TYPE_PROT (and PGM_SHW_TYPE set to PGM_TYPE_EPT).
     7 *          bird: WTF does this mean these days?  Looking at PGMAll.cpp it's
    128 *
    139 * @remarks This file is one big \#ifdef-orgy!
    … …  
    6258 * remove redundant checks inside functions.
    6359 */
    64 #if      PGM_GST_TYPE == PGM_TYPE_PAE && PGM_SHW_TYPE != PGM_TYPE_PAE && PGM_SHW_TYPE != PGM_TYPE_NESTED && PGM_SHW_TYPE != PGM_TYPE_EPT
     60#if      PGM_GST_TYPE == PGM_TYPE_PAE && PGM_SHW_TYPE != PGM_TYPE_PAE && !PGM_TYPE_IS_NESTED_OR_EPT(PGM_SHW_TYPE)
    6561# error "Invalid combination; PAE guest implies PAE shadow"
    6662#endif
    6763
    6864#if     (PGM_GST_TYPE == PGM_TYPE_REAL || PGM_GST_TYPE == PGM_TYPE_PROT) \
    69     && !(PGM_SHW_TYPE == PGM_TYPE_32BIT || PGM_SHW_TYPE == PGM_TYPE_PAE || PGM_SHW_TYPE == PGM_TYPE_AMD64 || PGM_SHW_TYPE == PGM_TYPE_NESTED || PGM_SHW_TYPE == PGM_TYPE_EPT)
     65    && !(PGM_SHW_TYPE == PGM_TYPE_32BIT || PGM_SHW_TYPE == PGM_TYPE_PAE || PGM_SHW_TYPE == PGM_TYPE_AMD64 || PGM_TYPE_IS_NESTED_OR_EPT(PGM_SHW_TYPE))
    7066# error "Invalid combination; real or protected mode without paging implies 32 bits or PAE shadow paging."
    7167#endif
    7268
    7369#if     (PGM_GST_TYPE == PGM_TYPE_32BIT || PGM_GST_TYPE == PGM_TYPE_PAE) \
    74     && !(PGM_SHW_TYPE == PGM_TYPE_32BIT || PGM_SHW_TYPE == PGM_TYPE_PAE || PGM_SHW_TYPE == PGM_TYPE_NESTED || PGM_SHW_TYPE == PGM_TYPE_EPT)
     70    && !(PGM_SHW_TYPE == PGM_TYPE_32BIT || PGM_SHW_TYPE == PGM_TYPE_PAE || PGM_TYPE_IS_NESTED_OR_EPT(PGM_SHW_TYPE))
    7571# error "Invalid combination; 32 bits guest paging or PAE implies 32 bits or PAE shadow paging."
    7672#endif
    7773
    78 #if    (PGM_GST_TYPE == PGM_TYPE_AMD64 && PGM_SHW_TYPE != PGM_TYPE_AMD64 && PGM_SHW_TYPE != PGM_TYPE_NESTED && PGM_SHW_TYPE != PGM_TYPE_EPT) \
     74#if    (PGM_GST_TYPE == PGM_TYPE_AMD64 && PGM_SHW_TYPE != PGM_TYPE_AMD64 && !PGM_TYPE_IS_NESTED_OR_EPT(PGM_SHW_TYPE)) \
    7975    || (PGM_SHW_TYPE == PGM_TYPE_AMD64 && PGM_GST_TYPE != PGM_TYPE_AMD64 && PGM_GST_TYPE != PGM_TYPE_PROT)
    8076# error "Invalid combination; AMD64 guest implies AMD64 shadow and vice versa"
    … …  
    138134
    139135
     136#if !PGM_TYPE_IS_NESTED(PGM_SHW_TYPE)
    140137/**
    141138 * Deal with a guest page fault.
    … …  
    437434    return rcStrict;
    438435} /* if any kind of handler */
     436# endif /* !PGM_TYPE_IS_NESTED(PGM_SHW_TYPE) */
    439437
    440438
    … …  
    458456# if  (   PGM_GST_TYPE == PGM_TYPE_32BIT || PGM_GST_TYPE == PGM_TYPE_REAL || PGM_GST_TYPE == PGM_TYPE_PROT \
    459457       || PGM_GST_TYPE == PGM_TYPE_PAE   || PGM_GST_TYPE == PGM_TYPE_AMD64) \
    460     && PGM_SHW_TYPE != PGM_TYPE_NESTED \
     458    && !PGM_TYPE_IS_NESTED(PGM_SHW_TYPE) \
    461459    && (PGM_SHW_TYPE != PGM_TYPE_EPT || PGM_GST_TYPE == PGM_TYPE_PROT)
    462460    int rc;
    … …  
    12131211{
    12141212#if    PGM_WITH_PAGING(PGM_GST_TYPE, PGM_SHW_TYPE)   \
    1215     && PGM_SHW_TYPE != PGM_TYPE_NESTED \
    1216     && PGM_SHW_TYPE != PGM_TYPE_EPT
     1213    && !PGM_TYPE_IS_NESTED_OR_EPT(PGM_SHW_TYPE)
    12171214    int rc;
    12181215    PVM pVM = pVCpu->CTX_SUFF(pVM);
    … …  
    19361933    PGM_LOCK_ASSERT_OWNER(pVM);
    19371934
    1938 #if    (   PGM_GST_TYPE == PGM_TYPE_32BIT  \
    1939         || PGM_GST_TYPE == PGM_TYPE_PAE    \
     1935#if    (   PGM_GST_TYPE == PGM_TYPE_32BIT \
     1936        || PGM_GST_TYPE == PGM_TYPE_PAE \
    19401937        || PGM_GST_TYPE == PGM_TYPE_AMD64) \
    1941     && PGM_SHW_TYPE != PGM_TYPE_NESTED     \
    1942     && PGM_SHW_TYPE != PGM_TYPE_EPT
     1938    && !PGM_TYPE_IS_NESTED_OR_EPT(PGM_SHW_TYPE)
    19431939
    19441940    /*
    … …  
    22762272
    22772273#elif (PGM_GST_TYPE == PGM_TYPE_REAL || PGM_GST_TYPE == PGM_TYPE_PROT) \
    2278     && PGM_SHW_TYPE != PGM_TYPE_NESTED \
     2274    && !PGM_TYPE_IS_NESTED(PGM_SHW_TYPE) \
    22792275    && (PGM_SHW_TYPE != PGM_TYPE_EPT || PGM_GST_TYPE == PGM_TYPE_PROT) \
    22802276    && !defined(IN_RC)
    … …  
    26872683     || PGM_GST_TYPE == PGM_TYPE_PAE \
    26882684     || PGM_GST_TYPE == PGM_TYPE_AMD64) \
    2689  && PGM_SHW_TYPE != PGM_TYPE_NESTED \
    2690  && PGM_SHW_TYPE != PGM_TYPE_EPT
    2691 
     2685 && !PGM_TYPE_IS_NESTED_OR_EPT(PGM_SHW_TYPE)
    26922686    int             rc       = VINF_SUCCESS;
    26932687
    … …  
    31513145
    31523146#elif (PGM_GST_TYPE == PGM_TYPE_REAL || PGM_GST_TYPE == PGM_TYPE_PROT) \
    3153     && PGM_SHW_TYPE != PGM_TYPE_NESTED \
     3147    && !PGM_TYPE_IS_NESTED(PGM_SHW_TYPE) \
    31543148    && (PGM_SHW_TYPE != PGM_TYPE_EPT || PGM_GST_TYPE == PGM_TYPE_PROT) \
    31553149    && !defined(IN_RC)
    … …  
    33913385     || PGM_GST_TYPE == PGM_TYPE_PAE \
    33923386     || PGM_GST_TYPE == PGM_TYPE_AMD64 ) \
    3393  && PGM_SHW_TYPE != PGM_TYPE_NESTED \
    3394  && PGM_SHW_TYPE != PGM_TYPE_EPT
    3395 
     3387 && !PGM_TYPE_IS_NESTED_OR_EPT(PGM_SHW_TYPE)
    33963388    /*
    33973389     * Check that all Guest levels thru the PDE are present, getting the
    … …  
    35063498    return rc;
    35073499
    3508 #elif PGM_SHW_TYPE == PGM_TYPE_NESTED || PGM_SHW_TYPE == PGM_TYPE_EPT
     3500#elif PGM_TYPE_IS_NESTED_OR_EPT(PGM_SHW_TYPE)
    35093501    NOREF(pVCpu); NOREF(GCPtrPage);
    35103502    return VINF_SUCCESS; /* ignore */
    … …  
    35413533       || PGM_GST_TYPE == PGM_TYPE_PAE \
    35423534       || PGM_GST_TYPE == PGM_TYPE_AMD64 ) \
    3543     && PGM_SHW_TYPE != PGM_TYPE_NESTED \
    3544     && PGM_SHW_TYPE != PGM_TYPE_EPT
     3535    && !PGM_TYPE_IS_NESTED_OR_EPT(PGM_SHW_TYPE)
    35453536
    35463537# ifdef VBOX_WITH_RAW_MODE_NOT_R0
    … …  
    37003691    return rc;
    37013692
    3702 #else  /* PGM_SHW_TYPE == PGM_TYPE_EPT || PGM_SHW_TYPE == PGM_TYPE_NESTED */
     3693#else  /* PGM_TYPE_IS_NESTED_OR_EPT(PGM_SHW_TYPE) */
    37033694
    37043695    AssertReleaseMsgFailed(("Shw=%d Gst=%d is not implemented!\n", PGM_GST_TYPE, PGM_SHW_TYPE));
    37053696    return VERR_PGM_NOT_USED_IN_MODE;
    3706 #endif /* PGM_SHW_TYPE == PGM_TYPE_EPT || PGM_SHW_TYPE == PGM_TYPE_NESTED */
     3697#endif /* PGM_TYPE_IS_NESTED_OR_EPT(PGM_SHW_TYPE) */
    37073698}
    37083699
    … …  
    37293720    LogFlow(("SyncCR3 FF=%d fGlobal=%d\n", !!VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3), fGlobal));
    37303721
    3731 #if PGM_SHW_TYPE != PGM_TYPE_NESTED && PGM_SHW_TYPE != PGM_TYPE_EPT
     3722#if !PGM_TYPE_IS_NESTED_OR_EPT(PGM_SHW_TYPE)
    37323723
    37333724    pgmLock(pVM);
    … …  
    37543745#endif /* !NESTED && !EPT */
    37553746
    3756 #if PGM_SHW_TYPE == PGM_TYPE_NESTED || PGM_SHW_TYPE == PGM_TYPE_EPT
     3747#if PGM_TYPE_IS_NESTED_OR_EPT(PGM_SHW_TYPE)
    37573748    /*
    37583749     * Nested / EPT - almost no work.
    … …  
    37693760    return VINF_SUCCESS;
    37703761
    3771 #else /* PGM_SHW_TYPE != PGM_TYPE_NESTED && PGM_SHW_TYPE != PGM_TYPE_EPT && PGM_SHW_TYPE != PGM_TYPE_AMD64 */
     3762#else /* !PGM_TYPE_IS_NESTED_OR_EPT(PGM_SHW_TYPE) && PGM_SHW_TYPE != PGM_TYPE_AMD64 */
    37723763
    37733764#  ifndef PGM_WITHOUT_MAPPINGS
    … …  
    37963787#  endif
    37973788    return VINF_SUCCESS;
    3798 #endif /* PGM_SHW_TYPE != PGM_TYPE_NESTED && PGM_SHW_TYPE != PGM_TYPE_EPT && PGM_SHW_TYPE != PGM_TYPE_AMD64 */
     3789#endif /* !PGM_TYPE_IS_NESTED_OR_EPT(PGM_SHW_TYPE) && PGM_SHW_TYPE != PGM_TYPE_AMD64 */
    37993790}
    38003791
    … …  
    38213812{
    38223813    NOREF(pVCpu); NOREF(cr3); NOREF(cr4); NOREF(GCPtr); NOREF(cb);
    3823 #if PGM_SHW_TYPE == PGM_TYPE_NESTED || PGM_SHW_TYPE == PGM_TYPE_EPT
     3814#if PGM_TYPE_IS_NESTED_OR_EPT(PGM_SHW_TYPE)
    38243815    return 0;
    38253816#else
    … …  
    45634554# endif /* GST is in {32BIT, PAE, AMD64} */
    45644555    return cErrors;
    4565 #endif /* PGM_SHW_TYPE != PGM_TYPE_NESTED && PGM_SHW_TYPE != PGM_TYPE_EPT */
     4556#endif /* !PGM_TYPE_IS_NESTED_OR_EPT(PGM_SHW_TYPE) */
    45664557}
    45674558#endif /* VBOX_STRICT */
    … …  
    48934884    return rc;
    48944885}
     4886

  • trunk/src/VBox/VMM/VMMAll/PGMAllShw.h

    r69474 r73246  
    5353#undef SHW_PDPE_PG_MASK
    5454
    55 #if PGM_SHW_TYPE == PGM_TYPE_32BIT
     55#if PGM_SHW_TYPE == PGM_TYPE_32BIT || PGM_SHW_TYPE == PGM_TYPE_NESTED_32BIT
    5656# define SHWPT                          X86PT
    5757# define PSHWPT                         PX86PT
    … …  
    151151# define SHW_PT_MASK                    X86_PT_PAE_MASK
    152152
    153 # if PGM_SHW_TYPE == PGM_TYPE_AMD64
     153# if PGM_SHW_TYPE == PGM_TYPE_AMD64 || PGM_SHW_TYPE == PGM_TYPE_NESTED_AMD64
    154154#  define SHW_PDPT_SHIFT                X86_PDPT_SHIFT
    155155#  define SHW_PDPT_MASK                 X86_PDPT_MASK_AMD64
    … …  
    157157#  define SHW_TOTAL_PD_ENTRIES          (X86_PG_AMD64_ENTRIES * X86_PG_AMD64_PDPE_ENTRIES)
    158158
    159 # else /* 32 bits PAE mode */
     159# elif PGM_SHW_TYPE == PGM_TYPE_PAE || PGM_SHW_TYPE == PGM_TYPE_NESTED_PAE
    160160#  define SHW_PDPT_SHIFT                X86_PDPT_SHIFT
    161161#  define SHW_PDPT_MASK                 X86_PDPT_MASK_PAE
    … …  
    163163#  define SHW_TOTAL_PD_ENTRIES          (X86_PG_PAE_ENTRIES * X86_PG_PAE_PDPE_ENTRIES)
    164164
     165# else
     166#  error "Misconfigured PGM_SHW_TYPE or something..."
    165167# endif
    166168#endif
    … …  
    174176PGM_SHW_DECL(int, GetPage)(PVMCPU pVCpu, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys);
    175177PGM_SHW_DECL(int, ModifyPage)(PVMCPU pVCpu, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask, uint32_t fOpFlags);
     178#ifdef IN_RING3  /* for now */
     179PGM_SHW_DECL(int, Enter)(PVMCPU pVCpu, bool fIs64BitsPagingMode);
     180PGM_SHW_DECL(int, Exit)(PVMCPU pVCpu);
     181PGM_SHW_DECL(int, Relocate)(PVMCPU pVCpu, RTGCPTR offDelta);
     182#endif
    176183RT_C_DECLS_END
    177184
    … …  
    191198PGM_SHW_DECL(int, GetPage)(PVMCPU pVCpu, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys)
    192199{
    193 #if PGM_SHW_TYPE == PGM_TYPE_NESTED
    194     NOREF(pVCpu); NOREF(GCPtr); NOREF(pfFlags); NOREF(pHCPhys);
    195     return VERR_PAGE_TABLE_NOT_PRESENT;
    196 
    197 #else /* PGM_SHW_TYPE != PGM_TYPE_NESTED && PGM_SHW_TYPE != PGM_TYPE_EPT */
    198200    PVM pVM = pVCpu->CTX_SUFF(pVM);
    199201
    … …  
    203205     * Get the PDE.
    204206     */
    205 # if PGM_SHW_TYPE == PGM_TYPE_AMD64
     207#if PGM_SHW_TYPE == PGM_TYPE_AMD64 || PGM_SHW_TYPE == PGM_TYPE_NESTED_AMD64
    206208    X86PDEPAE Pde;
    207209
    … …  
    235237    Pde.n.u1NoExecute |= Pml4e.n.u1NoExecute | Pdpe.lm.u1NoExecute;
    236238
    237 # elif PGM_SHW_TYPE == PGM_TYPE_PAE
     239#elif PGM_SHW_TYPE == PGM_TYPE_PAE || PGM_SHW_TYPE == PGM_TYPE_NESTED_PAE
    238240    X86PDEPAE       Pde = pgmShwGetPaePDE(pVCpu, GCPtr);
    239241
    240 # elif PGM_SHW_TYPE == PGM_TYPE_EPT
     242#elif PGM_SHW_TYPE == PGM_TYPE_EPT
    241243    const unsigned  iPd = ((GCPtr >> SHW_PD_SHIFT) & SHW_PD_MASK);
    242244    PEPTPD          pPDDst;
    … …  
    252254    Pde = pPDDst->a[iPd];
    253255
    254 # else /* PGM_TYPE_32BIT */
     256#elif PGM_SHW_TYPE == PGM_TYPE_32BIT || PGM_SHW_TYPE == PGM_TYPE_NESTED_32BIT
    255257    X86PDE          Pde = pgmShwGet32BitPDE(pVCpu, GCPtr);
    256 # endif
     258#else
     259# error "Misconfigured PGM_SHW_TYPE or something..."
     260#endif
    257261    if (!Pde.n.u1Present)
    258262        return VERR_PAGE_TABLE_NOT_PRESENT;
    259263
    260     /** Deal with large pages. */
     264    /* Deal with large pages. */
    261265    if (Pde.b.u1Size)
    262266    {
    … …  
    269273        {
    270274            *pfFlags = (Pde.u & ~SHW_PDE_PG_MASK);
    271 # if PGM_WITH_NX(PGM_SHW_TYPE, PGM_SHW_TYPE)    /** @todo why do we have to check the guest state here? */
    272             if ((Pde.u & X86_PTE_PAE_NX) && CPUMIsGuestNXEnabled(pVCpu))
     275#if PGM_WITH_NX(PGM_SHW_TYPE, PGM_SHW_TYPE) || PGM_SHW_TYPE == PGM_TYPE_NESTED_PAE || PGM_SHW_TYPE == PGM_TYPE_NESTED_AMD64
     276            if (   (Pde.u & X86_PTE_PAE_NX)
     277# if PGM_WITH_NX(PGM_SHW_TYPE, PGM_SHW_TYPE)
     278                && CPUMIsGuestNXEnabled(pVCpu) /** @todo why do we have to check the guest state here? */
     279# endif
     280               )
    273281                *pfFlags |= X86_PTE_PAE_NX;
    274 # endif
     282#endif
    275283        }
    276284
    … …  
    293301    else /* mapping: */
    294302    {
    295 # if    PGM_SHW_TYPE == PGM_TYPE_AMD64 \
    296      || PGM_SHW_TYPE == PGM_TYPE_EPT \
    297      || defined(PGM_WITHOUT_MAPPINGS)
     303#if  PGM_SHW_TYPE == PGM_TYPE_AMD64 \
     304  || PGM_SHW_TYPE == PGM_TYPE_EPT \
     305  || defined(PGM_WITHOUT_MAPPINGS)
    298306        AssertFailed(); /* can't happen */
    299307        pPT = NULL;     /* shut up MSC */
    300 # else
     308#else
    301309        Assert(pgmMapAreMappingsEnabled(pVM));
    302310
    303311        PPGMMAPPING pMap = pgmGetMapping(pVM, (RTGCPTR)GCPtr);
    304312        AssertMsgReturn(pMap, ("GCPtr=%RGv\n", GCPtr), VERR_PGM_MAPPING_IPE);
    305 #  if PGM_SHW_TYPE == PGM_TYPE_32BIT
     313# if PGM_SHW_TYPE == PGM_TYPE_32BIT || PGM_SHW_TYPE == PGM_TYPE_NESTED_32BIT
    306314        pPT = pMap->aPTs[(GCPtr - pMap->GCPtr) >> X86_PD_SHIFT].CTX_SUFF(pPT);
    307 #  else /* PAE */
     315# else /* PAE */
    308316        pPT = pMap->aPTs[(GCPtr - pMap->GCPtr) >> X86_PD_SHIFT].CTX_SUFF(paPaePTs);
    309 #  endif
    310317# endif
     318#endif
    311319    }
    312320    const unsigned  iPt = (GCPtr >> SHW_PT_SHIFT) & SHW_PT_MASK;
    … …  
    324332        *pfFlags = (SHW_PTE_GET_U(Pte) & ~SHW_PTE_PG_MASK)
    325333                 & ((Pde.u & (X86_PTE_RW | X86_PTE_US)) | ~(uint64_t)(X86_PTE_RW | X86_PTE_US));
    326 # if PGM_WITH_NX(PGM_SHW_TYPE, PGM_SHW_TYPE) /** @todo why do we have to check the guest state here? */
     334
     335#if PGM_WITH_NX(PGM_SHW_TYPE, PGM_SHW_TYPE) || PGM_SHW_TYPE == PGM_TYPE_NESTED_PAE || PGM_SHW_TYPE == PGM_TYPE_NESTED_AMD64
    327336        /* The NX bit is determined by a bitwise OR between the PT and PD */
    328         if (((SHW_PTE_GET_U(Pte) | Pde.u) & X86_PTE_PAE_NX) && CPUMIsGuestNXEnabled(pVCpu))
     337        if (   ((SHW_PTE_GET_U(Pte) | Pde.u) & X86_PTE_PAE_NX)
     338# if PGM_WITH_NX(PGM_SHW_TYPE, PGM_SHW_TYPE)
     339            && CPUMIsGuestNXEnabled(pVCpu) /** @todo why do we have to check the guest state here? */
     340# endif
     341           )
    329342            *pfFlags |= X86_PTE_PAE_NX;
    330 # endif
     343#endif
    331344    }
    332345
    … …  
    335348
    336349    return VINF_SUCCESS;
    337 #endif /* PGM_SHW_TYPE != PGM_TYPE_NESTED */
    338350}
    339351
    … …  
    356368PGM_SHW_DECL(int, ModifyPage)(PVMCPU pVCpu, RTGCUINTPTR GCPtr, size_t cb, uint64_t fFlags, uint64_t fMask, uint32_t fOpFlags)
    357369{
    358 # if PGM_SHW_TYPE == PGM_TYPE_NESTED
    359     NOREF(pVCpu); NOREF(GCPtr); NOREF(cb); NOREF(fFlags); NOREF(fMask); NOREF(fOpFlags);
    360     return VERR_PAGE_TABLE_NOT_PRESENT;
    361 
    362 # else /* PGM_SHW_TYPE != PGM_TYPE_NESTED && PGM_SHW_TYPE != PGM_TYPE_EPT */
    363370    PVM pVM = pVCpu->CTX_SUFF(pVM);
    364371    int rc;
    … …  
    374381         * Get the PDE.
    375382         */
    376 # if PGM_SHW_TYPE == PGM_TYPE_AMD64
     383#if PGM_SHW_TYPE == PGM_TYPE_AMD64 || PGM_SHW_TYPE == PGM_TYPE_NESTED_AMD64
    377384        X86PDEPAE       Pde;
    378385        /* PML4 */
    … …  
    399406        Pde = pPd->a[iPd];
    400407
    401 # elif PGM_SHW_TYPE == PGM_TYPE_PAE
     408#elif PGM_SHW_TYPE == PGM_TYPE_PAE || PGM_SHW_TYPE == PGM_TYPE_NESTED_PAE
    402409        X86PDEPAE       Pde = pgmShwGetPaePDE(pVCpu, GCPtr);
    403410
    404 # elif PGM_SHW_TYPE == PGM_TYPE_EPT
     411#elif PGM_SHW_TYPE == PGM_TYPE_EPT
    405412        const unsigned  iPd = ((GCPtr >> SHW_PD_SHIFT) & SHW_PD_MASK);
    406413        PEPTPD          pPDDst;
    … …  
    416423        Pde = pPDDst->a[iPd];
    417424
    418 # else /* PGM_TYPE_32BIT */
     425#else /* PGM_TYPE_32BIT || PGM_SHW_TYPE == PGM_TYPE_NESTED_32BIT */
    419426        X86PDE          Pde = pgmShwGet32BitPDE(pVCpu, GCPtr);
    420 # endif
     427#endif
    421428        if (!Pde.n.u1Present)
    422429            return VERR_PAGE_TABLE_NOT_PRESENT;
    … …  
    474481
    475482                SHW_PTE_ATOMIC_SET2(pPT->a[iPTE], NewPte);
    476 # if PGM_SHW_TYPE == PGM_TYPE_EPT
     483#if PGM_SHW_TYPE == PGM_TYPE_EPT
    477484                HMInvalidatePhysPage(pVM, (RTGCPHYS)GCPtr);
    478 # else
     485#else
    479486                PGM_INVL_PG_ALL_VCPU(pVM, GCPtr);
    480 # endif
     487#endif
    481488            }
    482489
    … …  
    489496        }
    490497    }
    491 # endif /* PGM_SHW_TYPE != PGM_TYPE_NESTED */
    492498}
    493499

  • trunk/src/VBox/VMM/VMMR3/DBGFMem.cpp

    r70948 r73246  
    544544        case PGMMODE_AMD64_NX:
    545545            return DBGFPGDMP_FLAGS_PSE | DBGFPGDMP_FLAGS_PAE | DBGFPGDMP_FLAGS_LME | DBGFPGDMP_FLAGS_NXE;
    546         case PGMMODE_NESTED:
    547             return DBGFPGDMP_FLAGS_NP;
     546        case PGMMODE_NESTED_32BIT:
     547            return DBGFPGDMP_FLAGS_NP; /** @todo fix nested paging dumping*/
     548        case PGMMODE_NESTED_PAE:
     549            return DBGFPGDMP_FLAGS_NP; /** @todo fix nested paging dumping*/
     550        case PGMMODE_NESTED_AMD64:
     551            return DBGFPGDMP_FLAGS_NP; /** @todo fix nested paging dumping*/
    548552        case PGMMODE_EPT:
    549553            return DBGFPGDMP_FLAGS_EPT;

  • trunk/src/VBox/VMM/VMMR3/PGM.cpp

    r73199 r73246  
    983983
    984984/*
    985  * Shadow - Nested paging mode
    986  */
    987 #define PGM_SHW_TYPE                PGM_TYPE_NESTED
    988 #define PGM_SHW_NAME(name)          PGM_SHW_NAME_NESTED(name)
    989 #define PGM_SHW_NAME_RC_STR(name)   PGM_SHW_NAME_RC_NESTED_STR(name)
    990 #define PGM_SHW_NAME_R0_STR(name)   PGM_SHW_NAME_R0_NESTED_STR(name)
     985 * Shadow - 32-bit nested paging mode
     986 */
     987#define PGM_SHW_TYPE                PGM_TYPE_NESTED_32BIT
     988#define PGM_SHW_NAME(name)          PGM_SHW_NAME_NESTED_32BIT(name)
     989#define PGM_SHW_NAME_RC_STR(name)   PGM_SHW_NAME_RC_NESTED_32BIT_STR(name)
     990#define PGM_SHW_NAME_R0_STR(name)   PGM_SHW_NAME_R0_NESTED_32BIT_STR(name)
    991991#include "PGMShw.h"
    992992
    … …  
    996996#define PGM_GST_NAME_RC_STR(name)   PGM_GST_NAME_RC_REAL_STR(name)
    997997#define PGM_GST_NAME_R0_STR(name)   PGM_GST_NAME_R0_REAL_STR(name)
    998 #define PGM_BTH_NAME(name)          PGM_BTH_NAME_NESTED_REAL(name)
    999 #define PGM_BTH_NAME_RC_STR(name)   PGM_BTH_NAME_RC_NESTED_REAL_STR(name)
    1000 #define PGM_BTH_NAME_R0_STR(name)   PGM_BTH_NAME_R0_NESTED_REAL_STR(name)
     998#define PGM_BTH_NAME(name)          PGM_BTH_NAME_NESTED_32BIT_REAL(name)
     999#define PGM_BTH_NAME_RC_STR(name)   PGM_BTH_NAME_RC_NESTED_32BIT_REAL_STR(name)
     1000#define PGM_BTH_NAME_R0_STR(name)   PGM_BTH_NAME_R0_NESTED_32BIT_REAL_STR(name)
    10011001#define BTH_PGMPOOLKIND_PT_FOR_PT   PGMPOOLKIND_PAE_PT_FOR_PHYS
    10021002#include "PGMGstDefs.h"
    … …  
    10161016#define PGM_GST_NAME_RC_STR(name)   PGM_GST_NAME_RC_PROT_STR(name)
    10171017#define PGM_GST_NAME_R0_STR(name)   PGM_GST_NAME_R0_PROT_STR(name)
    1018 #define PGM_BTH_NAME(name)          PGM_BTH_NAME_NESTED_PROT(name)
    1019 #define PGM_BTH_NAME_RC_STR(name)   PGM_BTH_NAME_RC_NESTED_PROT_STR(name)
    1020 #define PGM_BTH_NAME_R0_STR(name)   PGM_BTH_NAME_R0_NESTED_PROT_STR(name)
     1018#define PGM_BTH_NAME(name)          PGM_BTH_NAME_NESTED_32BIT_PROT(name)
     1019#define PGM_BTH_NAME_RC_STR(name)   PGM_BTH_NAME_RC_NESTED_32BIT_PROT_STR(name)
     1020#define PGM_BTH_NAME_R0_STR(name)   PGM_BTH_NAME_R0_NESTED_32BIT_PROT_STR(name)
    10211021#define BTH_PGMPOOLKIND_PT_FOR_PT   PGMPOOLKIND_PAE_PT_FOR_PHYS
    10221022#include "PGMGstDefs.h"
    … …  
    10361036#define PGM_GST_NAME_RC_STR(name)   PGM_GST_NAME_RC_32BIT_STR(name)
    10371037#define PGM_GST_NAME_R0_STR(name)   PGM_GST_NAME_R0_32BIT_STR(name)
    1038 #define PGM_BTH_NAME(name)          PGM_BTH_NAME_NESTED_32BIT(name)
    1039 #define PGM_BTH_NAME_RC_STR(name)   PGM_BTH_NAME_RC_NESTED_32BIT_STR(name)
    1040 #define PGM_BTH_NAME_R0_STR(name)   PGM_BTH_NAME_R0_NESTED_32BIT_STR(name)
     1038#define PGM_BTH_NAME(name)          PGM_BTH_NAME_NESTED_32BIT_32BIT(name)
     1039#define PGM_BTH_NAME_RC_STR(name)   PGM_BTH_NAME_RC_NESTED_32BIT_32BIT_STR(name)
     1040#define PGM_BTH_NAME_R0_STR(name)   PGM_BTH_NAME_R0_NESTED_32BIT_32BIT_STR(name)
    10411041#define BTH_PGMPOOLKIND_PT_FOR_PT   PGMPOOLKIND_PAE_PT_FOR_32BIT_PT
    10421042#define BTH_PGMPOOLKIND_PT_FOR_BIG  PGMPOOLKIND_PAE_PT_FOR_32BIT_4MB
    … …  
    10581058#define PGM_GST_NAME_RC_STR(name)   PGM_GST_NAME_RC_PAE_STR(name)
    10591059#define PGM_GST_NAME_R0_STR(name)   PGM_GST_NAME_R0_PAE_STR(name)
    1060 #define PGM_BTH_NAME(name)          PGM_BTH_NAME_NESTED_PAE(name)
    1061 #define PGM_BTH_NAME_RC_STR(name)   PGM_BTH_NAME_RC_NESTED_PAE_STR(name)
    1062 #define PGM_BTH_NAME_R0_STR(name)   PGM_BTH_NAME_R0_NESTED_PAE_STR(name)
     1060#define PGM_BTH_NAME(name)          PGM_BTH_NAME_NESTED_32BIT_PAE(name)
     1061#define PGM_BTH_NAME_RC_STR(name)   PGM_BTH_NAME_RC_NESTED_32BIT_PAE_STR(name)
     1062#define PGM_BTH_NAME_R0_STR(name)   PGM_BTH_NAME_R0_NESTED_32BIT_PAE_STR(name)
    10631063#define BTH_PGMPOOLKIND_PT_FOR_PT   PGMPOOLKIND_PAE_PT_FOR_PAE_PT
    10641064#define BTH_PGMPOOLKIND_PT_FOR_BIG  PGMPOOLKIND_PAE_PT_FOR_PAE_2MB
    … …  
    10811081# define PGM_GST_NAME_RC_STR(name)  PGM_GST_NAME_RC_AMD64_STR(name)
    10821082# define PGM_GST_NAME_R0_STR(name)  PGM_GST_NAME_R0_AMD64_STR(name)
    1083 # define PGM_BTH_NAME(name)         PGM_BTH_NAME_NESTED_AMD64(name)
    1084 # define PGM_BTH_NAME_RC_STR(name)  PGM_BTH_NAME_RC_NESTED_AMD64_STR(name)
    1085 # define PGM_BTH_NAME_R0_STR(name)  PGM_BTH_NAME_R0_NESTED_AMD64_STR(name)
     1083# define PGM_BTH_NAME(name)         PGM_BTH_NAME_NESTED_32BIT_AMD64(name)
     1084# define PGM_BTH_NAME_RC_STR(name)  PGM_BTH_NAME_RC_NESTED_32BIT_AMD64_STR(name)
     1085# define PGM_BTH_NAME_R0_STR(name)  PGM_BTH_NAME_R0_NESTED_32BIT_AMD64_STR(name)
     1086# define BTH_PGMPOOLKIND_PT_FOR_PT  PGMPOOLKIND_PAE_PT_FOR_PAE_PT
     1087# define BTH_PGMPOOLKIND_PT_FOR_BIG PGMPOOLKIND_PAE_PT_FOR_PAE_2MB
     1088# include "PGMGstDefs.h"
     1089# include "PGMBth.h"
     1090# undef BTH_PGMPOOLKIND_PT_FOR_BIG
     1091# undef BTH_PGMPOOLKIND_PT_FOR_PT
     1092# undef PGM_BTH_NAME
     1093# undef PGM_BTH_NAME_RC_STR
     1094# undef PGM_BTH_NAME_R0_STR
     1095# undef PGM_GST_TYPE
     1096# undef PGM_GST_NAME
     1097# undef PGM_GST_NAME_RC_STR
     1098# undef PGM_GST_NAME_R0_STR
     1099#endif /* VBOX_WITH_64_BITS_GUESTS */
     1100
     1101#undef PGM_SHW_TYPE
     1102#undef PGM_SHW_NAME
     1103#undef PGM_SHW_NAME_RC_STR
     1104#undef PGM_SHW_NAME_R0_STR
     1105
     1106
     1107/*
     1108 * Shadow - PAE nested paging mode
     1109 */
     1110#define PGM_SHW_TYPE                PGM_TYPE_NESTED_PAE
     1111#define PGM_SHW_NAME(name)          PGM_SHW_NAME_NESTED_PAE(name)
     1112#define PGM_SHW_NAME_RC_STR(name)   PGM_SHW_NAME_RC_NESTED_PAE_STR(name)
     1113#define PGM_SHW_NAME_R0_STR(name)   PGM_SHW_NAME_R0_NESTED_PAE_STR(name)
     1114#include "PGMShw.h"
     1115
     1116/* Guest - real mode */
     1117#define PGM_GST_TYPE                PGM_TYPE_REAL
     1118#define PGM_GST_NAME(name)          PGM_GST_NAME_REAL(name)
     1119#define PGM_GST_NAME_RC_STR(name)   PGM_GST_NAME_RC_REAL_STR(name)
     1120#define PGM_GST_NAME_R0_STR(name)   PGM_GST_NAME_R0_REAL_STR(name)
     1121#define PGM_BTH_NAME(name)          PGM_BTH_NAME_NESTED_PAE_REAL(name)
     1122#define PGM_BTH_NAME_RC_STR(name)   PGM_BTH_NAME_RC_NESTED_PAE_REAL_STR(name)
     1123#define PGM_BTH_NAME_R0_STR(name)   PGM_BTH_NAME_R0_NESTED_PAE_REAL_STR(name)
     1124#define BTH_PGMPOOLKIND_PT_FOR_PT   PGMPOOLKIND_PAE_PT_FOR_PHYS
     1125#include "PGMGstDefs.h"
     1126#include "PGMBth.h"
     1127#undef BTH_PGMPOOLKIND_PT_FOR_PT
     1128#undef PGM_BTH_NAME
     1129#undef PGM_BTH_NAME_RC_STR
     1130#undef PGM_BTH_NAME_R0_STR
     1131#undef PGM_GST_TYPE
     1132#undef PGM_GST_NAME
     1133#undef PGM_GST_NAME_RC_STR
     1134#undef PGM_GST_NAME_R0_STR
     1135
     1136/* Guest - protected mode */
     1137#define PGM_GST_TYPE                PGM_TYPE_PROT
     1138#define PGM_GST_NAME(name)          PGM_GST_NAME_PROT(name)
     1139#define PGM_GST_NAME_RC_STR(name)   PGM_GST_NAME_RC_PROT_STR(name)
     1140#define PGM_GST_NAME_R0_STR(name)   PGM_GST_NAME_R0_PROT_STR(name)
     1141#define PGM_BTH_NAME(name)          PGM_BTH_NAME_NESTED_PAE_PROT(name)
     1142#define PGM_BTH_NAME_RC_STR(name)   PGM_BTH_NAME_RC_NESTED_PAE_PROT_STR(name)
     1143#define PGM_BTH_NAME_R0_STR(name)   PGM_BTH_NAME_R0_NESTED_PAE_PROT_STR(name)
     1144#define BTH_PGMPOOLKIND_PT_FOR_PT   PGMPOOLKIND_PAE_PT_FOR_PHYS
     1145#include "PGMGstDefs.h"
     1146#include "PGMBth.h"
     1147#undef BTH_PGMPOOLKIND_PT_FOR_PT
     1148#undef PGM_BTH_NAME
     1149#undef PGM_BTH_NAME_RC_STR
     1150#undef PGM_BTH_NAME_R0_STR
     1151#undef PGM_GST_TYPE
     1152#undef PGM_GST_NAME
     1153#undef PGM_GST_NAME_RC_STR
     1154#undef PGM_GST_NAME_R0_STR
     1155
     1156/* Guest - 32-bit mode */
     1157#define PGM_GST_TYPE                PGM_TYPE_32BIT
     1158#define PGM_GST_NAME(name)          PGM_GST_NAME_32BIT(name)
     1159#define PGM_GST_NAME_RC_STR(name)   PGM_GST_NAME_RC_32BIT_STR(name)
     1160#define PGM_GST_NAME_R0_STR(name)   PGM_GST_NAME_R0_32BIT_STR(name)
     1161#define PGM_BTH_NAME(name)          PGM_BTH_NAME_NESTED_PAE_32BIT(name)
     1162#define PGM_BTH_NAME_RC_STR(name)   PGM_BTH_NAME_RC_NESTED_PAE_32BIT_STR(name)
     1163#define PGM_BTH_NAME_R0_STR(name)   PGM_BTH_NAME_R0_NESTED_PAE_32BIT_STR(name)
     1164#define BTH_PGMPOOLKIND_PT_FOR_PT   PGMPOOLKIND_PAE_PT_FOR_32BIT_PT
     1165#define BTH_PGMPOOLKIND_PT_FOR_BIG  PGMPOOLKIND_PAE_PT_FOR_32BIT_4MB
     1166#include "PGMGstDefs.h"
     1167#include "PGMBth.h"
     1168#undef BTH_PGMPOOLKIND_PT_FOR_BIG
     1169#undef BTH_PGMPOOLKIND_PT_FOR_PT
     1170#undef PGM_BTH_NAME
     1171#undef PGM_BTH_NAME_RC_STR
     1172#undef PGM_BTH_NAME_R0_STR
     1173#undef PGM_GST_TYPE
     1174#undef PGM_GST_NAME
     1175#undef PGM_GST_NAME_RC_STR
     1176#undef PGM_GST_NAME_R0_STR
     1177
     1178/* Guest - PAE mode */
     1179#define PGM_GST_TYPE                PGM_TYPE_PAE
     1180#define PGM_GST_NAME(name)          PGM_GST_NAME_PAE(name)
     1181#define PGM_GST_NAME_RC_STR(name)   PGM_GST_NAME_RC_PAE_STR(name)
     1182#define PGM_GST_NAME_R0_STR(name)   PGM_GST_NAME_R0_PAE_STR(name)
     1183#define PGM_BTH_NAME(name)          PGM_BTH_NAME_NESTED_PAE_PAE(name)
     1184#define PGM_BTH_NAME_RC_STR(name)   PGM_BTH_NAME_RC_NESTED_PAE_PAE_STR(name)
     1185#define PGM_BTH_NAME_R0_STR(name)   PGM_BTH_NAME_R0_NESTED_PAE_PAE_STR(name)
     1186#define BTH_PGMPOOLKIND_PT_FOR_PT   PGMPOOLKIND_PAE_PT_FOR_PAE_PT
     1187#define BTH_PGMPOOLKIND_PT_FOR_BIG  PGMPOOLKIND_PAE_PT_FOR_PAE_2MB
     1188#include "PGMGstDefs.h"
     1189#include "PGMBth.h"
     1190#undef BTH_PGMPOOLKIND_PT_FOR_BIG
     1191#undef BTH_PGMPOOLKIND_PT_FOR_PT
     1192#undef PGM_BTH_NAME
     1193#undef PGM_BTH_NAME_RC_STR
     1194#undef PGM_BTH_NAME_R0_STR
     1195#undef PGM_GST_TYPE
     1196#undef PGM_GST_NAME
     1197#undef PGM_GST_NAME_RC_STR
     1198#undef PGM_GST_NAME_R0_STR
     1199
     1200#ifdef VBOX_WITH_64_BITS_GUESTS
     1201/* Guest - AMD64 mode */
     1202# define PGM_GST_TYPE               PGM_TYPE_AMD64
     1203# define PGM_GST_NAME(name)         PGM_GST_NAME_AMD64(name)
     1204# define PGM_GST_NAME_RC_STR(name)  PGM_GST_NAME_RC_AMD64_STR(name)
     1205# define PGM_GST_NAME_R0_STR(name)  PGM_GST_NAME_R0_AMD64_STR(name)
     1206# define PGM_BTH_NAME(name)         PGM_BTH_NAME_NESTED_PAE_AMD64(name)
     1207# define PGM_BTH_NAME_RC_STR(name)  PGM_BTH_NAME_RC_NESTED_PAE_AMD64_STR(name)
     1208# define PGM_BTH_NAME_R0_STR(name)  PGM_BTH_NAME_R0_NESTED_PAE_AMD64_STR(name)
     1209# define BTH_PGMPOOLKIND_PT_FOR_PT  PGMPOOLKIND_PAE_PT_FOR_PAE_PT
     1210# define BTH_PGMPOOLKIND_PT_FOR_BIG PGMPOOLKIND_PAE_PT_FOR_PAE_2MB
     1211# include "PGMGstDefs.h"
     1212# include "PGMBth.h"
     1213# undef BTH_PGMPOOLKIND_PT_FOR_BIG
     1214# undef BTH_PGMPOOLKIND_PT_FOR_PT
     1215# undef PGM_BTH_NAME
     1216# undef PGM_BTH_NAME_RC_STR
     1217# undef PGM_BTH_NAME_R0_STR
     1218# undef PGM_GST_TYPE
     1219# undef PGM_GST_NAME
     1220# undef PGM_GST_NAME_RC_STR
     1221# undef PGM_GST_NAME_R0_STR
     1222#endif /* VBOX_WITH_64_BITS_GUESTS */
     1223
     1224#undef PGM_SHW_TYPE
     1225#undef PGM_SHW_NAME
     1226#undef PGM_SHW_NAME_RC_STR
     1227#undef PGM_SHW_NAME_R0_STR
     1228
     1229
     1230/*
     1231 * Shadow - AMD64 nested paging mode
     1232 */
     1233#define PGM_SHW_TYPE                PGM_TYPE_NESTED_AMD64
     1234#define PGM_SHW_NAME(name)          PGM_SHW_NAME_NESTED_AMD64(name)
     1235#define PGM_SHW_NAME_RC_STR(name)   PGM_SHW_NAME_RC_NESTED_AMD64_STR(name)
     1236#define PGM_SHW_NAME_R0_STR(name)   PGM_SHW_NAME_R0_NESTED_AMD64_STR(name)
     1237#include "PGMShw.h"
     1238
     1239/* Guest - real mode */
     1240#define PGM_GST_TYPE                PGM_TYPE_REAL
     1241#define PGM_GST_NAME(name)          PGM_GST_NAME_REAL(name)
     1242#define PGM_GST_NAME_RC_STR(name)   PGM_GST_NAME_RC_REAL_STR(name)
     1243#define PGM_GST_NAME_R0_STR(name)   PGM_GST_NAME_R0_REAL_STR(name)
     1244#define PGM_BTH_NAME(name)          PGM_BTH_NAME_NESTED_AMD64_REAL(name)
     1245#define PGM_BTH_NAME_RC_STR(name)   PGM_BTH_NAME_RC_NESTED_AMD64_REAL_STR(name)
     1246#define PGM_BTH_NAME_R0_STR(name)   PGM_BTH_NAME_R0_NESTED_AMD64_REAL_STR(name)
     1247#define BTH_PGMPOOLKIND_PT_FOR_PT   PGMPOOLKIND_PAE_PT_FOR_PHYS
     1248#include "PGMGstDefs.h"
     1249#include "PGMBth.h"
     1250#undef BTH_PGMPOOLKIND_PT_FOR_PT
     1251#undef PGM_BTH_NAME
     1252#undef PGM_BTH_NAME_RC_STR
     1253#undef PGM_BTH_NAME_R0_STR
     1254#undef PGM_GST_TYPE
     1255#undef PGM_GST_NAME
     1256#undef PGM_GST_NAME_RC_STR
     1257#undef PGM_GST_NAME_R0_STR
     1258
     1259/* Guest - protected mode */
     1260#define PGM_GST_TYPE                PGM_TYPE_PROT
     1261#define PGM_GST_NAME(name)          PGM_GST_NAME_PROT(name)
     1262#define PGM_GST_NAME_RC_STR(name)   PGM_GST_NAME_RC_PROT_STR(name)
     1263#define PGM_GST_NAME_R0_STR(name)   PGM_GST_NAME_R0_PROT_STR(name)
     1264#define PGM_BTH_NAME(name)          PGM_BTH_NAME_NESTED_AMD64_PROT(name)
     1265#define PGM_BTH_NAME_RC_STR(name)   PGM_BTH_NAME_RC_NESTED_AMD64_PROT_STR(name)
     1266#define PGM_BTH_NAME_R0_STR(name)   PGM_BTH_NAME_R0_NESTED_AMD64_PROT_STR(name)
     1267#define BTH_PGMPOOLKIND_PT_FOR_PT   PGMPOOLKIND_PAE_PT_FOR_PHYS
     1268#include "PGMGstDefs.h"
     1269#include "PGMBth.h"
     1270#undef BTH_PGMPOOLKIND_PT_FOR_PT
     1271#undef PGM_BTH_NAME
     1272#undef PGM_BTH_NAME_RC_STR
     1273#undef PGM_BTH_NAME_R0_STR
     1274#undef PGM_GST_TYPE
     1275#undef PGM_GST_NAME
     1276#undef PGM_GST_NAME_RC_STR
     1277#undef PGM_GST_NAME_R0_STR
     1278
     1279/* Guest - 32-bit mode */
     1280#define PGM_GST_TYPE                PGM_TYPE_32BIT
     1281#define PGM_GST_NAME(name)          PGM_GST_NAME_32BIT(name)
     1282#define PGM_GST_NAME_RC_STR(name)   PGM_GST_NAME_RC_32BIT_STR(name)
     1283#define PGM_GST_NAME_R0_STR(name)   PGM_GST_NAME_R0_32BIT_STR(name)
     1284#define PGM_BTH_NAME(name)          PGM_BTH_NAME_NESTED_AMD64_32BIT(name)
     1285#define PGM_BTH_NAME_RC_STR(name)   PGM_BTH_NAME_RC_NESTED_AMD64_32BIT_STR(name)
     1286#define PGM_BTH_NAME_R0_STR(name)   PGM_BTH_NAME_R0_NESTED_AMD64_32BIT_STR(name)
     1287#define BTH_PGMPOOLKIND_PT_FOR_PT   PGMPOOLKIND_PAE_PT_FOR_32BIT_PT
     1288#define BTH_PGMPOOLKIND_PT_FOR_BIG  PGMPOOLKIND_PAE_PT_FOR_32BIT_4MB
     1289#include "PGMGstDefs.h"
     1290#include "PGMBth.h"
     1291#undef BTH_PGMPOOLKIND_PT_FOR_BIG
     1292#undef BTH_PGMPOOLKIND_PT_FOR_PT
     1293#undef PGM_BTH_NAME
     1294#undef PGM_BTH_NAME_RC_STR
     1295#undef PGM_BTH_NAME_R0_STR
     1296#undef PGM_GST_TYPE
     1297#undef PGM_GST_NAME
     1298#undef PGM_GST_NAME_RC_STR
     1299#undef PGM_GST_NAME_R0_STR
     1300
     1301/* Guest - PAE mode */
     1302#define PGM_GST_TYPE                PGM_TYPE_PAE
     1303#define PGM_GST_NAME(name)          PGM_GST_NAME_PAE(name)
     1304#define PGM_GST_NAME_RC_STR(name)   PGM_GST_NAME_RC_PAE_STR(name)
     1305#define PGM_GST_NAME_R0_STR(name)   PGM_GST_NAME_R0_PAE_STR(name)
     1306#define PGM_BTH_NAME(name)          PGM_BTH_NAME_NESTED_AMD64_PAE(name)
     1307#define PGM_BTH_NAME_RC_STR(name)   PGM_BTH_NAME_RC_NESTED_AMD64_PAE_STR(name)
     1308#define PGM_BTH_NAME_R0_STR(name)   PGM_BTH_NAME_R0_NESTED_AMD64_PAE_STR(name)
     1309#define BTH_PGMPOOLKIND_PT_FOR_PT   PGMPOOLKIND_PAE_PT_FOR_PAE_PT
     1310#define BTH_PGMPOOLKIND_PT_FOR_BIG  PGMPOOLKIND_PAE_PT_FOR_PAE_2MB
     1311#include "PGMGstDefs.h"
     1312#include "PGMBth.h"
     1313#undef BTH_PGMPOOLKIND_PT_FOR_BIG
     1314#undef BTH_PGMPOOLKIND_PT_FOR_PT
     1315#undef PGM_BTH_NAME
     1316#undef PGM_BTH_NAME_RC_STR
     1317#undef PGM_BTH_NAME_R0_STR
     1318#undef PGM_GST_TYPE
     1319#undef PGM_GST_NAME
     1320#undef PGM_GST_NAME_RC_STR
     1321#undef PGM_GST_NAME_R0_STR
     1322
     1323#ifdef VBOX_WITH_64_BITS_GUESTS
     1324/* Guest - AMD64 mode */
     1325# define PGM_GST_TYPE               PGM_TYPE_AMD64
     1326# define PGM_GST_NAME(name)         PGM_GST_NAME_AMD64(name)
     1327# define PGM_GST_NAME_RC_STR(name)  PGM_GST_NAME_RC_AMD64_STR(name)
     1328# define PGM_GST_NAME_R0_STR(name)  PGM_GST_NAME_R0_AMD64_STR(name)
     1329# define PGM_BTH_NAME(name)         PGM_BTH_NAME_NESTED_AMD64_AMD64(name)
     1330# define PGM_BTH_NAME_RC_STR(name)  PGM_BTH_NAME_RC_NESTED_AMD64_AMD64_STR(name)
     1331# define PGM_BTH_NAME_R0_STR(name)  PGM_BTH_NAME_R0_NESTED_AMD64_AMD64_STR(name)
    10861332# define BTH_PGMPOOLKIND_PT_FOR_PT  PGMPOOLKIND_PAE_PT_FOR_PAE_PT
    10871333# define BTH_PGMPOOLKIND_PT_FOR_BIG PGMPOOLKIND_PAE_PT_FOR_PAE_2MB
    … …  
    23552601        pgmR3ModeDataSwitch(pVM, pVCpu, pVCpu->pgm.s.enmShadowMode, pVCpu->pgm.s.enmGuestMode);
    23562602
    2357         PGM_SHW_PFN(Relocate, pVCpu)(pVCpu, offDelta);
     2603        uintptr_t idxShw = pVCpu->pgm.s.idxShadowModeData;
     2604        if (   idxShw < RT_ELEMENTS(g_aPgmShadowModeData)
     2605            && g_aPgmShadowModeData[idxShw].pfnRelocate)
     2606            g_aPgmShadowModeData[idxShw].pfnRelocate(pVCpu, offDelta);
    23582607
    23592608        uintptr_t const idxGst = pVCpu->pgm.s.idxGuestModeData;
    … …  
    29943243    switch (pgmMode)
    29953244    {
    2996         case PGMMODE_REAL:      return PGM_TYPE_REAL;
    2997         case PGMMODE_PROTECTED: return PGM_TYPE_PROT;
    2998         case PGMMODE_32_BIT:    return PGM_TYPE_32BIT;
     3245        case PGMMODE_REAL:          return PGM_TYPE_REAL;
     3246        case PGMMODE_PROTECTED:     return PGM_TYPE_PROT;
     3247        case PGMMODE_32_BIT:        return PGM_TYPE_32BIT;
    29993248        case PGMMODE_PAE:
    3000         case PGMMODE_PAE_NX:    return PGM_TYPE_PAE;
     3249        case PGMMODE_PAE_NX:        return PGM_TYPE_PAE;
    30013250        case PGMMODE_AMD64:
    3002         case PGMMODE_AMD64_NX:  return PGM_TYPE_AMD64;
    3003         case PGMMODE_NESTED:    return PGM_TYPE_NESTED;
    3004         case PGMMODE_EPT:       return PGM_TYPE_EPT;
     3251        case PGMMODE_AMD64_NX:      return PGM_TYPE_AMD64;
     3252        case PGMMODE_NESTED_32BIT:  return PGM_TYPE_NESTED_32BIT;
     3253        case PGMMODE_NESTED_PAE:    return PGM_TYPE_NESTED_PAE;
     3254        case PGMMODE_NESTED_AMD64:  return PGM_TYPE_NESTED_AMD64;
     3255        case PGMMODE_EPT:           return PGM_TYPE_EPT;
    30053256        default:
    30063257            AssertFatalMsgFailed(("pgmMode=%d\n", pgmMode));
    … …  
    30783329    pModeData->uShwType = PGM_TYPE_32BIT;
    30793330    pModeData->uGstType = PGM_TYPE_REAL;
    3080     rc = PGM_SHW_NAME_32BIT(InitData)(      pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc);
    30813331    rc = PGM_BTH_NAME_32BIT_REAL(InitData)( pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc);
    30823332
    … …  
    30843334    pModeData->uShwType = PGM_TYPE_32BIT;
    30853335    pModeData->uGstType = PGM_TYPE_PROT;
    3086     rc = PGM_SHW_NAME_32BIT(InitData)(      pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc);
    30873336    rc = PGM_BTH_NAME_32BIT_PROT(InitData)( pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc);
    30883337
    … …  
    30903339    pModeData->uShwType = PGM_TYPE_32BIT;
    30913340    pModeData->uGstType = PGM_TYPE_32BIT;
    3092     rc = PGM_SHW_NAME_32BIT(InitData)(      pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc);
    30933341    rc = PGM_BTH_NAME_32BIT_32BIT(InitData)(pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc);
    30943342
    … …  
    30963344    pModeData->uShwType = PGM_TYPE_PAE;
    30973345    pModeData->uGstType = PGM_TYPE_REAL;
    3098     rc = PGM_SHW_NAME_PAE(InitData)(        pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc);
    30993346    rc = PGM_BTH_NAME_PAE_REAL(InitData)(   pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc);
    31003347
    … …  
    31023349    pModeData->uShwType = PGM_TYPE_PAE;
    31033350    pModeData->uGstType = PGM_TYPE_PROT;
    3104     rc = PGM_SHW_NAME_PAE(InitData)(        pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc);
    31053351    rc = PGM_BTH_NAME_PAE_PROT(InitData)(   pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc);
    31063352
    … …  
    31083354    pModeData->uShwType = PGM_TYPE_PAE;
    31093355    pModeData->uGstType = PGM_TYPE_32BIT;
    3110     rc = PGM_SHW_NAME_PAE(InitData)(        pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc);
    31113356    rc = PGM_BTH_NAME_PAE_32BIT(InitData)(  pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc);
    31123357
    … …  
    31143359    pModeData->uShwType = PGM_TYPE_PAE;
    31153360    pModeData->uGstType = PGM_TYPE_PAE;
    3116     rc = PGM_SHW_NAME_PAE(InitData)(        pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc);
    31173361    rc = PGM_BTH_NAME_PAE_PAE(InitData)(    pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc);
    31183362
    … …  
    31213365    pModeData->uShwType = PGM_TYPE_AMD64;
    31223366    pModeData->uGstType = PGM_TYPE_AMD64;
    3123     rc = PGM_SHW_NAME_AMD64(InitData)(       pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc);
    31243367    rc = PGM_BTH_NAME_AMD64_AMD64(InitData)( pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc);
    31253368#endif
    31263369
    3127     /* The nested paging mode. */
    3128     pModeData = &pVM->pgm.s.paModeData[pgmModeDataIndex(PGM_TYPE_NESTED, PGM_TYPE_REAL)];
    3129     pModeData->uShwType = PGM_TYPE_NESTED;
     3370    /* The 32-bit nested paging mode. */
     3371    pModeData = &pVM->pgm.s.paModeData[pgmModeDataIndex(PGM_TYPE_NESTED_32BIT, PGM_TYPE_REAL)];
     3372    pModeData->uShwType = PGM_TYPE_NESTED_32BIT;
    31303373    pModeData->uGstType = PGM_TYPE_REAL;
    3131     rc = PGM_BTH_NAME_NESTED_REAL(InitData)( pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc);
    3132 
    3133     pModeData = &pVM->pgm.s.paModeData[pgmModeDataIndex(PGM_TYPE_NESTED, PGMMODE_PROTECTED)];
    3134     pModeData->uShwType = PGM_TYPE_NESTED;
     3374    rc = PGM_BTH_NAME_NESTED_32BIT_REAL(InitData)( pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc);
     3375
     3376    pModeData = &pVM->pgm.s.paModeData[pgmModeDataIndex(PGM_TYPE_NESTED_32BIT, PGMMODE_PROTECTED)];
     3377    pModeData->uShwType = PGM_TYPE_NESTED_32BIT;
    31353378    pModeData->uGstType = PGM_TYPE_PROT;
    3136     rc = PGM_BTH_NAME_NESTED_PROT(InitData)( pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc);
    3137 
    3138     pModeData = &pVM->pgm.s.paModeData[pgmModeDataIndex(PGM_TYPE_NESTED, PGM_TYPE_32BIT)];
    3139     pModeData->uShwType = PGM_TYPE_NESTED;
     3379    rc = PGM_BTH_NAME_NESTED_32BIT_PROT(InitData)( pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc);
     3380
     3381    pModeData = &pVM->pgm.s.paModeData[pgmModeDataIndex(PGM_TYPE_NESTED_32BIT, PGM_TYPE_32BIT)];
     3382    pModeData->uShwType = PGM_TYPE_NESTED_32BIT;
    31403383    pModeData->uGstType = PGM_TYPE_32BIT;
    3141     rc = PGM_BTH_NAME_NESTED_32BIT(InitData)(pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc);
    3142 
    3143     pModeData = &pVM->pgm.s.paModeData[pgmModeDataIndex(PGM_TYPE_NESTED, PGM_TYPE_PAE)];
    3144     pModeData->uShwType = PGM_TYPE_NESTED;
     3384    rc = PGM_BTH_NAME_NESTED_32BIT_32BIT(InitData)(pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc);
     3385
     3386    pModeData = &pVM->pgm.s.paModeData[pgmModeDataIndex(PGM_TYPE_NESTED_32BIT, PGM_TYPE_PAE)];
     3387    pModeData->uShwType = PGM_TYPE_NESTED_32BIT;
    31453388    pModeData->uGstType = PGM_TYPE_PAE;
    3146     rc = PGM_BTH_NAME_NESTED_PAE(InitData)(  pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc);
     3389    rc = PGM_BTH_NAME_NESTED_32BIT_PAE(InitData)(  pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc);
    31473390
    31483391#ifdef VBOX_WITH_64_BITS_GUESTS
    3149     pModeData = &pVM->pgm.s.paModeData[pgmModeDataIndex(PGM_TYPE_NESTED, PGM_TYPE_AMD64)];
    3150     pModeData->uShwType = PGM_TYPE_NESTED;
     3392    pModeData = &pVM->pgm.s.paModeData[pgmModeDataIndex(PGM_TYPE_NESTED_32BIT, PGM_TYPE_AMD64)];
     3393    pModeData->uShwType = PGM_TYPE_NESTED_32BIT;
    31513394    pModeData->uGstType = PGM_TYPE_AMD64;
    3152     rc = PGM_BTH_NAME_NESTED_AMD64(InitData)( pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc);
     3395    rc = PGM_BTH_NAME_NESTED_32BIT_AMD64(InitData)( pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc);
    31533396#endif
    31543397
    3155     /* The shadow part of the nested callback mode depends on the host paging mode (AMD-V only). */
    3156     switch (pVM->pgm.s.enmHostMode)
    3157     {
    3158 #if HC_ARCH_BITS == 32
    3159     case SUPPAGINGMODE_32_BIT:
    3160     case SUPPAGINGMODE_32_BIT_GLOBAL:
    3161         for (unsigned i = PGM_TYPE_REAL; i <= PGM_TYPE_PAE; i++)
    3162         {
    3163             pModeData = &pVM->pgm.s.paModeData[pgmModeDataIndex(PGM_TYPE_NESTED, i)];
    3164             rc = PGM_SHW_NAME_32BIT(InitData)(      pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc);
    3165         }
    3166 # ifdef VBOX_WITH_64_BITS_GUESTS
    3167         pModeData = &pVM->pgm.s.paModeData[pgmModeDataIndex(PGM_TYPE_NESTED, PGM_TYPE_AMD64)];
    3168         rc = PGM_SHW_NAME_AMD64(InitData)(      pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc);
    3169 # endif
    3170         break;
    3171 
    3172     case SUPPAGINGMODE_PAE:
    3173     case SUPPAGINGMODE_PAE_NX:
    3174     case SUPPAGINGMODE_PAE_GLOBAL:
    3175     case SUPPAGINGMODE_PAE_GLOBAL_NX:
    3176         for (unsigned i = PGM_TYPE_REAL; i <= PGM_TYPE_PAE; i++)
    3177         {
    3178             pModeData = &pVM->pgm.s.paModeData[pgmModeDataIndex(PGM_TYPE_NESTED, i)];
    3179             rc = PGM_SHW_NAME_PAE(InitData)(      pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc);
    3180         }
    3181 # ifdef VBOX_WITH_64_BITS_GUESTS
    3182         pModeData = &pVM->pgm.s.paModeData[pgmModeDataIndex(PGM_TYPE_NESTED, PGM_TYPE_AMD64)];
    3183         rc = PGM_SHW_NAME_AMD64(InitData)(      pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc);
    3184 # endif
    3185         break;
    3186 #endif /* HC_ARCH_BITS == 32 */
    3187 
    3188 #if HC_ARCH_BITS == 64 || defined(RT_OS_DARWIN)
    3189     case SUPPAGINGMODE_AMD64:
    3190     case SUPPAGINGMODE_AMD64_GLOBAL:
    3191     case SUPPAGINGMODE_AMD64_NX:
    3192     case SUPPAGINGMODE_AMD64_GLOBAL_NX:
    3193 # ifdef VBOX_WITH_64_BITS_GUESTS
    3194         for (unsigned i = PGM_TYPE_REAL; i <= PGM_TYPE_AMD64; i++)
    3195 # else
    3196         for (unsigned i = PGM_TYPE_REAL; i <= PGM_TYPE_PAE; i++)
    3197 # endif
    3198         {
    3199             pModeData = &pVM->pgm.s.paModeData[pgmModeDataIndex(PGM_TYPE_NESTED, i)];
    3200             rc = PGM_SHW_NAME_AMD64(InitData)(      pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc);
    3201         }
    3202         break;
    3203 #endif /* HC_ARCH_BITS == 64 || RT_OS_DARWIN */
    3204 
    3205     default:
    3206         AssertFailed();
    3207         break;
    3208     }
     3398    /* The PAE nested paging mode. */
     3399    pModeData = &pVM->pgm.s.paModeData[pgmModeDataIndex(PGM_TYPE_NESTED_PAE, PGM_TYPE_REAL)];
     3400    pModeData->uShwType = PGM_TYPE_NESTED_PAE;
     3401    pModeData->uGstType = PGM_TYPE_REAL;
     3402    rc = PGM_BTH_NAME_NESTED_PAE_REAL(InitData)( pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc);
     3403
     3404    pModeData = &pVM->pgm.s.paModeData[pgmModeDataIndex(PGM_TYPE_NESTED_PAE, PGMMODE_PROTECTED)];
     3405    pModeData->uShwType = PGM_TYPE_NESTED_PAE;
     3406    pModeData->uGstType = PGM_TYPE_PROT;
     3407    rc = PGM_BTH_NAME_NESTED_PAE_PROT(InitData)( pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc);
     3408
     3409    pModeData = &pVM->pgm.s.paModeData[pgmModeDataIndex(PGM_TYPE_NESTED_PAE, PGM_TYPE_32BIT)];
     3410    pModeData->uShwType = PGM_TYPE_NESTED_PAE;
     3411    pModeData->uGstType = PGM_TYPE_32BIT;
     3412    rc = PGM_BTH_NAME_NESTED_PAE_32BIT(InitData)(pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc);
     3413
     3414    pModeData = &pVM->pgm.s.paModeData[pgmModeDataIndex(PGM_TYPE_NESTED_PAE, PGM_TYPE_PAE)];
     3415    pModeData->uShwType = PGM_TYPE_NESTED_PAE;
     3416    pModeData->uGstType = PGM_TYPE_PAE;
     3417    rc = PGM_BTH_NAME_NESTED_PAE_PAE(InitData)(  pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc);
     3418
     3419#ifdef VBOX_WITH_64_BITS_GUESTS
     3420    pModeData = &pVM->pgm.s.paModeData[pgmModeDataIndex(PGM_TYPE_NESTED_PAE, PGM_TYPE_AMD64)];
     3421    pModeData->uShwType = PGM_TYPE_NESTED_PAE;
     3422    pModeData->uGstType = PGM_TYPE_AMD64;
     3423    rc = PGM_BTH_NAME_NESTED_PAE_AMD64(InitData)( pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc);
     3424#endif
     3425
     3426    /* The AMD64 nested paging mode. */
     3427    pModeData = &pVM->pgm.s.paModeData[pgmModeDataIndex(PGM_TYPE_NESTED_AMD64, PGM_TYPE_REAL)];
     3428    pModeData->uShwType = PGM_TYPE_NESTED_AMD64;
     3429    pModeData->uGstType = PGM_TYPE_REAL;
     3430    rc = PGM_BTH_NAME_NESTED_AMD64_REAL(InitData)( pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc);
     3431
     3432    pModeData = &pVM->pgm.s.paModeData[pgmModeDataIndex(PGM_TYPE_NESTED_AMD64, PGMMODE_PROTECTED)];
     3433    pModeData->uShwType = PGM_TYPE_NESTED_AMD64;
     3434    pModeData->uGstType = PGM_TYPE_PROT;
     3435    rc = PGM_BTH_NAME_NESTED_AMD64_PROT(InitData)( pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc);
     3436
     3437    pModeData = &pVM->pgm.s.paModeData[pgmModeDataIndex(PGM_TYPE_NESTED_AMD64, PGM_TYPE_32BIT)];
     3438    pModeData->uShwType = PGM_TYPE_NESTED_AMD64;
     3439    pModeData->uGstType = PGM_TYPE_32BIT;
     3440    rc = PGM_BTH_NAME_NESTED_AMD64_32BIT(InitData)(pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc);
     3441
     3442    pModeData = &pVM->pgm.s.paModeData[pgmModeDataIndex(PGM_TYPE_NESTED_AMD64, PGM_TYPE_PAE)];
     3443    pModeData->uShwType = PGM_TYPE_NESTED_AMD64;
     3444    pModeData->uGstType = PGM_TYPE_PAE;
     3445    rc = PGM_BTH_NAME_NESTED_AMD64_PAE(InitData)(  pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc);
     3446
     3447#ifdef VBOX_WITH_64_BITS_GUESTS
     3448    pModeData = &pVM->pgm.s.paModeData[pgmModeDataIndex(PGM_TYPE_NESTED_AMD64, PGM_TYPE_AMD64)];
     3449    pModeData->uShwType = PGM_TYPE_NESTED_AMD64;
     3450    pModeData->uGstType = PGM_TYPE_AMD64;
     3451    rc = PGM_BTH_NAME_NESTED_AMD64_AMD64(InitData)( pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc);
     3452#endif
    32093453
    32103454    /* Extended paging (EPT) / Intel VT-x */
    … …  
    32123456    pModeData->uShwType = PGM_TYPE_EPT;
    32133457    pModeData->uGstType = PGM_TYPE_REAL;
    3214     rc = PGM_SHW_NAME_EPT(InitData)(        pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc);
    32153458    rc = PGM_BTH_NAME_EPT_REAL(InitData)(   pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc);
    32163459
    … …  
    32183461    pModeData->uShwType = PGM_TYPE_EPT;
    32193462    pModeData->uGstType = PGM_TYPE_PROT;
    3220     rc = PGM_SHW_NAME_EPT(InitData)(        pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc);
    32213463    rc = PGM_BTH_NAME_EPT_PROT(InitData)(   pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc);
    32223464
    … …  
    32243466    pModeData->uShwType = PGM_TYPE_EPT;
    32253467    pModeData->uGstType = PGM_TYPE_32BIT;
    3226     rc = PGM_SHW_NAME_EPT(InitData)(        pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc);
    32273468    rc = PGM_BTH_NAME_EPT_32BIT(InitData)(  pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc);
    32283469
    … …  
    32303471    pModeData->uShwType = PGM_TYPE_EPT;
    32313472    pModeData->uGstType = PGM_TYPE_PAE;
    3232     rc = PGM_SHW_NAME_EPT(InitData)(        pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc);
    32333473    rc = PGM_BTH_NAME_EPT_PAE(InitData)(    pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc);
    32343474
    … …  
    32373477    pModeData->uShwType = PGM_TYPE_EPT;
    32383478    pModeData->uGstType = PGM_TYPE_AMD64;
    3239     rc = PGM_SHW_NAME_EPT(InitData)(        pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc);
    32403479    rc = PGM_BTH_NAME_EPT_AMD64(InitData)(  pVM, pModeData, fResolveGCAndR0); AssertRCReturn(rc, rc);
    32413480#endif
    … …  
    32673506    NOREF(idxGst);
    32683507
    3269     pVCpu->pgm.s.idxShadowModeData = pgmModeToType(enmShw);
     3508    uintptr_t idxShw = pVCpu->pgm.s.idxShadowModeData = pgmModeToType(enmShw);
     3509    Assert(g_aPgmShadowModeData[idxShw].uType == idxShw);
     3510    AssertPtr(g_aPgmShadowModeData[idxShw].pfnGetPage);
     3511    AssertPtr(g_aPgmShadowModeData[idxShw].pfnModifyPage);
     3512    AssertPtr(g_aPgmShadowModeData[idxShw].pfnExit);
     3513    AssertPtr(g_aPgmShadowModeData[idxShw].pfnEnter);
     3514    AssertPtr(g_aPgmShadowModeData[idxShw].pfnRelocate);
     3515    NOREF(idxShw);
     3516
    32703517    pVCpu->pgm.s.idxBothModeData   = pgmModeDataIndexByMode(enmShw, enmGst);
    32713518
    … …  
    32773524    Assert(pModeData->uGstType == pgmModeToType(enmGst));
    32783525    Assert(pModeData->uShwType == pgmModeToType(enmShw));
    3279 
    3280     /* shadow */
    3281     pVCpu->pgm.s.pfnR3ShwRelocate             = pModeData->pfnR3ShwRelocate;
    3282     pVCpu->pgm.s.pfnR3ShwExit                 = pModeData->pfnR3ShwExit;
    3283     pVCpu->pgm.s.pfnR3ShwGetPage              = pModeData->pfnR3ShwGetPage;
    3284     Assert(pVCpu->pgm.s.pfnR3ShwGetPage);
    3285     pVCpu->pgm.s.pfnR3ShwModifyPage           = pModeData->pfnR3ShwModifyPage;
    3286 
    3287     pVCpu->pgm.s.pfnRCShwGetPage              = pModeData->pfnRCShwGetPage;
    3288     pVCpu->pgm.s.pfnRCShwModifyPage           = pModeData->pfnRCShwModifyPage;
    3289 
    3290     pVCpu->pgm.s.pfnR0ShwGetPage              = pModeData->pfnR0ShwGetPage;
    3291     pVCpu->pgm.s.pfnR0ShwModifyPage           = pModeData->pfnR0ShwModifyPage;
    32923526
    32933527    /* both */
    … …  
    33413575static PGMMODE pgmR3CalcShadowMode(PVM pVM, PGMMODE enmGuestMode, SUPPAGINGMODE enmHostMode, PGMMODE enmShadowMode, VMMSWITCHER *penmSwitcher)
    33423576{
    3343 /** @todo NEM: Shadow paging.   */
    33443577    VMMSWITCHER enmSwitcher = VMMSWITCHER_INVALID;
    33453578    switch (enmGuestMode)
    … …  
    35103743            return PGMMODE_INVALID;
    35113744    }
    3512     /* Override the shadow mode is nested paging is active. */
     3745
     3746    /*
     3747     * Override the shadow mode when NEM or nested paging is active.
     3748     */
    35133749    if (VM_IS_NEM_ENABLED(pVM))
    35143750    {
    35153751        pVM->pgm.s.fNestedPaging = true;
    3516         enmShadowMode = PGMMODE_NESTED;
     3752        enmShadowMode = PGMMODE_EPT; /* whatever harmless... */
    35173753    }
    35183754    else
    35193755    {
    3520         pVM->pgm.s.fNestedPaging = HMIsNestedPagingActive(pVM);
    3521         if (pVM->pgm.s.fNestedPaging)
    3522             enmShadowMode = HMGetShwPagingMode(pVM);
     3756        bool fNestedPaging = HMIsNestedPagingActive(pVM);
     3757        pVM->pgm.s.fNestedPaging = fNestedPaging;
     3758        if (fNestedPaging)
     3759        {
     3760            if (HMIsVmxActive(pVM))
     3761                enmShadowMode = PGMMODE_EPT;
     3762            else
     3763            {
     3764                /* The nested SVM paging depends on the host one. */
     3765                Assert(HMIsSvmActive(pVM));
     3766                if (   enmGuestMode == PGMMODE_AMD64
     3767                    || enmGuestMode == PGMMODE_AMD64_NX)
     3768                    enmShadowMode = PGMMODE_NESTED_AMD64;
     3769                else
     3770                    switch (pVM->pgm.s.enmHostMode)
     3771                    {
     3772                        case SUPPAGINGMODE_32_BIT:
     3773                        case SUPPAGINGMODE_32_BIT_GLOBAL:
     3774                            enmShadowMode = PGMMODE_NESTED_32BIT;
     3775                            break;
     3776
     3777                        case SUPPAGINGMODE_PAE:
     3778                        case SUPPAGINGMODE_PAE_GLOBAL:
     3779                        case SUPPAGINGMODE_PAE_NX:
     3780                        case SUPPAGINGMODE_PAE_GLOBAL_NX:
     3781                            enmShadowMode = PGMMODE_NESTED_PAE;
     3782                            break;
     3783
     3784#if HC_ARCH_BITS == 64 || defined(RT_OS_DARWIN)
     3785                        case SUPPAGINGMODE_AMD64:
     3786                        case SUPPAGINGMODE_AMD64_GLOBAL:
     3787                        case SUPPAGINGMODE_AMD64_NX:
     3788                        case SUPPAGINGMODE_AMD64_GLOBAL_NX:
     3789                            enmShadowMode = PGMMODE_NESTED_AMD64;
     3790                            break;
     3791#endif
     3792                        default:
     3793                            AssertLogRelFailedReturn(PGMMODE_INVALID);
     3794                    }
     3795            }
     3796        }
    35233797    }
    35243798
    … …  
    35423816VMMR3DECL(int) PGMR3ChangeMode(PVM pVM, PVMCPU pVCpu, PGMMODE enmGuestMode)
    35433817{
    3544 #if HC_ARCH_BITS == 32
    3545     bool fIsOldGuestPagingMode64Bits = (pVCpu->pgm.s.enmGuestMode >= PGMMODE_AMD64);
    3546 #endif
    3547     bool fIsNewGuestPagingMode64Bits = (enmGuestMode >= PGMMODE_AMD64);
    3548 
    35493818    Log(("PGMR3ChangeMode: Guest mode: %s -> %s\n", PGMGetModeName(pVCpu->pgm.s.enmGuestMode), PGMGetModeName(enmGuestMode)));
    35503819    STAM_REL_COUNTER_INC(&pVCpu->pgm.s.cGuestModeChanges);
    … …  
    35763845     * Exit old mode(s).
    35773846     */
    3578 #if HC_ARCH_BITS == 32
    3579     /* The nested shadow paging mode for AMD-V does change when running 64 bits guests on 32 bits hosts; typically PAE <-> AMD64 */
    3580     const bool fForceShwEnterExit = (    fIsOldGuestPagingMode64Bits != fIsNewGuestPagingMode64Bits
    3581                                      &&  enmShadowMode == PGMMODE_NESTED);
    3582 #else
    3583     const bool fForceShwEnterExit = false;
    3584 #endif
    35853847    /* shadow */
    3586     if (    enmShadowMode != pVCpu->pgm.s.enmShadowMode
    3587         ||  fForceShwEnterExit)
     3848    if (enmShadowMode != pVCpu->pgm.s.enmShadowMode)
    35883849    {
    35893850        LogFlow(("PGMR3ChangeMode: Shadow mode: %s -> %s\n",  PGMGetModeName(pVCpu->pgm.s.enmShadowMode), PGMGetModeName(enmShadowMode)));
    3590         if (PGM_SHW_PFN(Exit, pVCpu))
     3851        uintptr_t idxOldShw = pVCpu->pgm.s.idxShadowModeData;
     3852        if (   idxOldShw < RT_ELEMENTS(g_aPgmShadowModeData)
     3853            && g_aPgmShadowModeData[idxOldShw].pfnExit)
    35913854        {
    3592             int rc = PGM_SHW_PFN(Exit, pVCpu)(pVCpu);
    3593             if (RT_FAILURE(rc))
    3594             {
    3595                 AssertMsgFailed(("Exit failed for shadow mode %d: %Rrc\n", pVCpu->pgm.s.enmShadowMode, rc));
    3596                 return rc;
    3597             }
     3855            int rc = g_aPgmShadowModeData[idxOldShw].pfnExit(pVCpu);
     3856            AssertMsgRCReturn(rc, ("Exit failed for shadow mode %d: %Rrc\n", pVCpu->pgm.s.enmShadowMode, rc), rc);
    35983857        }
    3599 
    36003858    }
    36013859    else
    … …  
    36203878     * Enter new shadow mode (if changed).
    36213879     */
    3622     if (    enmShadowMode != pVCpu->pgm.s.enmShadowMode
    3623         ||  fForceShwEnterExit)
     3880    if (enmShadowMode != pVCpu->pgm.s.enmShadowMode)
    36243881    {
    36253882        int rc;
     3883        bool const fIsNewGuestPagingMode64Bits = enmGuestMode >= PGMMODE_AMD64;
    36263884        pVCpu->pgm.s.enmShadowMode = enmShadowMode;
    36273885        switch (enmShadowMode)
    … …  
    36383896                rc = PGM_SHW_NAME_AMD64(Enter)(pVCpu, fIsNewGuestPagingMode64Bits);
    36393897                break;
    3640             case PGMMODE_NESTED:
    3641                 rc = PGM_SHW_NAME_NESTED(Enter)(pVCpu, fIsNewGuestPagingMode64Bits);
     3898            case PGMMODE_NESTED_32BIT:
     3899                rc = PGM_SHW_NAME_NESTED_32BIT(Enter)(pVCpu, fIsNewGuestPagingMode64Bits);
     3900                break;
     3901            case PGMMODE_NESTED_PAE:
     3902                rc = PGM_SHW_NAME_NESTED_PAE(Enter)(pVCpu, fIsNewGuestPagingMode64Bits);
     3903                break;
     3904            case PGMMODE_NESTED_AMD64:
     3905                rc = PGM_SHW_NAME_NESTED_AMD64(Enter)(pVCpu, fIsNewGuestPagingMode64Bits);
    36423906                break;
    36433907            case PGMMODE_EPT:
    … …  
    36833947                    rc2 = PGM_BTH_NAME_PAE_REAL(Enter)(pVCpu, NIL_RTGCPHYS);
    36843948                    break;
    3685                 case PGMMODE_NESTED:
    3686                     rc2 = PGM_BTH_NAME_NESTED_REAL(Enter)(pVCpu, NIL_RTGCPHYS);
     3949                case PGMMODE_NESTED_32BIT:
     3950                    rc2 = PGM_BTH_NAME_NESTED_32BIT_REAL(Enter)(pVCpu, NIL_RTGCPHYS);
     3951                    break;
     3952                case PGMMODE_NESTED_PAE:
     3953                    rc2 = PGM_BTH_NAME_NESTED_PAE_REAL(Enter)(pVCpu, NIL_RTGCPHYS);
     3954                    break;
     3955                case PGMMODE_NESTED_AMD64:
     3956                    rc2 = PGM_BTH_NAME_NESTED_AMD64_REAL(Enter)(pVCpu, NIL_RTGCPHYS);
    36873957                    break;
    36883958                case PGMMODE_EPT:
    … …  
    37073977                    rc2 = PGM_BTH_NAME_PAE_PROT(Enter)(pVCpu, NIL_RTGCPHYS);
    37083978                    break;
    3709                 case PGMMODE_NESTED:
    3710                     rc2 = PGM_BTH_NAME_NESTED_PROT(Enter)(pVCpu, NIL_RTGCPHYS);
     3979                case PGMMODE_NESTED_32BIT:
     3980                    rc2 = PGM_BTH_NAME_NESTED_32BIT_PROT(Enter)(pVCpu, NIL_RTGCPHYS);
     3981                    break;
     3982                case PGMMODE_NESTED_PAE:
     3983                    rc2 = PGM_BTH_NAME_NESTED_PAE_PROT(Enter)(pVCpu, NIL_RTGCPHYS);
     3984                    break;
     3985                case PGMMODE_NESTED_AMD64:
     3986                    rc2 = PGM_BTH_NAME_NESTED_AMD64_PROT(Enter)(pVCpu, NIL_RTGCPHYS);
    37113987                    break;
    37123988                case PGMMODE_EPT:
    … …  
    37324008                    rc2 = PGM_BTH_NAME_PAE_32BIT(Enter)(pVCpu, GCPhysCR3);
    37334009                    break;
    3734                 case PGMMODE_NESTED:
    3735                     rc2 = PGM_BTH_NAME_NESTED_32BIT(Enter)(pVCpu, GCPhysCR3);
     4010                case PGMMODE_NESTED_32BIT:
     4011                    rc2 = PGM_BTH_NAME_NESTED_32BIT_32BIT(Enter)(pVCpu, GCPhysCR3);
     4012                    break;
     4013                case PGMMODE_NESTED_PAE:
     4014                    rc2 = PGM_BTH_NAME_NESTED_PAE_32BIT(Enter)(pVCpu, GCPhysCR3);
     4015                    break;
     4016                case PGMMODE_NESTED_AMD64:
     4017                    rc2 = PGM_BTH_NAME_NESTED_AMD64_32BIT(Enter)(pVCpu, GCPhysCR3);
    37364018                    break;
    37374019                case PGMMODE_EPT:
    … …  
    37634045                    rc2 = PGM_BTH_NAME_PAE_PAE(Enter)(pVCpu, GCPhysCR3);
    37644046                    break;
    3765                 case PGMMODE_NESTED:
    3766                     rc2 = PGM_BTH_NAME_NESTED_PAE(Enter)(pVCpu, GCPhysCR3);
     4047                case PGMMODE_NESTED_32BIT:
     4048                    rc2 = PGM_BTH_NAME_NESTED_32BIT_PAE(Enter)(pVCpu, GCPhysCR3);
     4049                    break;
     4050                case PGMMODE_NESTED_PAE:
     4051                    rc2 = PGM_BTH_NAME_NESTED_PAE_PAE(Enter)(pVCpu, GCPhysCR3);
     4052                    break;
     4053                case PGMMODE_NESTED_AMD64:
     4054                    rc2 = PGM_BTH_NAME_NESTED_AMD64_PAE(Enter)(pVCpu, GCPhysCR3);
    37674055                    break;
    37684056                case PGMMODE_EPT:
    … …  
    37894077                    rc2 = PGM_BTH_NAME_AMD64_AMD64(Enter)(pVCpu, GCPhysCR3);
    37904078                    break;
    3791                 case PGMMODE_NESTED:
    3792                     rc2 = PGM_BTH_NAME_NESTED_AMD64(Enter)(pVCpu, GCPhysCR3);
     4079                case PGMMODE_NESTED_32BIT:
     4080                    rc2 = PGM_BTH_NAME_NESTED_32BIT_AMD64(Enter)(pVCpu, GCPhysCR3);
     4081                    break;
     4082                case PGMMODE_NESTED_PAE:
     4083                    rc2 = PGM_BTH_NAME_NESTED_PAE_AMD64(Enter)(pVCpu, GCPhysCR3);
     4084                    break;
     4085                case PGMMODE_NESTED_AMD64:
     4086                    rc2 = PGM_BTH_NAME_NESTED_AMD64_AMD64(Enter)(pVCpu, GCPhysCR3);
    37934087                    break;
    37944088                case PGMMODE_EPT:
    … …  
    38424136
    38434137    /* Exit the current shadow paging mode as well; nested paging and EPT use a root CR3 which will get flushed here. */
    3844     rc = PGM_SHW_PFN(Exit, pVCpu)(pVCpu);
    3845     AssertRC(rc);
     4138    uintptr_t idxShw = pVCpu->pgm.s.idxShadowModeData;
     4139    if (   idxShw < RT_ELEMENTS(g_aPgmShadowModeData)
     4140        && g_aPgmShadowModeData[idxShw].pfnExit)
     4141    {
     4142        rc = g_aPgmShadowModeData[idxShw].pfnExit(pVCpu);
     4143        AssertMsgRCReturn(rc, ("Exit failed for shadow mode %d: %Rrc\n", pVCpu->pgm.s.enmShadowMode, rc), rc);
     4144    }
     4145
    38464146    Assert(pVCpu->pgm.s.pShwPageCR3R3 == NULL);
    38474147    return rc;
    … …  
    38654165
    38664166    Assert(pVCpu->pgm.s.pShwPageCR3R3 != NULL);
    3867     AssertMsg(   pVCpu->pgm.s.enmShadowMode >= PGMMODE_NESTED
     4167    AssertMsg(   pVCpu->pgm.s.enmShadowMode >= PGMMODE_NESTED_32BIT
    38684168              || CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu),
    38694169              ("%RHp != %RHp %s\n", (RTHCPHYS)CPUMGetHyperCR3(pVCpu), PGMGetHyperCR3(pVCpu), PGMGetModeName(pVCpu->pgm.s.enmShadowMode)));

  • trunk/src/VBox/VMM/VMMR3/PGMBth.h

    r71222 r73246  
    6868        if (VM_IS_RAW_MODE_ENABLED(pVM))
    6969        {
    70 #if PGM_SHW_TYPE != PGM_TYPE_AMD64 && PGM_SHW_TYPE != PGM_TYPE_NESTED && PGM_SHW_TYPE != PGM_TYPE_EPT /* No AMD64 for traditional virtualization, only VT-x and AMD-V. */
     70#if PGM_SHW_TYPE != PGM_TYPE_AMD64 && !PGM_TYPE_IS_NESTED_OR_EPT(PGM_SHW_TYPE) /* No AMD64 for traditional virtualization, only VT-x and AMD-V. */
    7171            /* RC */
    7272            rc = PDMR3LdrGetSymbolRC(pVM, NULL,       PGM_BTH_NAME_RC_STR(Trap0eHandler),       &pModeData->pfnRCBthTrap0eHandler);
    … …  
    8888            rc = PDMR3LdrGetSymbolRC(pVM, NULL,       PGM_BTH_NAME_RC_STR(UnmapCR3),            &pModeData->pfnRCBthUnmapCR3);
    8989            AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_BTH_NAME_RC_STR(UnmapCR3), rc), rc);
    90 #endif /* Not AMD64 shadow paging. */
     90#endif /* Not AMD64 or nested/ept shadow paging. */
    9191        }
    9292

  • trunk/src/VBox/VMM/VMMR3/PGMPool.cpp

    r73097 r73246  
    491491     *        required. */
    492492    bool fCanUseHighMemory = HMIsNestedPagingActive(pVM)
    493                           && HMGetShwPagingMode(pVM) == PGMMODE_EPT;
     493                          && HMIsVmxActive(pVM);
    494494
    495495    pgmLock(pVM);

  • trunk/src/VBox/VMM/VMMR3/PGMShw.h

    r71222 r73246  
    111111RT_C_DECLS_BEGIN
    112112/* r3 */
    113 PGM_SHW_DECL(int, InitData)(PVM pVM, PPGMMODEDATA pModeData, bool fResolveGCAndR0);
    114113PGM_SHW_DECL(int, Enter)(PVMCPU pVCpu, bool fIs64BitsPagingMode);
    115114PGM_SHW_DECL(int, Relocate)(PVMCPU pVCpu, RTGCPTR offDelta);
    … …  
    123122
    124123/**
    125  * Initializes the guest bit of the paging mode data.
    126  *
    127  * @returns VBox status code.
    128  * @param   pVM             The cross context VM structure.
    129  * @param   pModeData       The pointer table to initialize (our members only).
    130  * @param   fResolveGCAndR0 Indicate whether or not GC and Ring-0 symbols can be resolved now.
    131  *                          This is used early in the init process to avoid trouble with PDM
    132  *                          not being initialized yet.
    133  */
    134 PGM_SHW_DECL(int, InitData)(PVM pVM, PPGMMODEDATA pModeData, bool fResolveGCAndR0)
    135 {
    136 #if PGM_SHW_TYPE != PGM_TYPE_NESTED
    137     Assert(pModeData->uShwType == PGM_SHW_TYPE || pModeData->uShwType == PGM_TYPE_NESTED);
    138 #else
    139     Assert(pModeData->uShwType == PGM_SHW_TYPE);
    140 #endif
    141 
    142     /* Ring-3 */
    143     pModeData->pfnR3ShwRelocate          = PGM_SHW_NAME(Relocate);
    144     pModeData->pfnR3ShwExit              = PGM_SHW_NAME(Exit);
    145     pModeData->pfnR3ShwGetPage           = PGM_SHW_NAME(GetPage);
    146     pModeData->pfnR3ShwModifyPage        = PGM_SHW_NAME(ModifyPage);
    147 
    148     if (fResolveGCAndR0)
    149     {
    150         int rc;
    151 
    152         if (VM_IS_RAW_MODE_ENABLED(pVM))
    153         {
    154 #if PGM_SHW_TYPE != PGM_TYPE_AMD64 && PGM_SHW_TYPE != PGM_TYPE_NESTED && PGM_SHW_TYPE != PGM_TYPE_EPT /* No AMD64 for traditional virtualization, only VT-x and AMD-V. */
    155             /* GC */
    156             rc = PDMR3LdrGetSymbolRC(pVM, NULL,       PGM_SHW_NAME_RC_STR(GetPage),    &pModeData->pfnRCShwGetPage);
    157             AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_SHW_NAME_RC_STR(GetPage),  rc), rc);
    158             rc = PDMR3LdrGetSymbolRC(pVM, NULL,       PGM_SHW_NAME_RC_STR(ModifyPage), &pModeData->pfnRCShwModifyPage);
    159             AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_SHW_NAME_RC_STR(ModifyPage), rc), rc);
    160 #endif /* Not AMD64 shadow paging. */
    161         }
    162 
    163         /* Ring-0 */
    164         rc = PDMR3LdrGetSymbolR0(pVM, NULL,       PGM_SHW_NAME_R0_STR(GetPage),    &pModeData->pfnR0ShwGetPage);
    165         AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_SHW_NAME_R0_STR(GetPage),  rc), rc);
    166         rc = PDMR3LdrGetSymbolR0(pVM, NULL,       PGM_SHW_NAME_R0_STR(ModifyPage), &pModeData->pfnR0ShwModifyPage);
    167         AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_SHW_NAME_R0_STR(ModifyPage), rc), rc);
    168     }
    169     return VINF_SUCCESS;
    170 }
    171 
    172 /**
    173124 * Enters the shadow mode.
    174125 *
    … …  
    179130PGM_SHW_DECL(int, Enter)(PVMCPU pVCpu, bool fIs64BitsPagingMode)
    180131{
    181 #if PGM_SHW_TYPE == PGM_TYPE_NESTED || PGM_SHW_TYPE == PGM_TYPE_EPT
    182 
    183 # if PGM_SHW_TYPE == PGM_TYPE_NESTED && HC_ARCH_BITS == 32
     132#if PGM_TYPE_IS_NESTED_OR_EPT(PGM_SHW_TYPE)
     133
     134# if PGM_TYPE_IS_NESTED(PGM_SHW_TYPE) && HC_ARCH_BITS == 32
    184135    /* Must distinguish between 32 and 64 bits guest paging modes as we'll use
    185136       a different shadow paging root/mode in both cases. */
    … …  
    239190PGM_SHW_DECL(int, Exit)(PVMCPU pVCpu)
    240191{
     192#if PGM_TYPE_IS_NESTED_OR_EPT(PGM_SHW_TYPE)
    241193    PVM pVM = pVCpu->pVMR3;
    242 
    243     if (    (   pVCpu->pgm.s.enmShadowMode == PGMMODE_NESTED
    244              || pVCpu->pgm.s.enmShadowMode == PGMMODE_EPT)
    245         &&  pVCpu->pgm.s.CTX_SUFF(pShwPageCR3))
     194    if (pVCpu->pgm.s.CTX_SUFF(pShwPageCR3))
    246195    {
    247196        PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
    … …  
    265214        Log(("Leave nested shadow paging mode\n"));
    266215    }
     216#else
     217    RT_NOREF_PV(pVCpu);
     218#endif
    267219    return VINF_SUCCESS;
    268220}

  • trunk/src/VBox/VMM/include/PGMInternal.h

    r73202 r73246  
    210210#define PGM_TYPE_PAE                    4
    211211#define PGM_TYPE_AMD64                  5
    212 #define PGM_TYPE_NESTED                 6
    213 #define PGM_TYPE_EPT                    7
     212#define PGM_TYPE_NESTED_32BIT           6
     213#define PGM_TYPE_NESTED_PAE             7
     214#define PGM_TYPE_NESTED_AMD64           8
     215#define PGM_TYPE_EPT                    9
    214216#define PGM_TYPE_MAX                    PGM_TYPE_EPT
    215217/** @} */
    … …  
    222224#define PGM_WITH_PAGING(uGstType, uShwType)  \
    223225    (   (uGstType) >= PGM_TYPE_32BIT \
    224      && (uShwType) != PGM_TYPE_NESTED \
    225      && (uShwType) != PGM_TYPE_EPT)
     226     && (uShwType) < PGM_TYPE_NESTED_32BIT)
    226227
    227228/** Macro for checking if the guest supports the NX bit.
    … …  
    232233#define PGM_WITH_NX(uGstType, uShwType)  \
    233234    (   (uGstType) >= PGM_TYPE_PAE \
    234      && (uShwType) != PGM_TYPE_NESTED \
    235      && (uShwType) != PGM_TYPE_EPT)
     235     && (uShwType) < PGM_TYPE_NESTED_32BIT)
     236
     237/** Macro for checking for nested or EPT.
     238 * @param   uType   PGM_TYPE_*
     239 */
     240#define PGM_TYPE_IS_NESTED(uType) \
     241     (   (uType) == PGM_TYPE_NESTED_32BIT \
     242      || (uType) == PGM_TYPE_NESTED_PAE \
     243      || (uType) == PGM_TYPE_NESTED_AMD64)
     244
     245/** Macro for checking for nested or EPT.
     246 * @param   uType   PGM_TYPE_*
     247 */
     248#define PGM_TYPE_IS_NESTED_OR_EPT(uType) \
     249      (   (uType) == PGM_TYPE_NESTED_32BIT \
     250       || (uType) == PGM_TYPE_NESTED_PAE \
     251       || (uType) == PGM_TYPE_NESTED_AMD64 \
     252       || (uType) == PGM_TYPE_EPT)
     253
    236254
    237255
    … …  
    29652983#endif
    29662984
    2967 #define PGM_GST_NAME_REAL(name)         PGM_CTX(pgm,GstReal##name)
    2968 #define PGM_GST_NAME_RC_REAL_STR(name)  "pgmRCGstReal" #name
    2969 #define PGM_GST_NAME_R0_REAL_STR(name)  "pgmR0GstReal" #name
    2970 #define PGM_GST_NAME_PROT(name)         PGM_CTX(pgm,GstProt##name)
    2971 #define PGM_GST_NAME_RC_PROT_STR(name)  "pgmRCGstProt" #name
    2972 #define PGM_GST_NAME_R0_PROT_STR(name)  "pgmR0GstProt" #name
    2973 #define PGM_GST_NAME_32BIT(name)        PGM_CTX(pgm,Gst32Bit##name)
    2974 #define PGM_GST_NAME_RC_32BIT_STR(name) "pgmRCGst32Bit" #name
    2975 #define PGM_GST_NAME_R0_32BIT_STR(name) "pgmR0Gst32Bit" #name
    2976 #define PGM_GST_NAME_PAE(name)          PGM_CTX(pgm,GstPAE##name)
    2977 #define PGM_GST_NAME_RC_PAE_STR(name)   "pgmRCGstPAE" #name
    2978 #define PGM_GST_NAME_R0_PAE_STR(name)   "pgmR0GstPAE" #name
    2979 #define PGM_GST_NAME_AMD64(name)        PGM_CTX(pgm,GstAMD64##name)
    2980 #define PGM_GST_NAME_RC_AMD64_STR(name) "pgmRCGstAMD64" #name
    2981 #define PGM_GST_NAME_R0_AMD64_STR(name) "pgmR0GstAMD64" #name
    2982 #define PGM_GST_DECL(type, name)        PGM_CTX_DECL(type) PGM_GST_NAME(name)
    2983 
    2984 #define PGM_SHW_NAME_32BIT(name)        PGM_CTX(pgm,Shw32Bit##name)
    2985 #define PGM_SHW_NAME_RC_32BIT_STR(name) "pgmRCShw32Bit" #name
    2986 #define PGM_SHW_NAME_R0_32BIT_STR(name) "pgmR0Shw32Bit" #name
    2987 #define PGM_SHW_NAME_PAE(name)          PGM_CTX(pgm,ShwPAE##name)
    2988 #define PGM_SHW_NAME_RC_PAE_STR(name)   "pgmRCShwPAE" #name
    2989 #define PGM_SHW_NAME_R0_PAE_STR(name)   "pgmR0ShwPAE" #name
    2990 #define PGM_SHW_NAME_AMD64(name)        PGM_CTX(pgm,ShwAMD64##name)
    2991 #define PGM_SHW_NAME_RC_AMD64_STR(name) "pgmRCShwAMD64" #name
    2992 #define PGM_SHW_NAME_R0_AMD64_STR(name) "pgmR0ShwAMD64" #name
    2993 #define PGM_SHW_NAME_NESTED(name)        PGM_CTX(pgm,ShwNested##name)
    2994 #define PGM_SHW_NAME_RC_NESTED_STR(name) "pgmRCShwNested" #name
    2995 #define PGM_SHW_NAME_R0_NESTED_STR(name) "pgmR0ShwNested" #name
    2996 #define PGM_SHW_NAME_EPT(name)          PGM_CTX(pgm,ShwEPT##name)
    2997 #define PGM_SHW_NAME_RC_EPT_STR(name)   "pgmRCShwEPT" #name
    2998 #define PGM_SHW_NAME_R0_EPT_STR(name)   "pgmR0ShwEPT" #name
    2999 #define PGM_SHW_DECL(type, name)        PGM_CTX_DECL(type) PGM_SHW_NAME(name)
    3000 #define PGM_SHW_PFN(name, pVCpu)        ((pVCpu)->pgm.s.PGM_CTX(pfn,Shw##name))
     2985#define PGM_GST_NAME_REAL(name)                         PGM_CTX(pgm,GstReal##name)
     2986#define PGM_GST_NAME_RC_REAL_STR(name)                  "pgmRCGstReal" #name
     2987#define PGM_GST_NAME_R0_REAL_STR(name)                  "pgmR0GstReal" #name
     2988#define PGM_GST_NAME_PROT(name)                         PGM_CTX(pgm,GstProt##name)
     2989#define PGM_GST_NAME_RC_PROT_STR(name)                  "pgmRCGstProt" #name
     2990#define PGM_GST_NAME_R0_PROT_STR(name)                  "pgmR0GstProt" #name
     2991#define PGM_GST_NAME_32BIT(name)                        PGM_CTX(pgm,Gst32Bit##name)
     2992#define PGM_GST_NAME_RC_32BIT_STR(name)                 "pgmRCGst32Bit" #name
     2993#define PGM_GST_NAME_R0_32BIT_STR(name)                 "pgmR0Gst32Bit" #name
     2994#define PGM_GST_NAME_PAE(name)                          PGM_CTX(pgm,GstPAE##name)
     2995#define PGM_GST_NAME_RC_PAE_STR(name)                   "pgmRCGstPAE" #name
     2996#define PGM_GST_NAME_R0_PAE_STR(name)                   "pgmR0GstPAE" #name
     2997#define PGM_GST_NAME_AMD64(name)                        PGM_CTX(pgm,GstAMD64##name)
     2998#define PGM_GST_NAME_RC_AMD64_STR(name)                 "pgmRCGstAMD64" #name
     2999#define PGM_GST_NAME_R0_AMD64_STR(name)                 "pgmR0GstAMD64" #name
     3000#define PGM_GST_DECL(type, name)                        PGM_CTX_DECL(type) PGM_GST_NAME(name)
     3001
     3002#define PGM_SHW_NAME_32BIT(name)                        PGM_CTX(pgm,Shw32Bit##name)
     3003#define PGM_SHW_NAME_RC_32BIT_STR(name)                 "pgmRCShw32Bit" #name
     3004#define PGM_SHW_NAME_R0_32BIT_STR(name)                 "pgmR0Shw32Bit" #name
     3005#define PGM_SHW_NAME_PAE(name)                          PGM_CTX(pgm,ShwPAE##name)
     3006#define PGM_SHW_NAME_RC_PAE_STR(name)                   "pgmRCShwPAE" #name
     3007#define PGM_SHW_NAME_R0_PAE_STR(name)                   "pgmR0ShwPAE" #name
     3008#define PGM_SHW_NAME_AMD64(name)                        PGM_CTX(pgm,ShwAMD64##name)
     3009#define PGM_SHW_NAME_RC_AMD64_STR(name)                 "pgmRCShwAMD64" #name
     3010#define PGM_SHW_NAME_R0_AMD64_STR(name)                 "pgmR0ShwAMD64" #name
     3011#define PGM_SHW_NAME_NESTED_32BIT(name)                 PGM_CTX(pgm,ShwNested32Bit##name)
     3012#define PGM_SHW_NAME_RC_NESTED_32BIT_STR(name)          "pgmRCShwNested32Bit" #name
     3013#define PGM_SHW_NAME_R0_NESTED_32BIT_STR(name)          "pgmR0ShwNested32Bit" #name
     3014#define PGM_SHW_NAME_NESTED_PAE(name)                   PGM_CTX(pgm,ShwNestedPAE##name)
     3015#define PGM_SHW_NAME_RC_NESTED_PAE_STR(name)            "pgmRCShwNestedPAE" #name
     3016#define PGM_SHW_NAME_R0_NESTED_PAE_STR(name)            "pgmR0ShwNestedPAE" #name
     3017#define PGM_SHW_NAME_NESTED_AMD64(name)                 PGM_CTX(pgm,ShwNestedAMD64##name)
     3018#define PGM_SHW_NAME_RC_NESTED_AMD64_STR(name)          "pgmRCShwNestedAMD64" #name
     3019#define PGM_SHW_NAME_R0_NESTED_AMD64_STR(name)          "pgmR0ShwNestedAMD64" #name
     3020#define PGM_SHW_NAME_EPT(name)                          PGM_CTX(pgm,ShwEPT##name)
     3021#define PGM_SHW_NAME_RC_EPT_STR(name)                   "pgmRCShwEPT" #name
     3022#define PGM_SHW_NAME_R0_EPT_STR(name)                   "pgmR0ShwEPT" #name
     3023#define PGM_SHW_DECL(type, name)                        PGM_CTX_DECL(type) PGM_SHW_NAME(name)
    30013024
    30023025/*                   Shw_Gst */
    3003 #define PGM_BTH_NAME_32BIT_REAL(name)   PGM_CTX(pgm,Bth32BitReal##name)
    3004 #define PGM_BTH_NAME_32BIT_PROT(name)   PGM_CTX(pgm,Bth32BitProt##name)
    3005 #define PGM_BTH_NAME_32BIT_32BIT(name)  PGM_CTX(pgm,Bth32Bit32Bit##name)
    3006 #define PGM_BTH_NAME_PAE_REAL(name)     PGM_CTX(pgm,BthPAEReal##name)
    3007 #define PGM_BTH_NAME_PAE_PROT(name)     PGM_CTX(pgm,BthPAEProt##name)
    3008 #define PGM_BTH_NAME_PAE_32BIT(name)    PGM_CTX(pgm,BthPAE32Bit##name)
    3009 #define PGM_BTH_NAME_PAE_PAE(name)      PGM_CTX(pgm,BthPAEPAE##name)
    3010 #define PGM_BTH_NAME_AMD64_PROT(name)   PGM_CTX(pgm,BthAMD64Prot##name)
    3011 #define PGM_BTH_NAME_AMD64_AMD64(name)  PGM_CTX(pgm,BthAMD64AMD64##name)
    3012 #define PGM_BTH_NAME_NESTED_REAL(name)  PGM_CTX(pgm,BthNestedReal##name)
    3013 #define PGM_BTH_NAME_NESTED_PROT(name)  PGM_CTX(pgm,BthNestedProt##name)
    3014 #define PGM_BTH_NAME_NESTED_32BIT(name) PGM_CTX(pgm,BthNested32Bit##name)
    3015 #define PGM_BTH_NAME_NESTED_PAE(name)   PGM_CTX(pgm,BthNestedPAE##name)
    3016 #define PGM_BTH_NAME_NESTED_AMD64(name) PGM_CTX(pgm,BthNestedAMD64##name)
    3017 #define PGM_BTH_NAME_EPT_REAL(name)     PGM_CTX(pgm,BthEPTReal##name)
    3018 #define PGM_BTH_NAME_EPT_PROT(name)     PGM_CTX(pgm,BthEPTProt##name)
    3019 #define PGM_BTH_NAME_EPT_32BIT(name)    PGM_CTX(pgm,BthEPT32Bit##name)
    3020 #define PGM_BTH_NAME_EPT_PAE(name)      PGM_CTX(pgm,BthEPTPAE##name)
    3021 #define PGM_BTH_NAME_EPT_AMD64(name)    PGM_CTX(pgm,BthEPTAMD64##name)
    3022 
    3023 #define PGM_BTH_NAME_RC_32BIT_REAL_STR(name)    "pgmRCBth32BitReal" #name
    3024 #define PGM_BTH_NAME_RC_32BIT_PROT_STR(name)    "pgmRCBth32BitProt" #name
    3025 #define PGM_BTH_NAME_RC_32BIT_32BIT_STR(name)   "pgmRCBth32Bit32Bit" #name
    3026 #define PGM_BTH_NAME_RC_PAE_REAL_STR(name)      "pgmRCBthPAEReal" #name
    3027 #define PGM_BTH_NAME_RC_PAE_PROT_STR(name)      "pgmRCBthPAEProt" #name
    3028 #define PGM_BTH_NAME_RC_PAE_32BIT_STR(name)     "pgmRCBthPAE32Bit" #name
    3029 #define PGM_BTH_NAME_RC_PAE_PAE_STR(name)       "pgmRCBthPAEPAE" #name
    3030 #define PGM_BTH_NAME_RC_AMD64_AMD64_STR(name)   "pgmRCBthAMD64AMD64" #name
    3031 #define PGM_BTH_NAME_RC_NESTED_REAL_STR(name)   "pgmRCBthNestedReal" #name
    3032 #define PGM_BTH_NAME_RC_NESTED_PROT_STR(name)   "pgmRCBthNestedProt" #name
    3033 #define PGM_BTH_NAME_RC_NESTED_32BIT_STR(name)  "pgmRCBthNested32Bit" #name
    3034 #define PGM_BTH_NAME_RC_NESTED_PAE_STR(name)    "pgmRCBthNestedPAE" #name
    3035 #define PGM_BTH_NAME_RC_NESTED_AMD64_STR(name)  "pgmRCBthNestedAMD64" #name
    3036 #define PGM_BTH_NAME_RC_EPT_REAL_STR(name)      "pgmRCBthEPTReal" #name
    3037 #define PGM_BTH_NAME_RC_EPT_PROT_STR(name)      "pgmRCBthEPTProt" #name
    3038 #define PGM_BTH_NAME_RC_EPT_32BIT_STR(name)     "pgmRCBthEPT32Bit" #name
    3039 #define PGM_BTH_NAME_RC_EPT_PAE_STR(name)       "pgmRCBthEPTPAE" #name
    3040 #define PGM_BTH_NAME_RC_EPT_AMD64_STR(name)     "pgmRCBthEPTAMD64" #name
    3041 #define PGM_BTH_NAME_R0_32BIT_REAL_STR(name)    "pgmR0Bth32BitReal" #name
    3042 #define PGM_BTH_NAME_R0_32BIT_PROT_STR(name)    "pgmR0Bth32BitProt" #name
    3043 #define PGM_BTH_NAME_R0_32BIT_32BIT_STR(name)   "pgmR0Bth32Bit32Bit" #name
    3044 #define PGM_BTH_NAME_R0_PAE_REAL_STR(name)      "pgmR0BthPAEReal" #name
    3045 #define PGM_BTH_NAME_R0_PAE_PROT_STR(name)      "pgmR0BthPAEProt" #name
    3046 #define PGM_BTH_NAME_R0_PAE_32BIT_STR(name)     "pgmR0BthPAE32Bit" #name
    3047 #define PGM_BTH_NAME_R0_PAE_PAE_STR(name)       "pgmR0BthPAEPAE" #name
    3048 #define PGM_BTH_NAME_R0_AMD64_PROT_STR(name)    "pgmR0BthAMD64Prot" #name
    3049 #define PGM_BTH_NAME_R0_AMD64_AMD64_STR(name)   "pgmR0BthAMD64AMD64" #name
    3050 #define PGM_BTH_NAME_R0_NESTED_REAL_STR(name)   "pgmR0BthNestedReal" #name
    3051 #define PGM_BTH_NAME_R0_NESTED_PROT_STR(name)   "pgmR0BthNestedProt" #name
    3052 #define PGM_BTH_NAME_R0_NESTED_32BIT_STR(name)  "pgmR0BthNested32Bit" #name
    3053 #define PGM_BTH_NAME_R0_NESTED_PAE_STR(name)    "pgmR0BthNestedPAE" #name
    3054 #define PGM_BTH_NAME_R0_NESTED_AMD64_STR(name)  "pgmR0BthNestedAMD64" #name
    3055 #define PGM_BTH_NAME_R0_EPT_REAL_STR(name)      "pgmR0BthEPTReal" #name
    3056 #define PGM_BTH_NAME_R0_EPT_PROT_STR(name)      "pgmR0BthEPTProt" #name
    3057 #define PGM_BTH_NAME_R0_EPT_32BIT_STR(name)     "pgmR0BthEPT32Bit" #name
    3058 #define PGM_BTH_NAME_R0_EPT_PAE_STR(name)       "pgmR0BthEPTPAE" #name
    3059 #define PGM_BTH_NAME_R0_EPT_AMD64_STR(name)     "pgmR0BthEPTAMD64" #name
     3026#define PGM_BTH_NAME_32BIT_REAL(name)                   PGM_CTX(pgm,Bth32BitReal##name)
     3027#define PGM_BTH_NAME_32BIT_PROT(name)                   PGM_CTX(pgm,Bth32BitProt##name)
     3028#define PGM_BTH_NAME_32BIT_32BIT(name)                  PGM_CTX(pgm,Bth32Bit32Bit##name)
     3029#define PGM_BTH_NAME_PAE_REAL(name)                     PGM_CTX(pgm,BthPAEReal##name)
     3030#define PGM_BTH_NAME_PAE_PROT(name)                     PGM_CTX(pgm,BthPAEProt##name)
     3031#define PGM_BTH_NAME_PAE_32BIT(name)                    PGM_CTX(pgm,BthPAE32Bit##name)
     3032#define PGM_BTH_NAME_PAE_PAE(name)                      PGM_CTX(pgm,BthPAEPAE##name)
     3033#define PGM_BTH_NAME_AMD64_PROT(name)                   PGM_CTX(pgm,BthAMD64Prot##name)
     3034#define PGM_BTH_NAME_AMD64_AMD64(name)                  PGM_CTX(pgm,BthAMD64AMD64##name)
     3035#define PGM_BTH_NAME_NESTED_32BIT_REAL(name)            PGM_CTX(pgm,BthNested32BitReal##name)
     3036#define PGM_BTH_NAME_NESTED_32BIT_PROT(name)            PGM_CTX(pgm,BthNested32BitProt##name)
     3037#define PGM_BTH_NAME_NESTED_32BIT_32BIT(name)           PGM_CTX(pgm,BthNested32Bit32Bit##name)
     3038#define PGM_BTH_NAME_NESTED_32BIT_PAE(name)             PGM_CTX(pgm,BthNested32BitPAE##name)
     3039#define PGM_BTH_NAME_NESTED_32BIT_AMD64(name)           PGM_CTX(pgm,BthNested32BitAMD64##name)
     3040#define PGM_BTH_NAME_NESTED_PAE_REAL(name)              PGM_CTX(pgm,BthNestedPAEReal##name)
     3041#define PGM_BTH_NAME_NESTED_PAE_PROT(name)              PGM_CTX(pgm,BthNestedPAEProt##name)
     3042#define PGM_BTH_NAME_NESTED_PAE_32BIT(name)             PGM_CTX(pgm,BthNestedPAE32Bit##name)
     3043#define PGM_BTH_NAME_NESTED_PAE_PAE(name)               PGM_CTX(pgm,BthNestedPAEPAE##name)
     3044#define PGM_BTH_NAME_NESTED_PAE_AMD64(name)             PGM_CTX(pgm,BthNestedPAEAMD64##name)
     3045#define PGM_BTH_NAME_NESTED_AMD64_REAL(name)            PGM_CTX(pgm,BthNestedAMD64Real##name)
     3046#define PGM_BTH_NAME_NESTED_AMD64_PROT(name)            PGM_CTX(pgm,BthNestedAMD64Prot##name)
     3047#define PGM_BTH_NAME_NESTED_AMD64_32BIT(name)           PGM_CTX(pgm,BthNestedAMD6432Bit##name)
     3048#define PGM_BTH_NAME_NESTED_AMD64_PAE(name)             PGM_CTX(pgm,BthNestedAMD64PAE##name)
     3049#define PGM_BTH_NAME_NESTED_AMD64_AMD64(name)           PGM_CTX(pgm,BthNestedAMD64AMD64##name)
     3050#define PGM_BTH_NAME_EPT_REAL(name)                     PGM_CTX(pgm,BthEPTReal##name)
     3051#define PGM_BTH_NAME_EPT_PROT(name)                     PGM_CTX(pgm,BthEPTProt##name)
     3052#define PGM_BTH_NAME_EPT_32BIT(name)                    PGM_CTX(pgm,BthEPT32Bit##name)
     3053#define PGM_BTH_NAME_EPT_PAE(name)                      PGM_CTX(pgm,BthEPTPAE##name)
     3054#define PGM_BTH_NAME_EPT_AMD64(name)                    PGM_CTX(pgm,BthEPTAMD64##name)
     3055
     3056#define PGM_BTH_NAME_RC_32BIT_REAL_STR(name)            "pgmRCBth32BitReal" #name
     3057#define PGM_BTH_NAME_RC_32BIT_PROT_STR(name)            "pgmRCBth32BitProt" #name
     3058#define PGM_BTH_NAME_RC_32BIT_32BIT_STR(name)           "pgmRCBth32Bit32Bit" #name
     3059#define PGM_BTH_NAME_RC_PAE_REAL_STR(name)              "pgmRCBthPAEReal" #name
     3060#define PGM_BTH_NAME_RC_PAE_PROT_STR(name)              "pgmRCBthPAEProt" #name
     3061#define PGM_BTH_NAME_RC_PAE_32BIT_STR(name)             "pgmRCBthPAE32Bit" #name
     3062#define PGM_BTH_NAME_RC_PAE_PAE_STR(name)               "pgmRCBthPAEPAE" #name
     3063#define PGM_BTH_NAME_RC_AMD64_AMD64_STR(name)           "pgmRCBthAMD64AMD64" #name
     3064#define PGM_BTH_NAME_RC_NESTED_32BIT_REAL_STR(name)     "pgmRCBthNested32BitReal" #name
     3065#define PGM_BTH_NAME_RC_NESTED_32BIT_PROT_STR(name)     "pgmRCBthNested32BitProt" #name
     3066#define PGM_BTH_NAME_RC_NESTED_32BIT_32BIT_STR(name)    "pgmRCBthNested32Bit32Bit" #name
     3067#define PGM_BTH_NAME_RC_NESTED_32BIT_PAE_STR(name)      "pgmRCBthNested32BitPAE" #name
     3068#define PGM_BTH_NAME_RC_NESTED_32BIT_AMD64_STR(name)    "pgmRCBthNested32BitAMD64" #name
     3069#define PGM_BTH_NAME_RC_NESTED_PAE_REAL_STR(name)       "pgmRCBthNestedPAEReal" #name
     3070#define PGM_BTH_NAME_RC_NESTED_PAE_PROT_STR(name)       "pgmRCBthNestedPAEProt" #name
     3071#define PGM_BTH_NAME_RC_NESTED_PAE_32BIT_STR(name)      "pgmRCBthNestedPAE32Bit" #name
     3072#define PGM_BTH_NAME_RC_NESTED_PAE_PAE_STR(name)        "pgmRCBthNestedPAEPAE" #name
     3073#define PGM_BTH_NAME_RC_NESTED_PAE_AMD64_STR(name)      "pgmRCBthNestedPAEAMD64" #name
     3074#define PGM_BTH_NAME_RC_NESTED_AMD64_REAL_STR(name)     "pgmRCBthNestedAMD64Real" #name
     3075#define PGM_BTH_NAME_RC_NESTED_AMD64_PROT_STR(name)     "pgmRCBthNestedAMD64Prot" #name
     3076#define PGM_BTH_NAME_RC_NESTED_AMD64_32BIT_STR(name)    "pgmRCBthNestedAMD6432Bit" #name
     3077#define PGM_BTH_NAME_RC_NESTED_AMD64_PAE_STR(name)      "pgmRCBthNestedAMD64PAE" #name
     3078#define PGM_BTH_NAME_RC_NESTED_AMD64_AMD64_STR(name)    "pgmRCBthNestedAMD64AMD64" #name
     3079#define PGM_BTH_NAME_RC_EPT_REAL_STR(name)              "pgmRCBthEPTReal" #name
     3080#define PGM_BTH_NAME_RC_EPT_PROT_STR(name)              "pgmRCBthEPTProt" #name
     3081#define PGM_BTH_NAME_RC_EPT_32BIT_STR(name)             "pgmRCBthEPT32Bit" #name
     3082#define PGM_BTH_NAME_RC_EPT_PAE_STR(name)               "pgmRCBthEPTPAE" #name
     3083#define PGM_BTH_NAME_RC_EPT_AMD64_STR(name)             "pgmRCBthEPTAMD64" #name
     3084
     3085#define PGM_BTH_NAME_R0_32BIT_REAL_STR(name)            "pgmR0Bth32BitReal" #name
     3086#define PGM_BTH_NAME_R0_32BIT_PROT_STR(name)            "pgmR0Bth32BitProt" #name
     3087#define PGM_BTH_NAME_R0_32BIT_32BIT_STR(name)           "pgmR0Bth32Bit32Bit" #name
     3088#define PGM_BTH_NAME_R0_PAE_REAL_STR(name)              "pgmR0BthPAEReal" #name
     3089#define PGM_BTH_NAME_R0_PAE_PROT_STR(name)              "pgmR0BthPAEProt" #name
     3090#define PGM_BTH_NAME_R0_PAE_32BIT_STR(name)             "pgmR0BthPAE32Bit" #name
     3091#define PGM_BTH_NAME_R0_PAE_PAE_STR(name)               "pgmR0BthPAEPAE" #name
     3092#define PGM_BTH_NAME_R0_AMD64_PROT_STR(name)            "pgmR0BthAMD64Prot" #name
     3093#define PGM_BTH_NAME_R0_AMD64_AMD64_STR(name)           "pgmR0BthAMD64AMD64" #name
     3094#define PGM_BTH_NAME_R0_NESTED_32BIT_REAL_STR(name)     "pgmR0BthNested32BitReal" #name
     3095#define PGM_BTH_NAME_R0_NESTED_32BIT_PROT_STR(name)     "pgmR0BthNested32BitProt" #name
     3096#define PGM_BTH_NAME_R0_NESTED_32BIT_32BIT_STR(name)    "pgmR0BthNested32Bit32Bit" #name
     3097#define PGM_BTH_NAME_R0_NESTED_32BIT_PAE_STR(name)      "pgmR0BthNested32BitPAE" #name
     3098#define PGM_BTH_NAME_R0_NESTED_32BIT_AMD64_STR(name)    "pgmR0BthNested32BitAMD64" #name
     3099#define PGM_BTH_NAME_R0_NESTED_PAE_REAL_STR(name)       "pgmR0BthNestedPAEReal" #name
     3100#define PGM_BTH_NAME_R0_NESTED_PAE_PROT_STR(name)       "pgmR0BthNestedPAEProt" #name
     3101#define PGM_BTH_NAME_R0_NESTED_PAE_32BIT_STR(name)      "pgmR0BthNestedPAE32Bit" #name
     3102#define PGM_BTH_NAME_R0_NESTED_PAE_PAE_STR(name)        "pgmR0BthNestedPAEPAE" #name
     3103#define PGM_BTH_NAME_R0_NESTED_PAE_AMD64_STR(name)      "pgmR0BthNestedPAEAMD64" #name
     3104#define PGM_BTH_NAME_R0_NESTED_AMD64_REAL_STR(name)     "pgmR0BthNestedAMD64Real" #name
     3105#define PGM_BTH_NAME_R0_NESTED_AMD64_PROT_STR(name)     "pgmR0BthNestedAMD64Prot" #name
     3106#define PGM_BTH_NAME_R0_NESTED_AMD64_32BIT_STR(name)    "pgmR0BthNestedAMD6432Bit" #name
     3107#define PGM_BTH_NAME_R0_NESTED_AMD64_PAE_STR(name)      "pgmR0BthNestedAMD64PAE" #name
     3108#define PGM_BTH_NAME_R0_NESTED_AMD64_AMD64_STR(name)    "pgmR0BthNestedAMD64AMD64" #name
     3109#define PGM_BTH_NAME_R0_EPT_REAL_STR(name)              "pgmR0BthEPTReal" #name
     3110#define PGM_BTH_NAME_R0_EPT_PROT_STR(name)              "pgmR0BthEPTProt" #name
     3111#define PGM_BTH_NAME_R0_EPT_32BIT_STR(name)             "pgmR0BthEPT32Bit" #name
     3112#define PGM_BTH_NAME_R0_EPT_PAE_STR(name)               "pgmR0BthEPTPAE" #name
     3113#define PGM_BTH_NAME_R0_EPT_AMD64_STR(name)             "pgmR0BthEPTAMD64" #name
    30603114
    30613115#define PGM_BTH_DECL(type, name)        PGM_CTX_DECL(type) PGM_BTH_NAME(name)
    … …  
    30903144
    30913145/**
     3146 * Function pointers for shadow paging.
     3147 */
     3148typedef struct PGMMODEDATASHW
     3149{
     3150    /** The shadow mode type. */
     3151    uint32_t                        uType;
     3152    DECLCALLBACKMEMBER(int,         pfnGetPage)(PVMCPU pVCpu, RTGCPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys);
     3153    DECLCALLBACKMEMBER(int,         pfnModifyPage)(PVMCPU pVCpu, RTGCPTR GCPtr, size_t cbPages, uint64_t fFlags,
     3154                                                   uint64_t fMask, uint32_t fOpFlags);
     3155    DECLCALLBACKMEMBER(int,         pfnEnter)(PVMCPU pVCpu, bool fIs64BitsPagingMode);
     3156    DECLCALLBACKMEMBER(int,         pfnExit)(PVMCPU pVCpu);
     3157    DECLCALLBACKMEMBER(int,         pfnRelocate)(PVMCPU pVCpu, RTGCPTR offDelta); /**< Only in ring-3. */
     3158} PGMMODEDATASHW;
     3159
     3160/** The length of g_aPgmGuestModeData. */
     3161#ifndef IN_RC
     3162# define PGM_SHADOW_MODE_DATA_ARRAY_SIZE    (PGM_TYPE_MAX + 1)
     3163#else
     3164# define PGM_SHADOW_MODE_DATA_ARRAY_SIZE    (PGM_TYPE_PAE + 1)
     3165#endif
     3166/** The shadow mode data array. */
     3167extern PGMMODEDATASHW const g_aPgmShadowModeData[PGM_SHADOW_MODE_DATA_ARRAY_SIZE];
     3168
     3169
     3170
     3171/**
    30923172 * Data for each paging mode.
    30933173 */
    … …  
    30983178    /** The shadow mode type. */
    30993179    uint32_t                        uShwType;
    3100 
    3101     /** @name Function pointers for Shadow paging.
    3102      * @{
    3103      */
    3104     DECLR3CALLBACKMEMBER(int,       pfnR3ShwRelocate,(PVMCPU pVCpu, RTGCPTR offDelta));
    3105     DECLR3CALLBACKMEMBER(int,       pfnR3ShwExit,(PVMCPU pVCpu));
    3106     DECLR3CALLBACKMEMBER(int,       pfnR3ShwGetPage,(PVMCPU pVCpu, RTGCPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys));
    3107     DECLR3CALLBACKMEMBER(int,       pfnR3ShwModifyPage,(PVMCPU pVCpu, RTGCPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask, uint32_t fOpFlags));
    3108 
    3109     DECLRCCALLBACKMEMBER(int,       pfnRCShwGetPage,(PVMCPU pVCpu, RTGCPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys));
    3110     DECLRCCALLBACKMEMBER(int,       pfnRCShwModifyPage,(PVMCPU pVCpu, RTGCPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask, uint32_t fOpFlags));
    3111 
    3112     DECLR0CALLBACKMEMBER(int,       pfnR0ShwGetPage,(PVMCPU pVCpu, RTGCPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys));
    3113     DECLR0CALLBACKMEMBER(int,       pfnR0ShwModifyPage,(PVMCPU pVCpu, RTGCPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask, uint32_t fOpFlags));
    3114     /** @} */
    31153180
    31163181    /** @name Function pointers for Both Shadow and Guest paging.
    … …  
    40494114    /** @} */
    40504115
    4051     /** @name Function pointers for Shadow paging.
    4052      * @{
    4053      */
    4054     DECLR3CALLBACKMEMBER(int,       pfnR3ShwRelocate,(PVMCPU pVCpu, RTGCPTR offDelta));
    4055     DECLR3CALLBACKMEMBER(int,       pfnR3ShwExit,(PVMCPU pVCpu));
    4056     DECLR3CALLBACKMEMBER(int,       pfnR3ShwGetPage,(PVMCPU pVCpu, RTGCPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys));
    4057     DECLR3CALLBACKMEMBER(int,       pfnR3ShwModifyPage,(PVMCPU pVCpu, RTGCPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask, uint32_t fOpFlags));
    4058 
    4059     DECLRCCALLBACKMEMBER(int,       pfnRCShwGetPage,(PVMCPU pVCpu, RTGCPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys));
    4060     DECLRCCALLBACKMEMBER(int,       pfnRCShwModifyPage,(PVMCPU pVCpu, RTGCPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask, uint32_t fOpFlags));
    4061 
    4062     DECLR0CALLBACKMEMBER(int,       pfnR0ShwGetPage,(PVMCPU pVCpu, RTGCPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys));
    4063     DECLR0CALLBACKMEMBER(int,       pfnR0ShwModifyPage,(PVMCPU pVCpu, RTGCPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask, uint32_t fOpFlags));
    4064 
    4065     /** @} */
    4066 
    40674116    /** @name Function pointers for Both Shadow and Guest paging.
    40684117     * @{

  • trunk/src/VBox/VMM/testcase/tstVMStruct.h

    r73199 r73246  
    667667    GEN_CHECK_OFF(PGMCPU, pShwPageCR3R0);
    668668    GEN_CHECK_OFF(PGMCPU, pShwPageCR3RC);
    669     GEN_CHECK_OFF(PGMCPU, pfnR3ShwRelocate);
    670     GEN_CHECK_OFF(PGMCPU, pfnR3ShwExit);
    671     GEN_CHECK_OFF(PGMCPU, pfnR3ShwGetPage);
    672     GEN_CHECK_OFF(PGMCPU, pfnR3ShwModifyPage);
    673     GEN_CHECK_OFF(PGMCPU, pfnRCShwGetPage);
    674     GEN_CHECK_OFF(PGMCPU, pfnRCShwModifyPage);
    675669    GEN_CHECK_OFF(PGMCPU, pfnR3BthMapCR3);
    676670    GEN_CHECK_OFF(PGMCPU, pfnR3BthUnmapCR3);
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