Changeset 73286 in vbox
- Timestamp:
- Jul 21, 2018 4:50:20 AM (7 years ago)
- svn:sync-xref-src-repo-rev:
- 123893
- Location:
- trunk/include/VBox/vmm
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/include/VBox/vmm/hm_svm.h
r72744 r73286 80 80 # define SVM_EXIT_READ_CR8 0x8 81 81 # define SVM_EXIT_READ_CR9 0x9 82 # define SVM_EXIT_READ_CR10 0x A83 # define SVM_EXIT_READ_CR11 0x B84 # define SVM_EXIT_READ_CR12 0x C85 # define SVM_EXIT_READ_CR13 0x D86 # define SVM_EXIT_READ_CR14 0x E87 # define SVM_EXIT_READ_CR15 0x F82 # define SVM_EXIT_READ_CR10 0xa 83 # define SVM_EXIT_READ_CR11 0xb 84 # define SVM_EXIT_READ_CR12 0xc 85 # define SVM_EXIT_READ_CR13 0xd 86 # define SVM_EXIT_READ_CR14 0xe 87 # define SVM_EXIT_READ_CR15 0xf 88 88 /** Writes to CR0-CR15. */ 89 89 # define SVM_EXIT_WRITE_CR0 0x10 … … 97 97 # define SVM_EXIT_WRITE_CR8 0x18 98 98 # define SVM_EXIT_WRITE_CR9 0x19 99 # define SVM_EXIT_WRITE_CR10 0x1 A100 # define SVM_EXIT_WRITE_CR11 0x1 B101 # define SVM_EXIT_WRITE_CR12 0x1 C102 # define SVM_EXIT_WRITE_CR13 0x1 D103 # define SVM_EXIT_WRITE_CR14 0x1 E104 # define SVM_EXIT_WRITE_CR15 0x1 F99 # define SVM_EXIT_WRITE_CR10 0x1a 100 # define SVM_EXIT_WRITE_CR11 0x1b 101 # define SVM_EXIT_WRITE_CR12 0x1c 102 # define SVM_EXIT_WRITE_CR13 0x1d 103 # define SVM_EXIT_WRITE_CR14 0x1e 104 # define SVM_EXIT_WRITE_CR15 0x1f 105 105 /** Read from DR0-DR15. */ 106 106 # define SVM_EXIT_READ_DR0 0x20 … … 114 114 # define SVM_EXIT_READ_DR8 0x28 115 115 # define SVM_EXIT_READ_DR9 0x29 116 # define SVM_EXIT_READ_DR10 0x2 A117 # define SVM_EXIT_READ_DR11 0x2 B118 # define SVM_EXIT_READ_DR12 0x2 C119 # define SVM_EXIT_READ_DR13 0x2 D120 # define SVM_EXIT_READ_DR14 0x2 E121 # define SVM_EXIT_READ_DR15 0x2 F116 # define SVM_EXIT_READ_DR10 0x2a 117 # define SVM_EXIT_READ_DR11 0x2b 118 # define SVM_EXIT_READ_DR12 0x2c 119 # define SVM_EXIT_READ_DR13 0x2d 120 # define SVM_EXIT_READ_DR14 0x2e 121 # define SVM_EXIT_READ_DR15 0x2f 122 122 /** Writes to DR0-DR15. */ 123 123 # define SVM_EXIT_WRITE_DR0 0x30 … … 131 131 # define SVM_EXIT_WRITE_DR8 0x38 132 132 # define SVM_EXIT_WRITE_DR9 0x39 133 # define SVM_EXIT_WRITE_DR10 0x3 A134 # define SVM_EXIT_WRITE_DR11 0x3 B135 # define SVM_EXIT_WRITE_DR12 0x3 C136 # define SVM_EXIT_WRITE_DR13 0x3 D137 # define SVM_EXIT_WRITE_DR14 0x3 E138 # define SVM_EXIT_WRITE_DR15 0x3 F133 # define SVM_EXIT_WRITE_DR10 0x3a 134 # define SVM_EXIT_WRITE_DR11 0x3b 135 # define SVM_EXIT_WRITE_DR12 0x3c 136 # define SVM_EXIT_WRITE_DR13 0x3d 137 # define SVM_EXIT_WRITE_DR14 0x3e 138 # define SVM_EXIT_WRITE_DR15 0x3f 139 139 /* Exception 0-31. */ 140 140 # define SVM_EXIT_XCPT_0 0x40 … … 148 148 # define SVM_EXIT_XCPT_8 0x48 149 149 # define SVM_EXIT_XCPT_9 0x49 150 # define SVM_EXIT_XCPT_10 0x4 A151 # define SVM_EXIT_XCPT_11 0x4 B152 # define SVM_EXIT_XCPT_12 0x4 C153 # define SVM_EXIT_XCPT_13 0x4 D154 # define SVM_EXIT_XCPT_14 0x4 E155 # define SVM_EXIT_XCPT_15 0x4 F150 # define SVM_EXIT_XCPT_10 0x4a 151 # define SVM_EXIT_XCPT_11 0x4b 152 # define SVM_EXIT_XCPT_12 0x4c 153 # define SVM_EXIT_XCPT_13 0x4d 154 # define SVM_EXIT_XCPT_14 0x4e 155 # define SVM_EXIT_XCPT_15 0x4f 156 156 # define SVM_EXIT_XCPT_16 0x50 157 157 # define SVM_EXIT_XCPT_17 0x51 … … 164 164 # define SVM_EXIT_XCPT_24 0x58 165 165 # define SVM_EXIT_XCPT_25 0x59 166 # define SVM_EXIT_XCPT_26 0x5 A167 # define SVM_EXIT_XCPT_27 0x5 B168 # define SVM_EXIT_XCPT_28 0x5 C169 # define SVM_EXIT_XCPT_29 0x5 D170 # define SVM_EXIT_XCPT_30 0x5 E171 # define SVM_EXIT_XCPT_31 0x5 F166 # define SVM_EXIT_XCPT_26 0x5a 167 # define SVM_EXIT_XCPT_27 0x5b 168 # define SVM_EXIT_XCPT_28 0x5c 169 # define SVM_EXIT_XCPT_29 0x5d 170 # define SVM_EXIT_XCPT_30 0x5e 171 # define SVM_EXIT_XCPT_31 0x5f 172 172 /* Exception (more readable) */ 173 173 # define SVM_EXIT_XCPT_DE SVM_EXIT_XCPT_0 … … 213 213 # define SVM_EXIT_TR_READ 0x69 214 214 /** IDTR write. */ 215 # define SVM_EXIT_IDTR_WRITE 0x6 A215 # define SVM_EXIT_IDTR_WRITE 0x6a 216 216 /** GDTR write. */ 217 # define SVM_EXIT_GDTR_WRITE 0x6 B217 # define SVM_EXIT_GDTR_WRITE 0x6b 218 218 /** LDTR write. */ 219 # define SVM_EXIT_LDTR_WRITE 0x6 C219 # define SVM_EXIT_LDTR_WRITE 0x6c 220 220 /** TR write. */ 221 # define SVM_EXIT_TR_WRITE 0x6 D221 # define SVM_EXIT_TR_WRITE 0x6d 222 222 /** RDTSC instruction. */ 223 # define SVM_EXIT_RDTSC 0x6 E223 # define SVM_EXIT_RDTSC 0x6e 224 224 /** RDPMC instruction. */ 225 # define SVM_EXIT_RDPMC 0x6 F225 # define SVM_EXIT_RDPMC 0x6f 226 226 /** PUSHF instruction. */ 227 227 # define SVM_EXIT_PUSHF 0x70 … … 245 245 # define SVM_EXIT_INVLPG 0x79 246 246 /** INVLPGA instruction. */ 247 # define SVM_EXIT_INVLPGA 0x7 A247 # define SVM_EXIT_INVLPGA 0x7a 248 248 /** IN or OUT accessing protected port (the EXITINFO1 field provides more information). */ 249 # define SVM_EXIT_IOIO 0x7 B249 # define SVM_EXIT_IOIO 0x7b 250 250 /** RDMSR or WRMSR access to protected MSR. */ 251 # define SVM_EXIT_MSR 0x7 C251 # define SVM_EXIT_MSR 0x7c 252 252 /** task switch. */ 253 # define SVM_EXIT_TASK_SWITCH 0x7 D253 # define SVM_EXIT_TASK_SWITCH 0x7d 254 254 /** FP legacy handling enabled, and processor is frozen in an x87/mmx instruction waiting for an interrupt. */ 255 # define SVM_EXIT_FERR_FREEZE 0x7 E255 # define SVM_EXIT_FERR_FREEZE 0x7e 256 256 /** Shutdown. */ 257 # define SVM_EXIT_SHUTDOWN 0x7 F257 # define SVM_EXIT_SHUTDOWN 0x7f 258 258 /** VMRUN instruction. */ 259 259 # define SVM_EXIT_VMRUN 0x80 … … 277 277 # define SVM_EXIT_WBINVD 0x89 278 278 /** MONITOR instruction. */ 279 # define SVM_EXIT_MONITOR 0x8 A279 # define SVM_EXIT_MONITOR 0x8a 280 280 /** MWAIT instruction. */ 281 # define SVM_EXIT_MWAIT 0x8 B281 # define SVM_EXIT_MWAIT 0x8b 282 282 /** MWAIT instruction, when armed. */ 283 # define SVM_EXIT_MWAIT_ARMED 0x8 C283 # define SVM_EXIT_MWAIT_ARMED 0x8c 284 284 /** XSETBV instruction. */ 285 # define SVM_EXIT_XSETBV 0x8 D285 # define SVM_EXIT_XSETBV 0x8d 286 286 /** Nested paging: host-level page fault occurred (EXITINFO1 contains fault errorcode; EXITINFO2 contains the guest physical address causing the fault). */ 287 287 # define SVM_EXIT_NPF 0x400 -
trunk/include/VBox/vmm/hm_vmx.h
r73274 r73286 99 99 typedef VMXRESTOREHOST *PVMXRESTOREHOST; 100 100 AssertCompileSize(X86XDTR64, 10); 101 AssertCompileMemberOffset(VMXRESTOREHOST, HostGdtr.uAddr, 16);101 AssertCompileMemberOffset(VMXRESTOREHOST, HostGdtr.uAddr, 16); 102 102 AssertCompileMemberOffset(VMXRESTOREHOST, HostGdtrRw.uAddr, 32); 103 AssertCompileMemberOffset(VMXRESTOREHOST, HostIdtr.uAddr, 48);104 AssertCompileMemberOffset(VMXRESTOREHOST, uHostFSBase, 56);103 AssertCompileMemberOffset(VMXRESTOREHOST, HostIdtr.uAddr, 48); 104 AssertCompileMemberOffset(VMXRESTOREHOST, uHostFSBase, 56); 105 105 AssertCompileSize(VMXRESTOREHOST, 72); 106 106 AssertCompileSizeAlignment(VMXRESTOREHOST, 8); … … 891 891 */ 892 892 /** -1 Invalid exit code */ 893 #define VMX_EXIT_INVALID -1893 #define VMX_EXIT_INVALID (-1) 894 894 /** 0 Exception or non-maskable interrupt (NMI). */ 895 895 #define VMX_EXIT_XCPT_OR_NMI 0 … … 1091 1091 */ 1092 1092 /** VMCS revision identifier used by the processor. */ 1093 #define MSR_IA32_VMX_BASIC_VMCS_ID(a) ((a) & 0x7 FFFFFFF)1093 #define MSR_IA32_VMX_BASIC_VMCS_ID(a) ((a) & 0x7fffffff) 1094 1094 /** Shift to get the VMCS size. */ 1095 1095 #define MSR_IA32_VMX_BASIC_VMCS_SIZE_SHIFT 32 1096 1096 /** VMCS size in bytes. */ 1097 #define MSR_IA32_VMX_BASIC_VMCS_SIZE(a) (((a) >> 32) & 0x1 FFF)1097 #define MSR_IA32_VMX_BASIC_VMCS_SIZE(a) (((a) >> 32) & 0x1fff) 1098 1098 /** Shift to get the width of physical addresses and associated memory regions. */ 1099 1099 #define MSR_IA32_VMX_BASIC_VMCS_PHYS_WIDTH_SHIFT 48 … … 1108 1108 #define MSR_IA32_VMX_BASIC_VMCS_MEM_TYPE_SHIFT 50 1109 1109 /** Memory type that must be used for the VMCS and associated memory regions. */ 1110 #define MSR_IA32_VMX_BASIC_VMCS_MEM_TYPE(a) (((a) >> 50) & 0x F)1110 #define MSR_IA32_VMX_BASIC_VMCS_MEM_TYPE(a) (((a) >> 50) & 0xf) 1111 1111 /** Shift to get the additional VM-exit information for INS/OUTS. */ 1112 1112 #define MSR_IA32_VMX_BASIC_VMCS_INS_OUTS_SHIFT 54 … … 1126 1126 /** Relationship between the preemption timer and tsc; count down every time bit 1127 1127 * x of the tsc changes. */ 1128 #define MSR_IA32_VMX_MISC_PREEMPT_TSC_BIT(a) ((a) & 0x1 F)1128 #define MSR_IA32_VMX_MISC_PREEMPT_TSC_BIT(a) ((a) & 0x1f) 1129 1129 /** Whether VM-exit stores EFER.LMA into the "IA32e mode guest" field. */ 1130 1130 #define MSR_IA32_VMX_MISC_STORE_EFERLMA_VMEXIT(a) (((a) >> 5) & 1) … … 1132 1132 #define MSR_IA32_VMX_MISC_ACTIVITY_STATES(a) (((a) >> 6) & 0x7) 1133 1133 /** Number of CR3 target values supported by the processor. (0-256) */ 1134 #define MSR_IA32_VMX_MISC_CR3_TARGET(a) (((a) >> 16) & 0x1 FF)1134 #define MSR_IA32_VMX_MISC_CR3_TARGET(a) (((a) >> 16) & 0x1ff) 1135 1135 /** Maximum number of MSRs in the VMCS. (N+1)*512. */ 1136 1136 #define MSR_IA32_VMX_MISC_MAX_MSR(a) (((((a) >> 25) & 0x7) + 1) * 512) … … 1150 1150 */ 1151 1151 /** Highest field index. */ 1152 #define MSR_IA32_VMX_VMCS_ENUM_HIGHEST_INDEX(a) (((a) >> 1) & 0x1 FF)1152 #define MSR_IA32_VMX_VMCS_ENUM_HIGHEST_INDEX(a) (((a) >> 1) & 0x1ff) 1153 1153 /** @} */ 1154 1154 … … 1202 1202 #define VMX_VMCS16_GUEST_DS_SEL 0x806 1203 1203 #define VMX_VMCS16_GUEST_FS_SEL 0x808 1204 #define VMX_VMCS16_GUEST_GS_SEL 0x80 A1205 #define VMX_VMCS16_GUEST_LDTR_SEL 0x80 C1206 #define VMX_VMCS16_GUEST_TR_SEL 0x80 E1204 #define VMX_VMCS16_GUEST_GS_SEL 0x80a 1205 #define VMX_VMCS16_GUEST_LDTR_SEL 0x80c 1206 #define VMX_VMCS16_GUEST_TR_SEL 0x80e 1207 1207 #define VMX_VMCS16_GUEST_INTR_STATUS 0x810 1208 1208 /** @} */ … … 1211 1211 * @{ 1212 1212 */ 1213 #define VMX_VMCS16_HOST_ES_SEL 0x C001214 #define VMX_VMCS16_HOST_CS_SEL 0x C021215 #define VMX_VMCS16_HOST_SS_SEL 0x C041216 #define VMX_VMCS16_HOST_DS_SEL 0x C061217 #define VMX_VMCS16_HOST_FS_SEL 0x C081218 #define VMX_VMCS16_HOST_GS_SEL 0x C0A1219 #define VMX_VMCS16_HOST_TR_SEL 0x C0C1213 #define VMX_VMCS16_HOST_ES_SEL 0xc00 1214 #define VMX_VMCS16_HOST_CS_SEL 0xc02 1215 #define VMX_VMCS16_HOST_SS_SEL 0xc04 1216 #define VMX_VMCS16_HOST_DS_SEL 0xc06 1217 #define VMX_VMCS16_HOST_FS_SEL 0xc08 1218 #define VMX_VMCS16_HOST_GS_SEL 0xc0a 1219 #define VMX_VMCS16_HOST_TR_SEL 0xc0c 1220 1220 /** @} */ 1221 1221 … … 1223 1223 * @{ 1224 1224 */ 1225 #define VMX_VMCS64_HOST_PAT_FULL 0x2 C001226 #define VMX_VMCS64_HOST_PAT_HIGH 0x2 C011227 #define VMX_VMCS64_HOST_EFER_FULL 0x2 C021228 #define VMX_VMCS64_HOST_EFER_HIGH 0x2 C031229 #define VMX_VMCS64_HOST_PERF_GLOBAL_CTRL_FULL 0x2 C04 /**< MSR IA32_PERF_GLOBAL_CTRL */1230 #define VMX_VMCS64_HOST_PERF_GLOBAL_CTRL_HIGH 0x2 C05 /**< MSR IA32_PERF_GLOBAL_CTRL */1225 #define VMX_VMCS64_HOST_PAT_FULL 0x2c00 1226 #define VMX_VMCS64_HOST_PAT_HIGH 0x2c01 1227 #define VMX_VMCS64_HOST_EFER_FULL 0x2c02 1228 #define VMX_VMCS64_HOST_EFER_HIGH 0x2c03 1229 #define VMX_VMCS64_HOST_PERF_GLOBAL_CTRL_FULL 0x2c04 /**< MSR IA32_PERF_GLOBAL_CTRL */ 1230 #define VMX_VMCS64_HOST_PERF_GLOBAL_CTRL_HIGH 0x2c05 /**< MSR IA32_PERF_GLOBAL_CTRL */ 1231 1231 /** @} */ 1232 1232 … … 1245 1245 #define VMX_VMCS64_CTRL_EXIT_MSR_LOAD_FULL 0x2008 1246 1246 #define VMX_VMCS64_CTRL_EXIT_MSR_LOAD_HIGH 0x2009 1247 #define VMX_VMCS64_CTRL_ENTRY_MSR_LOAD_FULL 0x200 A1248 #define VMX_VMCS64_CTRL_ENTRY_MSR_LOAD_HIGH 0x200 B1249 #define VMX_VMCS64_CTRL_EXEC_VMCS_PTR_FULL 0x200 C1250 #define VMX_VMCS64_CTRL_EXEC_VMCS_PTR_HIGH 0x200 D1247 #define VMX_VMCS64_CTRL_ENTRY_MSR_LOAD_FULL 0x200a 1248 #define VMX_VMCS64_CTRL_ENTRY_MSR_LOAD_HIGH 0x200b 1249 #define VMX_VMCS64_CTRL_EXEC_VMCS_PTR_FULL 0x200c 1250 #define VMX_VMCS64_CTRL_EXEC_VMCS_PTR_HIGH 0x200d 1251 1251 #define VMX_VMCS64_CTRL_TSC_OFFSET_FULL 0x2010 1252 1252 #define VMX_VMCS64_CTRL_TSC_OFFSET_HIGH 0x2011 … … 1259 1259 #define VMX_VMCS64_CTRL_VMFUNC_CTRLS_FULL 0x2018 1260 1260 #define VMX_VMCS64_CTRL_VMFUNC_CTRLS_HIGH 0x2019 1261 #define VMX_VMCS64_CTRL_EPTP_FULL 0x201 A1262 #define VMX_VMCS64_CTRL_EPTP_HIGH 0x201 B1263 #define VMX_VMCS64_CTRL_EOI_BITMAP_0_FULL 0x201 C1264 #define VMX_VMCS64_CTRL_EOI_BITMAP_0_HIGH 0x201 D1265 #define VMX_VMCS64_CTRL_EOI_BITMAP_1_FULL 0x201 E1266 #define VMX_VMCS64_CTRL_EOI_BITMAP_1_HIGH 0x201 F1261 #define VMX_VMCS64_CTRL_EPTP_FULL 0x201a 1262 #define VMX_VMCS64_CTRL_EPTP_HIGH 0x201b 1263 #define VMX_VMCS64_CTRL_EOI_BITMAP_0_FULL 0x201c 1264 #define VMX_VMCS64_CTRL_EOI_BITMAP_0_HIGH 0x201d 1265 #define VMX_VMCS64_CTRL_EOI_BITMAP_1_FULL 0x201e 1266 #define VMX_VMCS64_CTRL_EOI_BITMAP_1_HIGH 0x201f 1267 1267 #define VMX_VMCS64_CTRL_EOI_BITMAP_2_FULL 0x2020 1268 1268 #define VMX_VMCS64_CTRL_EOI_BITMAP_2_HIGH 0x2021 … … 1275 1275 #define VMX_VMCS64_CTRL_VMWRITE_BITMAP_FULL 0x2028 1276 1276 #define VMX_VMCS64_CTRL_VMWRITE_BITMAP_HIGH 0x2029 1277 #define VMX_VMCS64_CTRL_VIRTXCPT_INFO_ADDR_FULL 0x202 A1278 #define VMX_VMCS64_CTRL_VIRTXCPT_INFO_ADDR_HIGH 0x202 B1279 #define VMX_VMCS64_CTRL_XSS_EXITING_BITMAP_FULL 0x202 C1280 #define VMX_VMCS64_CTRL_XSS_EXITING_BITMAP_HIGH 0x202 D1277 #define VMX_VMCS64_CTRL_VIRTXCPT_INFO_ADDR_FULL 0x202a 1278 #define VMX_VMCS64_CTRL_VIRTXCPT_INFO_ADDR_HIGH 0x202b 1279 #define VMX_VMCS64_CTRL_XSS_EXITING_BITMAP_FULL 0x202c 1280 #define VMX_VMCS64_CTRL_XSS_EXITING_BITMAP_HIGH 0x202d 1281 1281 #define VMX_VMCS64_CTRL_TSC_MULTIPLIER_FULL 0x2032 1282 1282 #define VMX_VMCS64_CTRL_TSC_MULTIPLIER_HIGH 0x2033 … … 1299 1299 #define VMX_VMCS64_GUEST_PERF_GLOBAL_CTRL_FULL 0x2808 /**< MSR IA32_PERF_GLOBAL_CTRL */ 1300 1300 #define VMX_VMCS64_GUEST_PERF_GLOBAL_CTRL_HIGH 0x2809 /**< MSR IA32_PERF_GLOBAL_CTRL */ 1301 #define VMX_VMCS64_GUEST_PDPTE0_FULL 0x280 A1302 #define VMX_VMCS64_GUEST_PDPTE0_HIGH 0x280 B1303 #define VMX_VMCS64_GUEST_PDPTE1_FULL 0x280 C1304 #define VMX_VMCS64_GUEST_PDPTE1_HIGH 0x280 D1305 #define VMX_VMCS64_GUEST_PDPTE2_FULL 0x280 E1306 #define VMX_VMCS64_GUEST_PDPTE2_HIGH 0x280 F1301 #define VMX_VMCS64_GUEST_PDPTE0_FULL 0x280a 1302 #define VMX_VMCS64_GUEST_PDPTE0_HIGH 0x280b 1303 #define VMX_VMCS64_GUEST_PDPTE1_FULL 0x280c 1304 #define VMX_VMCS64_GUEST_PDPTE1_HIGH 0x280d 1305 #define VMX_VMCS64_GUEST_PDPTE2_FULL 0x280e 1306 #define VMX_VMCS64_GUEST_PDPTE2_HIGH 0x280f 1307 1307 #define VMX_VMCS64_GUEST_PDPTE3_FULL 0x2810 1308 1308 #define VMX_VMCS64_GUEST_PDPTE3_HIGH 0x2811 … … 1318 1318 #define VMX_VMCS32_CTRL_PAGEFAULT_ERROR_MASK 0x4006 1319 1319 #define VMX_VMCS32_CTRL_PAGEFAULT_ERROR_MATCH 0x4008 1320 #define VMX_VMCS32_CTRL_CR3_TARGET_COUNT 0x400 A1321 #define VMX_VMCS32_CTRL_EXIT 0x400 C1322 #define VMX_VMCS32_CTRL_EXIT_MSR_STORE_COUNT 0x400 E1320 #define VMX_VMCS32_CTRL_CR3_TARGET_COUNT 0x400a 1321 #define VMX_VMCS32_CTRL_EXIT 0x400c 1322 #define VMX_VMCS32_CTRL_EXIT_MSR_STORE_COUNT 0x400e 1323 1323 #define VMX_VMCS32_CTRL_EXIT_MSR_LOAD_COUNT 0x4010 1324 1324 #define VMX_VMCS32_CTRL_ENTRY 0x4012 … … 1326 1326 #define VMX_VMCS32_CTRL_ENTRY_INTERRUPTION_INFO 0x4016 1327 1327 #define VMX_VMCS32_CTRL_ENTRY_EXCEPTION_ERRCODE 0x4018 1328 #define VMX_VMCS32_CTRL_ENTRY_INSTR_LENGTH 0x401 A1329 #define VMX_VMCS32_CTRL_TPR_THRESHOLD 0x401 C1330 #define VMX_VMCS32_CTRL_PROC_EXEC2 0x401 E1328 #define VMX_VMCS32_CTRL_ENTRY_INSTR_LENGTH 0x401a 1329 #define VMX_VMCS32_CTRL_TPR_THRESHOLD 0x401c 1330 #define VMX_VMCS32_CTRL_PROC_EXEC2 0x401e 1331 1331 #define VMX_VMCS32_CTRL_PLE_GAP 0x4020 1332 1332 #define VMX_VMCS32_CTRL_PLE_WINDOW 0x4022 … … 1515 1515 #define VMX_VMCS32_RO_EXIT_INTERRUPTION_ERROR_CODE 0x4406 1516 1516 #define VMX_VMCS32_RO_IDT_VECTORING_INFO 0x4408 1517 #define VMX_VMCS32_RO_IDT_VECTORING_ERROR_CODE 0x440 A1518 #define VMX_VMCS32_RO_EXIT_INSTR_LENGTH 0x440 C1519 #define VMX_VMCS32_RO_EXIT_INSTR_INFO 0x440 E1517 #define VMX_VMCS32_RO_IDT_VECTORING_ERROR_CODE 0x440a 1518 #define VMX_VMCS32_RO_EXIT_INSTR_LENGTH 0x440c 1519 #define VMX_VMCS32_RO_EXIT_INSTR_INFO 0x440e 1520 1520 /** @} */ 1521 1521 … … 1524 1524 * @{ 1525 1525 */ 1526 #define VMX_EXIT_REASON_BASIC(a) ((a) & 0x FFFF)1526 #define VMX_EXIT_REASON_BASIC(a) ((a) & 0xffff) 1527 1527 /** @} */ 1528 1528 … … 1540 1540 * @{ 1541 1541 */ 1542 #define VMX_EXIT_INTERRUPTION_INFO_VECTOR(a) ((a) & 0x FF)1542 #define VMX_EXIT_INTERRUPTION_INFO_VECTOR(a) ((a) & 0xff) 1543 1543 #define VMX_EXIT_INTERRUPTION_INFO_TYPE_SHIFT 8 1544 1544 #define VMX_EXIT_INTERRUPTION_INFO_TYPE(a) (((a) >> VMX_EXIT_INTERRUPTION_INFO_TYPE_SHIFT) & 7) … … 1569 1569 * @{ 1570 1570 */ 1571 #define VMX_IDT_VECTORING_INFO_VECTOR(a) ((a) & 0x FF)1571 #define VMX_IDT_VECTORING_INFO_VECTOR(a) ((a) & 0xff) 1572 1572 #define VMX_IDT_VECTORING_INFO_TYPE_SHIFT 8 1573 1573 #define VMX_IDT_VECTORING_INFO_TYPE(a) (((a) >> VMX_IDT_VECTORING_INFO_TYPE_SHIFT) & 7) … … 1599 1599 #define VMX_VMCS32_GUEST_DS_LIMIT 0x4806 1600 1600 #define VMX_VMCS32_GUEST_FS_LIMIT 0x4808 1601 #define VMX_VMCS32_GUEST_GS_LIMIT 0x480 A1602 #define VMX_VMCS32_GUEST_LDTR_LIMIT 0x480 C1603 #define VMX_VMCS32_GUEST_TR_LIMIT 0x480 E1601 #define VMX_VMCS32_GUEST_GS_LIMIT 0x480a 1602 #define VMX_VMCS32_GUEST_LDTR_LIMIT 0x480c 1603 #define VMX_VMCS32_GUEST_TR_LIMIT 0x480e 1604 1604 #define VMX_VMCS32_GUEST_GDTR_LIMIT 0x4810 1605 1605 #define VMX_VMCS32_GUEST_IDTR_LIMIT 0x4812 … … 1607 1607 #define VMX_VMCS32_GUEST_CS_ACCESS_RIGHTS 0x4816 1608 1608 #define VMX_VMCS32_GUEST_SS_ACCESS_RIGHTS 0x4818 1609 #define VMX_VMCS32_GUEST_DS_ACCESS_RIGHTS 0x481 A1610 #define VMX_VMCS32_GUEST_FS_ACCESS_RIGHTS 0x481 C1611 #define VMX_VMCS32_GUEST_GS_ACCESS_RIGHTS 0x481 E1609 #define VMX_VMCS32_GUEST_DS_ACCESS_RIGHTS 0x481a 1610 #define VMX_VMCS32_GUEST_FS_ACCESS_RIGHTS 0x481c 1611 #define VMX_VMCS32_GUEST_GS_ACCESS_RIGHTS 0x481e 1612 1612 #define VMX_VMCS32_GUEST_LDTR_ACCESS_RIGHTS 0x4820 1613 1613 #define VMX_VMCS32_GUEST_TR_ACCESS_RIGHTS 0x4822 1614 1614 #define VMX_VMCS32_GUEST_INTERRUPTIBILITY_STATE 0x4824 1615 1615 #define VMX_VMCS32_GUEST_ACTIVITY_STATE 0x4826 1616 #define VMX_VMCS32_GUEST_SYSENTER_CS 0x482 A/**< MSR IA32_SYSENTER_CS */1617 #define VMX_VMCS32_GUEST_PREEMPT_TIMER_VALUE 0x482 E1616 #define VMX_VMCS32_GUEST_SYSENTER_CS 0x482a /**< MSR IA32_SYSENTER_CS */ 1617 #define VMX_VMCS32_GUEST_PREEMPT_TIMER_VALUE 0x482e 1618 1618 /** @} */ 1619 1619 … … 1658 1658 #define VMX_VMCS_CTRL_CR4_READ_SHADOW 0x6006 1659 1659 #define VMX_VMCS_CTRL_CR3_TARGET_VAL0 0x6008 1660 #define VMX_VMCS_CTRL_CR3_TARGET_VAL1 0x600 A1661 #define VMX_VMCS_CTRL_CR3_TARGET_VAL2 0x600 C1662 #define VMX_VMCS_CTRL_CR3_TARGET_VAL31 0x600 E1660 #define VMX_VMCS_CTRL_CR3_TARGET_VAL1 0x600a 1661 #define VMX_VMCS_CTRL_CR3_TARGET_VAL2 0x600c 1662 #define VMX_VMCS_CTRL_CR3_TARGET_VAL31 0x600e 1663 1663 /** @} */ 1664 1664 … … 1672 1672 #define VMX_VMCS_RO_IO_RDI 0x6406 1673 1673 #define VMX_VMCS_RO_IO_RIP 0x6408 1674 #define VMX_VMCS_RO_EXIT_GUEST_LINEAR_ADDR 0x640 A1674 #define VMX_VMCS_RO_EXIT_GUEST_LINEAR_ADDR 0x640a 1675 1675 /** @} */ 1676 1676 … … 1688 1688 #define VMX_EXIT_QUAL_DRX_RES2(a) (((a) >> 5) & 7) 1689 1689 /** 8-11: General purpose register number. */ 1690 #define VMX_EXIT_QUAL_DRX_GENREG(a) (((a) >> 8) & 0x F)1690 #define VMX_EXIT_QUAL_DRX_GENREG(a) (((a) >> 8) & 0xf) 1691 1691 /** Rest: reserved. */ 1692 1692 /** @} */ … … 1705 1705 */ 1706 1706 /** 0-3: Control register number (0 for CLTS & LMSW) */ 1707 #define VMX_EXIT_QUAL_CRX_REGISTER(a) ((a) & 0x F)1707 #define VMX_EXIT_QUAL_CRX_REGISTER(a) ((a) & 0xf) 1708 1708 /** 4-5: Access type. */ 1709 1709 #define VMX_EXIT_QUAL_CRX_ACCESS(a) (((a) >> 4) & 3) … … 1713 1713 #define VMX_EXIT_QUAL_CRX_RES1(a) (((a) >> 7) & 1) 1714 1714 /** 8-11: General purpose register number (0 for CLTS & LMSW). */ 1715 #define VMX_EXIT_QUAL_CRX_GENREG(a) (((a) >> 8) & 0x F)1715 #define VMX_EXIT_QUAL_CRX_GENREG(a) (((a) >> 8) & 0xf) 1716 1716 /** 12-15: Reserved; cleared to 0. */ 1717 #define VMX_EXIT_QUAL_CRX_RES2(a) (((a) >> 12) & 0x F)1717 #define VMX_EXIT_QUAL_CRX_RES2(a) (((a) >> 12) & 0xf) 1718 1718 /** 16-31: LMSW source data (else 0). */ 1719 #define VMX_EXIT_QUAL_CRX_LMSW_DATA(a) (((a) >> 16) & 0x FFFF)1719 #define VMX_EXIT_QUAL_CRX_LMSW_DATA(a) (((a) >> 16) & 0xffff) 1720 1720 /* Rest: reserved. */ 1721 1721 /** @} */ … … 1735 1735 * @{ 1736 1736 */ 1737 #define VMX_EXIT_QUAL_TASK_SWITCH_SELECTOR(a) ((a) & 0x FFFF)1737 #define VMX_EXIT_QUAL_TASK_SWITCH_SELECTOR(a) ((a) & 0xffff) 1738 1738 #define VMX_EXIT_QUAL_TASK_SWITCH_TYPE(a) (((a) >> 30) & 0x3) 1739 1739 /** Task switch caused by a call instruction. */ … … 1787 1787 #define VMX_EXIT_QUAL_IO_ENCODING(a) (((a) >> 6) & 1) 1788 1788 /** 16-31: IO Port (0-0xffff). */ 1789 #define VMX_EXIT_QUAL_IO_PORT(a) (((a) >> 16) & 0x FFFF)1789 #define VMX_EXIT_QUAL_IO_PORT(a) (((a) >> 16) & 0xffff) 1790 1790 /* Rest reserved. */ 1791 1791 /** @} */ … … 1956 1956 #define VMX_VMCS_GUEST_ES_BASE 0x6806 1957 1957 #define VMX_VMCS_GUEST_CS_BASE 0x6808 1958 #define VMX_VMCS_GUEST_SS_BASE 0x680 A1959 #define VMX_VMCS_GUEST_DS_BASE 0x680 C1960 #define VMX_VMCS_GUEST_FS_BASE 0x680 E1958 #define VMX_VMCS_GUEST_SS_BASE 0x680a 1959 #define VMX_VMCS_GUEST_DS_BASE 0x680c 1960 #define VMX_VMCS_GUEST_FS_BASE 0x680e 1961 1961 #define VMX_VMCS_GUEST_GS_BASE 0x6810 1962 1962 #define VMX_VMCS_GUEST_LDTR_BASE 0x6812 … … 1964 1964 #define VMX_VMCS_GUEST_GDTR_BASE 0x6816 1965 1965 #define VMX_VMCS_GUEST_IDTR_BASE 0x6818 1966 #define VMX_VMCS_GUEST_DR7 0x681 A1967 #define VMX_VMCS_GUEST_RSP 0x681 C1968 #define VMX_VMCS_GUEST_RIP 0x681 E1966 #define VMX_VMCS_GUEST_DR7 0x681a 1967 #define VMX_VMCS_GUEST_RSP 0x681c 1968 #define VMX_VMCS_GUEST_RIP 0x681e 1969 1969 #define VMX_VMCS_GUEST_RFLAGS 0x6820 1970 1970 #define VMX_VMCS_GUEST_PENDING_DEBUG_EXCEPTIONS 0x6822 … … 1996 1996 * @{ 1997 1997 */ 1998 #define VMX_VMCS_HOST_CR0 0x6 C001999 #define VMX_VMCS_HOST_CR3 0x6 C022000 #define VMX_VMCS_HOST_CR4 0x6 C042001 #define VMX_VMCS_HOST_FS_BASE 0x6 C062002 #define VMX_VMCS_HOST_GS_BASE 0x6 C082003 #define VMX_VMCS_HOST_TR_BASE 0x6 C0A2004 #define VMX_VMCS_HOST_GDTR_BASE 0x6 C0C2005 #define VMX_VMCS_HOST_IDTR_BASE 0x6 C0E2006 #define VMX_VMCS_HOST_SYSENTER_ESP 0x6 C102007 #define VMX_VMCS_HOST_SYSENTER_EIP 0x6 C122008 #define VMX_VMCS_HOST_RSP 0x6 C142009 #define VMX_VMCS_HOST_RIP 0x6 C161998 #define VMX_VMCS_HOST_CR0 0x6c00 1999 #define VMX_VMCS_HOST_CR3 0x6c02 2000 #define VMX_VMCS_HOST_CR4 0x6c04 2001 #define VMX_VMCS_HOST_FS_BASE 0x6c06 2002 #define VMX_VMCS_HOST_GS_BASE 0x6c08 2003 #define VMX_VMCS_HOST_TR_BASE 0x6c0a 2004 #define VMX_VMCS_HOST_GDTR_BASE 0x6c0c 2005 #define VMX_VMCS_HOST_IDTR_BASE 0x6c0e 2006 #define VMX_VMCS_HOST_SYSENTER_ESP 0x6c10 2007 #define VMX_VMCS_HOST_SYSENTER_EIP 0x6c12 2008 #define VMX_VMCS_HOST_RSP 0x6c14 2009 #define VMX_VMCS_HOST_RIP 0x6c16 2010 2010 /** @} */ 2011 2011 … … 2059 2059 "push %3 \n\t" 2060 2060 "push %2 \n\t" 2061 ".byte 0x F3, 0x0F, 0xC7, 0x34, 0x24 # VMXON [esp] \n\t"2061 ".byte 0xf3, 0x0f, 0xc7, 0x34, 0x24 # VMXON [esp] \n\t" 2062 2062 "ja 2f \n\t" 2063 2063 "je 1f \n\t" … … 2088 2088 push dword ptr [HCPhysVmxOn + 4] 2089 2089 push dword ptr [HCPhysVmxOn] 2090 _emit 0x F32091 _emit 0x0 F2092 _emit 0x C72090 _emit 0xf3 2091 _emit 0x0f 2092 _emit 0xc7 2093 2093 _emit 0x34 2094 2094 _emit 0x24 /* VMXON [esp] */ … … 2119 2119 # if RT_INLINE_ASM_GNU_STYLE 2120 2120 __asm__ __volatile__ ( 2121 ".byte 0x0 F, 0x01, 0xC4 # VMXOFF \n\t"2121 ".byte 0x0f, 0x01, 0xc4 # VMXOFF \n\t" 2122 2122 ); 2123 2123 … … 2128 2128 __asm 2129 2129 { 2130 _emit 0x0 F2130 _emit 0x0f 2131 2131 _emit 0x01 2132 _emit 0x C4 /* VMXOFF */2132 _emit 0xc4 /* VMXOFF */ 2133 2133 } 2134 2134 # endif … … 2153 2153 "push %3 \n\t" 2154 2154 "push %2 \n\t" 2155 ".byte 0x66, 0x0 F, 0xC7, 0x34, 0x24 # VMCLEAR [esp] \n\t"2155 ".byte 0x66, 0x0f, 0xc7, 0x34, 0x24 # VMCLEAR [esp] \n\t" 2156 2156 "jnc 1f \n\t" 2157 2157 "movl $" RT_XSTR(VERR_VMX_INVALID_VMCS_PTR)", %0 \n\t" … … 2179 2179 push dword ptr [HCPhysVmcs] 2180 2180 _emit 0x66 2181 _emit 0x0 F2182 _emit 0x C72181 _emit 0x0f 2182 _emit 0xc7 2183 2183 _emit 0x34 2184 2184 _emit 0x24 /* VMCLEAR [esp] */ … … 2210 2210 "push %3 \n\t" 2211 2211 "push %2 \n\t" 2212 ".byte 0x0 F, 0xC7, 0x34, 0x24 # VMPTRLD [esp] \n\t"2212 ".byte 0x0f, 0xc7, 0x34, 0x24 # VMPTRLD [esp] \n\t" 2213 2213 "jnc 1f \n\t" 2214 2214 "movl $" RT_XSTR(VERR_VMX_INVALID_VMCS_PTR)", %0 \n\t" … … 2234 2234 push dword ptr [HCPhysVmcs + 4] 2235 2235 push dword ptr [HCPhysVmcs] 2236 _emit 0x0 F2237 _emit 0x C72236 _emit 0x0f 2237 _emit 0xc7 2238 2238 _emit 0x34 2239 2239 _emit 0x24 /* VMPTRLD [esp] */ … … 2282 2282 int rc = VINF_SUCCESS; 2283 2283 __asm__ __volatile__ ( 2284 ".byte 0x0 F, 0x79, 0xC2 # VMWRITE eax, edx \n\t"2284 ".byte 0x0f, 0x79, 0xc2 # VMWRITE eax, edx \n\t" 2285 2285 "ja 2f \n\t" 2286 2286 "je 1f \n\t" … … 2309 2309 push dword ptr [u32Val] 2310 2310 mov eax, [idxField] 2311 _emit 0x0 F2311 _emit 0x0f 2312 2312 _emit 0x79 2313 2313 _emit 0x04 … … 2411 2411 __asm__ __volatile__ ( 2412 2412 "movl $" RT_XSTR(VINF_SUCCESS)", %0 \n\t" 2413 ".byte 0x0 F, 0x78, 0xc2 # VMREAD eax, edx \n\t"2413 ".byte 0x0f, 0x78, 0xc2 # VMREAD eax, edx \n\t" 2414 2414 "ja 2f \n\t" 2415 2415 "je 1f \n\t" … … 2446 2446 mov dword ptr [esp], 0 2447 2447 mov eax, [idxField] 2448 _emit 0x0 F2448 _emit 0x0f 2449 2449 _emit 0x78 2450 2450 _emit 0x04
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