VirtualBox

Changeset 73310 in vbox for trunk/src/VBox/VMM/VMMR0


Ignore:
Timestamp:
Jul 23, 2018 6:51:46 AM (7 years ago)
Author:
vboxsync
svn:sync-xref-src-repo-rev:
123917
Message:

VMM/HMVMXR0: Nested VMX: bugref:9180 Some much needed shortening of macro names, re-ordered VMCS defines and added new VMCS fields
from the latest Intel SDM.

File:
1 edited

Legend:

Unmodified
Added
Removed

  • trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp

    r73293 r73310  
    34663466        {
    34673467            if (pCtx->eflags.Bits.u1IF)
    3468                 fIntrState = VMX_VMCS_GUEST_INTERRUPTIBILITY_STATE_BLOCK_STI;
     3468                fIntrState = VMX_VMCS_GUEST_INT_STATE_BLOCK_STI;
    34693469            else
    3470                 fIntrState = VMX_VMCS_GUEST_INTERRUPTIBILITY_STATE_BLOCK_MOVSS;
     3470                fIntrState = VMX_VMCS_GUEST_INT_STATE_BLOCK_MOVSS;
    34713471        }
    34723472        else if (VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_INHIBIT_INTERRUPTS))
    … …  
    34913491        && (pVCpu->hm.s.vmx.u32PinCtls & VMX_VMCS_CTRL_PIN_EXEC_VIRTUAL_NMI))
    34923492    {
    3493         fIntrState |= VMX_VMCS_GUEST_INTERRUPTIBILITY_STATE_BLOCK_NMI;
     3493        fIntrState |= VMX_VMCS_GUEST_INT_STATE_BLOCK_NMI;
    34943494    }
    34953495
    … …  
    35113511    AssertMsg(!(fIntrState & 0xfffffff0), ("%#x\n", fIntrState));   /* Bits 31:4 MBZ. */
    35123512    Assert((fIntrState & 0x3) != 0x3);                              /* Block-by-STI and MOV SS cannot be simultaneously set. */
    3513     return VMXWriteVmcs32(VMX_VMCS32_GUEST_INTERRUPTIBILITY_STATE, fIntrState);
     3513    return VMXWriteVmcs32(VMX_VMCS32_GUEST_INT_STATE, fIntrState);
    35143514}
    35153515
    … …  
    56425642
    56435643        uint32_t cPreemptionTickCount = (uint32_t)RT_MIN(cTicksToDeadline, UINT32_MAX - 16);
    5644         int rc = VMXWriteVmcs32(VMX_VMCS32_GUEST_PREEMPT_TIMER_VALUE, cPreemptionTickCount);
     5644        int rc = VMXWriteVmcs32(VMX_VMCS32_PREEMPT_TIMER_VALUE, cPreemptionTickCount);
    56455645        AssertRC(rc);
    56465646    }
    … …  
    57875787DECLINLINE(void) hmR0VmxSetPendingXcptDF(PVMCPU pVCpu)
    57885788{
    5789     uint32_t u32IntInfo  = X86_XCPT_DF | VMX_EXIT_INTERRUPTION_INFO_VALID;
    5790     u32IntInfo          |= (VMX_EXIT_INTERRUPTION_INFO_TYPE_HW_XCPT << VMX_EXIT_INTERRUPTION_INFO_TYPE_SHIFT);
    5791     u32IntInfo          |= VMX_EXIT_INTERRUPTION_INFO_ERROR_CODE_VALID;
     5789    uint32_t u32IntInfo  = X86_XCPT_DF | VMX_EXIT_INT_INFO_VALID;
     5790    u32IntInfo          |= (VMX_EXIT_INT_INFO_TYPE_HW_XCPT << VMX_EXIT_INT_INFO_TYPE_SHIFT);
     5791    u32IntInfo          |= VMX_EXIT_INT_INFO_ERROR_CODE_VALID;
    57925792    hmR0VmxSetPendingEvent(pVCpu, u32IntInfo,  0 /* cbInstr */, 0 /* u32ErrCode */, 0 /* GCPtrFaultAddress */);
    57935793}
    … …  
    58125812static VBOXSTRICTRC hmR0VmxCheckExitDueToEventDelivery(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
    58135813{
    5814     uint32_t const uExitVector = VMX_EXIT_INTERRUPTION_INFO_VECTOR(pVmxTransient->uExitIntInfo);
     5814    uint32_t const uExitVector = VMX_EXIT_INT_INFO_VECTOR(pVmxTransient->uExitIntInfo);
    58155815
    58165816    int rc2 = hmR0VmxReadIdtVectoringInfoVmcs(pVmxTransient);
    … …  
    58425842            fRaiseInfo = IEMXCPTRAISEINFO_NONE;
    58435843        }
    5844         else if (VMX_EXIT_INTERRUPTION_INFO_IS_VALID(pVmxTransient->uExitIntInfo))
     5844        else if (VMX_EXIT_INT_INFO_IS_VALID(pVmxTransient->uExitIntInfo))
    58455845        {
    58465846            uint32_t const uExitVectorType  = VMX_IDT_VECTORING_INFO_TYPE(pVmxTransient->uExitIntInfo);
    … …  
    58485848            uint32_t const fExitVectorFlags = hmR0VmxGetIemXcptFlags(uExitVector, uExitVectorType);
    58495849            /** @todo Make AssertMsgReturn as just AssertMsg later. */
    5850             AssertMsgReturn(uExitVectorType == VMX_EXIT_INTERRUPTION_INFO_TYPE_HW_XCPT,
     5850            AssertMsgReturn(uExitVectorType == VMX_EXIT_INT_INFO_TYPE_HW_XCPT,
    58515851                            ("hmR0VmxCheckExitDueToEventDelivery: Unexpected VM-exit interruption info. %#x!\n",
    58525852                             uExitVectorType), VERR_VMX_IPE_5);
    … …  
    59755975        }
    59765976    }
    5977     else if (   VMX_EXIT_INTERRUPTION_INFO_IS_VALID(pVmxTransient->uExitIntInfo)
    5978              && VMX_EXIT_INTERRUPTION_INFO_IS_NMI_UNBLOCK_IRET(pVmxTransient->uExitIntInfo)
     5977    else if (   VMX_EXIT_INT_INFO_IS_VALID(pVmxTransient->uExitIntInfo)
     5978             && VMX_EXIT_INT_INFO_IS_NMI_UNBLOCK_IRET(pVmxTransient->uExitIntInfo)
    59795979             && uExitVector != X86_XCPT_DF
    59805980             && (pVCpu->hm.s.vmx.u32PinCtls & VMX_VMCS_CTRL_PIN_EXEC_VIRTUAL_NMI))
    … …  
    59885988        {
    59895989            Log4Func(("Setting VMCPU_FF_BLOCK_NMIS. fValid=%RTbool uExitReason=%u\n",
    5990                       VMX_EXIT_INTERRUPTION_INFO_IS_VALID(pVmxTransient->uExitIntInfo), pVmxTransient->uExitReason));
     5990                      VMX_EXIT_INT_INFO_IS_VALID(pVmxTransient->uExitIntInfo), pVmxTransient->uExitReason));
    59915991            VMCPU_FF_SET(pVCpu, VMCPU_FF_BLOCK_NMIS);
    59925992        }
    … …  
    61606160    uint32_t u32Val;
    61616161    PCPUMCTX pCtx = &pVCpu->cpum.GstCtx;
    6162     int rc = VMXReadVmcs32(VMX_VMCS32_GUEST_INTERRUPTIBILITY_STATE, &u32Val);
     6162    int rc = VMXReadVmcs32(VMX_VMCS32_GUEST_INT_STATE, &u32Val);
    61636163    if (RT_SUCCESS(rc))
    61646164    {
    … …  
    61846184            rc |= hmR0VmxImportGuestRFlags(pVCpu);
    61856185
    6186             if (u32Val & (  VMX_VMCS_GUEST_INTERRUPTIBILITY_STATE_BLOCK_MOVSS
    6187                           | VMX_VMCS_GUEST_INTERRUPTIBILITY_STATE_BLOCK_STI))
     6186            if (u32Val & (  VMX_VMCS_GUEST_INT_STATE_BLOCK_MOVSS
     6187                          | VMX_VMCS_GUEST_INT_STATE_BLOCK_STI))
    61886188            {
    61896189                EMSetInhibitInterruptsPC(pVCpu, pCtx->rip);
    … …  
    61926192                VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_INHIBIT_INTERRUPTS);
    61936193
    6194             if (u32Val & VMX_VMCS_GUEST_INTERRUPTIBILITY_STATE_BLOCK_NMI)
     6194            if (u32Val & VMX_VMCS_GUEST_INT_STATE_BLOCK_NMI)
    61956195            {
    61966196                if (!VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_BLOCK_NMIS))
    … …  
    66516651
    66526652    /* Refer Intel spec. 24.8.3 "VM-entry Controls for Event Injection" for the format of u32IntInfo. */
    6653     uint32_t u32IntInfo = uVector | VMX_EXIT_INTERRUPTION_INFO_VALID;
     6653    uint32_t u32IntInfo = uVector | VMX_EXIT_INT_INFO_VALID;
    66546654    if (enmTrpmEvent == TRPM_TRAP)
    66556655    {
    … …  
    66576657        {
    66586658            case X86_XCPT_NMI:
    6659                 u32IntInfo |= (VMX_EXIT_INTERRUPTION_INFO_TYPE_NMI << VMX_EXIT_INTERRUPTION_INFO_TYPE_SHIFT);
     6659                u32IntInfo |= (VMX_EXIT_INT_INFO_TYPE_NMI << VMX_EXIT_INT_INFO_TYPE_SHIFT);
    66606660                break;
    66616661
    66626662            case X86_XCPT_BP:
    66636663            case X86_XCPT_OF:
    6664                 u32IntInfo |= (VMX_EXIT_INTERRUPTION_INFO_TYPE_SW_XCPT << VMX_EXIT_INTERRUPTION_INFO_TYPE_SHIFT);
     6664                u32IntInfo |= (VMX_EXIT_INT_INFO_TYPE_SW_XCPT << VMX_EXIT_INT_INFO_TYPE_SHIFT);
    66656665                break;
    66666666
    … …  
    66726672            case X86_XCPT_GP:
    66736673            case X86_XCPT_AC:
    6674                 u32IntInfo |= VMX_EXIT_INTERRUPTION_INFO_ERROR_CODE_VALID;
     6674                u32IntInfo |= VMX_EXIT_INT_INFO_ERROR_CODE_VALID;
    66756675                RT_FALL_THRU();
    66766676            default:
    6677                 u32IntInfo |= (VMX_EXIT_INTERRUPTION_INFO_TYPE_HW_XCPT << VMX_EXIT_INTERRUPTION_INFO_TYPE_SHIFT);
     6677                u32IntInfo |= (VMX_EXIT_INT_INFO_TYPE_HW_XCPT << VMX_EXIT_INT_INFO_TYPE_SHIFT);
    66786678                break;
    66796679        }
    66806680    }
    66816681    else if (enmTrpmEvent == TRPM_HARDWARE_INT)
    6682         u32IntInfo |= (VMX_EXIT_INTERRUPTION_INFO_TYPE_EXT_INT << VMX_EXIT_INTERRUPTION_INFO_TYPE_SHIFT);
     6682        u32IntInfo |= (VMX_EXIT_INT_INFO_TYPE_EXT_INT << VMX_EXIT_INT_INFO_TYPE_SHIFT);
    66836683    else if (enmTrpmEvent == TRPM_SOFTWARE_INT)
    6684         u32IntInfo |= (VMX_EXIT_INTERRUPTION_INFO_TYPE_SW_INT << VMX_EXIT_INTERRUPTION_INFO_TYPE_SHIFT);
     6684        u32IntInfo |= (VMX_EXIT_INT_INFO_TYPE_SW_INT << VMX_EXIT_INT_INFO_TYPE_SHIFT);
    66856685    else
    66866686        AssertMsgFailed(("Invalid TRPM event type %d\n", enmTrpmEvent));
    … …  
    67606760
    67616761    /* Clear any pending events from the VMCS. */
    6762     rc = VMXWriteVmcs32(VMX_VMCS32_CTRL_ENTRY_INTERRUPTION_INFO, 0);        AssertRC(rc);
    6763     rc = VMXWriteVmcs32(VMX_VMCS_GUEST_PENDING_DEBUG_EXCEPTIONS, 0);        AssertRC(rc);
     6762    VMXWriteVmcs32(VMX_VMCS32_CTRL_ENTRY_INTERRUPTION_INFO, 0);
     6763    VMXWriteVmcs32(VMX_VMCS_GUEST_PENDING_DEBUG_XCPTS, 0);
    67646764
    67656765    /* We're now done converting the pending event. */
    … …  
    71757175    PCPUMCTX pCtx = &pVCpu->cpum.GstCtx;
    71767176    uint32_t const fIntrState = hmR0VmxGetGuestIntrState(pVCpu);
    7177     bool const fBlockMovSS    = RT_BOOL(fIntrState & VMX_VMCS_GUEST_INTERRUPTIBILITY_STATE_BLOCK_MOVSS);
    7178     bool const fBlockSti      = RT_BOOL(fIntrState & VMX_VMCS_GUEST_INTERRUPTIBILITY_STATE_BLOCK_STI);
    7179     bool const fBlockNmi      = RT_BOOL(fIntrState & VMX_VMCS_GUEST_INTERRUPTIBILITY_STATE_BLOCK_NMI);
     7177    bool const fBlockMovSS    = RT_BOOL(fIntrState & VMX_VMCS_GUEST_INT_STATE_BLOCK_MOVSS);
     7178    bool const fBlockSti      = RT_BOOL(fIntrState & VMX_VMCS_GUEST_INT_STATE_BLOCK_STI);
     7179    bool const fBlockNmi      = RT_BOOL(fIntrState & VMX_VMCS_GUEST_INT_STATE_BLOCK_NMI);
    71807180
    71817181    Assert(!fBlockSti || !(ASMAtomicUoReadU64(&pCtx->fExtrn) & CPUMCTX_EXTRN_RFLAGS));
    7182     Assert(!(fIntrState & VMX_VMCS_GUEST_INTERRUPTIBILITY_STATE_BLOCK_SMI));    /* We don't support block-by-SMI yet.*/
    7183     Assert(!fBlockSti || pCtx->eflags.Bits.u1IF);     /* Cannot set block-by-STI when interrupts are disabled. */
     7182    Assert(!(fIntrState & VMX_VMCS_GUEST_INT_STATE_BLOCK_SMI));    /* We don't support block-by-SMI yet.*/
     7183    Assert(!fBlockSti || pCtx->eflags.Bits.u1IF);                  /* Cannot set block-by-STI when interrupts are disabled. */
    71847184    Assert(!TRPMHasTrap(pVCpu));
    71857185
    … …  
    72017201        {
    72027202            Log4Func(("Pending NMI\n"));
    7203             uint32_t u32IntInfo = X86_XCPT_NMI | VMX_EXIT_INTERRUPTION_INFO_VALID;
    7204             u32IntInfo         |= (VMX_EXIT_INTERRUPTION_INFO_TYPE_NMI << VMX_EXIT_INTERRUPTION_INFO_TYPE_SHIFT);
     7203            uint32_t u32IntInfo = X86_XCPT_NMI | VMX_EXIT_INT_INFO_VALID;
     7204            u32IntInfo         |= (VMX_EXIT_INT_INFO_TYPE_NMI << VMX_EXIT_INT_INFO_TYPE_SHIFT);
    72057205
    72067206            hmR0VmxSetPendingEvent(pVCpu, u32IntInfo, 0 /* cbInstr */, 0 /* u32ErrCode */, 0 /* GCPtrFaultAddress */);
    … …  
    72327232                Log4Func(("Pending external interrupt u8Interrupt=%#x\n", u8Interrupt));
    72337233                uint32_t u32IntInfo = u8Interrupt
    7234                                     | VMX_EXIT_INTERRUPTION_INFO_VALID
    7235                                     | (VMX_EXIT_INTERRUPTION_INFO_TYPE_EXT_INT << VMX_EXIT_INTERRUPTION_INFO_TYPE_SHIFT);
     7234                                    | VMX_EXIT_INT_INFO_VALID
     7235                                    | (VMX_EXIT_INT_INFO_TYPE_EXT_INT << VMX_EXIT_INT_INFO_TYPE_SHIFT);
    72367236
    72377237                hmR0VmxSetPendingEvent(pVCpu, u32IntInfo, 0 /* cbInstr */, 0 /* u32ErrCode */, 0 /* GCPtrfaultAddress */);
    … …  
    72707270    Assert(!(ASMAtomicUoReadU64(&pVCpu->cpum.GstCtx.fExtrn) & CPUMCTX_EXTRN_RFLAGS));
    72717271    RT_NOREF(pVCpu);
    7272     return VMXWriteVmcs32(VMX_VMCS_GUEST_PENDING_DEBUG_EXCEPTIONS, VMX_VMCS_GUEST_DEBUG_EXCEPTIONS_BS);
     7272    return VMXWriteVmcs32(VMX_VMCS_GUEST_PENDING_DEBUG_XCPTS, VMX_VMCS_GUEST_DEBUG_EXCEPTIONS_BS);
    72737273}
    72747274
    … …  
    72907290    Assert(VMMRZCallRing3IsEnabled(pVCpu));
    72917291
    7292     bool fBlockMovSS = RT_BOOL(fIntrState & VMX_VMCS_GUEST_INTERRUPTIBILITY_STATE_BLOCK_MOVSS);
    7293     bool fBlockSti   = RT_BOOL(fIntrState & VMX_VMCS_GUEST_INTERRUPTIBILITY_STATE_BLOCK_STI);
     7292    bool fBlockMovSS = RT_BOOL(fIntrState & VMX_VMCS_GUEST_INT_STATE_BLOCK_MOVSS);
     7293    bool fBlockSti   = RT_BOOL(fIntrState & VMX_VMCS_GUEST_INT_STATE_BLOCK_STI);
    72947294
    72957295    Assert(!fBlockSti || !(ASMAtomicUoReadU64(&pVCpu->cpum.GstCtx.fExtrn) & CPUMCTX_EXTRN_RFLAGS));
    7296     Assert(!(fIntrState & VMX_VMCS_GUEST_INTERRUPTIBILITY_STATE_BLOCK_SMI));         /* We don't support block-by-SMI yet.*/
    7297     Assert(!fBlockSti || pVCpu->cpum.GstCtx.eflags.Bits.u1IF);   /* Cannot set block-by-STI when interrupts are disabled. */
     7296    Assert(!(fIntrState & VMX_VMCS_GUEST_INT_STATE_BLOCK_SMI));    /* We don't support block-by-SMI yet.*/
     7297    Assert(!fBlockSti || pVCpu->cpum.GstCtx.eflags.Bits.u1IF);     /* Cannot set block-by-STI when interrupts are disabled. */
    72987298    Assert(!TRPMHasTrap(pVCpu));
    72997299
    … …  
    73097309         * See Intel spec. 26.6.5 "Interrupt-Window Exiting and Virtual-Interrupt Delivery".
    73107310         */
    7311         uint32_t const uIntType = VMX_EXIT_INTERRUPTION_INFO_TYPE(pVCpu->hm.s.Event.u64IntInfo);
     7311        uint32_t const uIntType = VMX_EXIT_INT_INFO_TYPE(pVCpu->hm.s.Event.u64IntInfo);
    73127312#ifdef VBOX_STRICT
    7313         if (uIntType == VMX_EXIT_INTERRUPTION_INFO_TYPE_EXT_INT)
     7313        if (uIntType == VMX_EXIT_INT_INFO_TYPE_EXT_INT)
    73147314        {
    73157315            bool const fBlockInt = !(pCtx->eflags.u32 & X86_EFL_IF);
    … …  
    73187318            Assert(!fBlockMovSS);
    73197319        }
    7320         else if (uIntType == VMX_EXIT_INTERRUPTION_INFO_TYPE_NMI)
    7321         {
    7322             bool const fBlockNmi = RT_BOOL(fIntrState & VMX_VMCS_GUEST_INTERRUPTIBILITY_STATE_BLOCK_NMI);
     7320        else if (uIntType == VMX_EXIT_INT_INFO_TYPE_NMI)
     7321        {
     7322            bool const fBlockNmi = RT_BOOL(fIntrState & VMX_VMCS_GUEST_INT_STATE_BLOCK_NMI);
    73237323            Assert(!fBlockSti);
    73247324            Assert(!fBlockMovSS);
    … …  
    73357335        /* Update the interruptibility-state as it could have been changed by
    73367336           hmR0VmxInjectEventVmcs() (e.g. real-on-v86 guest injecting software interrupts) */
    7337         fBlockMovSS = RT_BOOL(fIntrState & VMX_VMCS_GUEST_INTERRUPTIBILITY_STATE_BLOCK_MOVSS);
    7338         fBlockSti   = RT_BOOL(fIntrState & VMX_VMCS_GUEST_INTERRUPTIBILITY_STATE_BLOCK_STI);
    7339 
    7340         if (uIntType == VMX_EXIT_INTERRUPTION_INFO_TYPE_EXT_INT)
     7337        fBlockMovSS = RT_BOOL(fIntrState & VMX_VMCS_GUEST_INT_STATE_BLOCK_MOVSS);
     7338        fBlockSti   = RT_BOOL(fIntrState & VMX_VMCS_GUEST_INT_STATE_BLOCK_STI);
     7339
     7340        if (uIntType == VMX_EXIT_INT_INFO_TYPE_EXT_INT)
    73417341            STAM_COUNTER_INC(&pVCpu->hm.s.StatInjectInterrupt);
    73427342        else
    … …  
    73957395DECLINLINE(void) hmR0VmxSetPendingXcptUD(PVMCPU pVCpu)
    73967396{
    7397     uint32_t u32IntInfo = X86_XCPT_UD | VMX_EXIT_INTERRUPTION_INFO_VALID;
     7397    uint32_t u32IntInfo = X86_XCPT_UD | VMX_EXIT_INT_INFO_VALID;
    73987398    hmR0VmxSetPendingEvent(pVCpu, u32IntInfo, 0 /* cbInstr */, 0 /* u32ErrCode */, 0 /* GCPtrFaultAddress */);
    73997399}
    … …  
    74157415DECLINLINE(VBOXSTRICTRC) hmR0VmxInjectXcptDF(PVMCPU pVCpu, bool fStepping, uint32_t *pfIntrState)
    74167416{
    7417     uint32_t u32IntInfo  = X86_XCPT_DF | VMX_EXIT_INTERRUPTION_INFO_VALID;
    7418     u32IntInfo          |= (VMX_EXIT_INTERRUPTION_INFO_TYPE_HW_XCPT << VMX_EXIT_INTERRUPTION_INFO_TYPE_SHIFT);
    7419     u32IntInfo          |= VMX_EXIT_INTERRUPTION_INFO_ERROR_CODE_VALID;
     7417    uint32_t u32IntInfo  = X86_XCPT_DF | VMX_EXIT_INT_INFO_VALID;
     7418    u32IntInfo          |= (VMX_EXIT_INT_INFO_TYPE_HW_XCPT << VMX_EXIT_INT_INFO_TYPE_SHIFT);
     7419    u32IntInfo          |= VMX_EXIT_INT_INFO_ERROR_CODE_VALID;
    74207420    return hmR0VmxInjectEventVmcs(pVCpu, u32IntInfo, 0 /* cbInstr */, 0 /* u32ErrCode */, 0 /* GCPtrFaultAddress */, fStepping,
    74217421                                  pfIntrState);
    … …  
    74307430DECLINLINE(void) hmR0VmxSetPendingXcptDB(PVMCPU pVCpu)
    74317431{
    7432     uint32_t u32IntInfo  = X86_XCPT_DB | VMX_EXIT_INTERRUPTION_INFO_VALID;
    7433     u32IntInfo          |= (VMX_EXIT_INTERRUPTION_INFO_TYPE_HW_XCPT << VMX_EXIT_INTERRUPTION_INFO_TYPE_SHIFT);
     7432    uint32_t u32IntInfo  = X86_XCPT_DB | VMX_EXIT_INT_INFO_VALID;
     7433    u32IntInfo          |= (VMX_EXIT_INT_INFO_TYPE_HW_XCPT << VMX_EXIT_INT_INFO_TYPE_SHIFT);
    74347434    hmR0VmxSetPendingEvent(pVCpu, u32IntInfo, 0 /* cbInstr */, 0 /* u32ErrCode */, 0 /* GCPtrFaultAddress */);
    74357435}
    … …  
    74457445DECLINLINE(void) hmR0VmxSetPendingXcptOF(PVMCPU pVCpu, uint32_t cbInstr)
    74467446{
    7447     uint32_t u32IntInfo  = X86_XCPT_OF | VMX_EXIT_INTERRUPTION_INFO_VALID;
    7448     u32IntInfo          |= (VMX_EXIT_INTERRUPTION_INFO_TYPE_SW_INT << VMX_EXIT_INTERRUPTION_INFO_TYPE_SHIFT);
     7447    uint32_t u32IntInfo  = X86_XCPT_OF | VMX_EXIT_INT_INFO_VALID;
     7448    u32IntInfo          |= (VMX_EXIT_INT_INFO_TYPE_SW_INT << VMX_EXIT_INT_INFO_TYPE_SHIFT);
    74497449    hmR0VmxSetPendingEvent(pVCpu, u32IntInfo, cbInstr, 0 /* u32ErrCode */, 0 /* GCPtrFaultAddress */);
    74507450}
    … …  
    74717471                                             uint32_t *pfIntrState)
    74727472{
    7473     uint32_t u32IntInfo  = X86_XCPT_GP | VMX_EXIT_INTERRUPTION_INFO_VALID;
    7474     u32IntInfo          |= (VMX_EXIT_INTERRUPTION_INFO_TYPE_HW_XCPT << VMX_EXIT_INTERRUPTION_INFO_TYPE_SHIFT);
     7473    uint32_t u32IntInfo  = X86_XCPT_GP | VMX_EXIT_INT_INFO_VALID;
     7474    u32IntInfo          |= (VMX_EXIT_INT_INFO_TYPE_HW_XCPT << VMX_EXIT_INT_INFO_TYPE_SHIFT);
    74757475    if (fErrorCodeValid)
    7476         u32IntInfo |= VMX_EXIT_INTERRUPTION_INFO_ERROR_CODE_VALID;
     7476        u32IntInfo |= VMX_EXIT_INT_INFO_ERROR_CODE_VALID;
    74777477    return hmR0VmxInjectEventVmcs(pVCpu, u32IntInfo, 0 /* cbInstr */, u32ErrorCode, 0 /* GCPtrFaultAddress */, fStepping,
    74787478                                  pfIntrState);
    … …  
    74907490DECLINLINE(void) hmR0VmxSetPendingIntN(PVMCPU pVCpu, uint16_t uVector, uint32_t cbInstr)
    74917491{
    7492     uint32_t u32IntInfo = uVector | VMX_EXIT_INTERRUPTION_INFO_VALID;
     7492    uint32_t u32IntInfo = uVector | VMX_EXIT_INT_INFO_VALID;
    74937493    if (   uVector == X86_XCPT_BP
    74947494        || uVector == X86_XCPT_OF)
    7495         u32IntInfo |= (VMX_EXIT_INTERRUPTION_INFO_TYPE_SW_XCPT << VMX_EXIT_INTERRUPTION_INFO_TYPE_SHIFT);
     7495        u32IntInfo |= (VMX_EXIT_INT_INFO_TYPE_SW_XCPT << VMX_EXIT_INT_INFO_TYPE_SHIFT);
    74967496    else
    7497         u32IntInfo |= (VMX_EXIT_INTERRUPTION_INFO_TYPE_SW_INT << VMX_EXIT_INTERRUPTION_INFO_TYPE_SHIFT);
     7497        u32IntInfo |= (VMX_EXIT_INT_INFO_TYPE_SW_INT << VMX_EXIT_INT_INFO_TYPE_SHIFT);
    74987498    hmR0VmxSetPendingEvent(pVCpu, u32IntInfo, cbInstr, 0 /* u32ErrCode */, 0 /* GCPtrFaultAddress */);
    74997499}
    … …  
    75597559    PCPUMCTX       pCtx       = &pVCpu->cpum.GstCtx;
    75607560    uint32_t       u32IntInfo = (uint32_t)u64IntInfo;
    7561     uint32_t const uVector    = VMX_EXIT_INTERRUPTION_INFO_VECTOR(u32IntInfo);
    7562     uint32_t const uIntType   = VMX_EXIT_INTERRUPTION_INFO_TYPE(u32IntInfo);
     7561    uint32_t const uVector    = VMX_EXIT_INT_INFO_VECTOR(u32IntInfo);
     7562    uint32_t const uIntType   = VMX_EXIT_INT_INFO_TYPE(u32IntInfo);
    75637563
    75647564#ifdef VBOX_STRICT
    … …  
    75697569     * See Intel spec. 20.1.4 "Interrupt and Exception Handling"
    75707570     */
    7571     if (   uIntType == VMX_EXIT_INTERRUPTION_INFO_TYPE_HW_XCPT
     7571    if (   uIntType == VMX_EXIT_INT_INFO_TYPE_HW_XCPT
    75727572        && !CPUMIsGuestInRealModeEx(pCtx))
    75737573    {
    … …  
    75817581            case X86_XCPT_GP:
    75827582            case X86_XCPT_AC:
    7583                 AssertMsg(VMX_EXIT_INTERRUPTION_INFO_IS_ERROR_CODE_VALID(u32IntInfo),
     7583                AssertMsg(VMX_EXIT_INT_INFO_IS_ERROR_CODE_VALID(u32IntInfo),
    75847584                          ("Error-code-valid bit not set for exception that has an error code uVector=%#x\n", uVector));
    75857585                RT_FALL_THRU();
    … …  
    75917591
    75927592    /* Cannot inject an NMI when block-by-MOV SS is in effect. */
    7593     Assert(   uIntType != VMX_EXIT_INTERRUPTION_INFO_TYPE_NMI
    7594            || !(*pfIntrState & VMX_VMCS_GUEST_INTERRUPTIBILITY_STATE_BLOCK_MOVSS));
     7593    Assert(   uIntType != VMX_EXIT_INT_INFO_TYPE_NMI
     7594           || !(*pfIntrState & VMX_VMCS_GUEST_INT_STATE_BLOCK_MOVSS));
    75957595
    75967596    STAM_COUNTER_INC(&pVCpu->hm.s.paStatInjectedIrqsR0[uVector & MASK_INJECT_IRQ_STAT]);
    … …  
    76147614             * See Intel spec. 26.2.1.3 "VM-Entry Control Fields".
    76157615             */
    7616             u32IntInfo &= ~VMX_EXIT_INTERRUPTION_INFO_ERROR_CODE_VALID;
     7616            u32IntInfo &= ~VMX_EXIT_INT_INFO_ERROR_CODE_VALID;
    76177617        }
    76187618        else
    … …  
    76507650            /* Software exceptions (#BP and #OF exceptions thrown as a result of INT3 or INTO) */
    76517651            uint16_t uGuestIp = pCtx->ip;
    7652             if (uIntType == VMX_EXIT_INTERRUPTION_INFO_TYPE_SW_XCPT)
     7652            if (uIntType == VMX_EXIT_INT_INFO_TYPE_SW_XCPT)
    76537653            {
    76547654                Assert(uVector == X86_XCPT_BP || uVector == X86_XCPT_OF);
    … …  
    76567656                uGuestIp = pCtx->ip + (uint16_t)cbInstr;
    76577657            }
    7658             else if (uIntType == VMX_EXIT_INTERRUPTION_INFO_TYPE_SW_INT)
     7658            else if (uIntType == VMX_EXIT_INT_INFO_TYPE_SW_INT)
    76597659                uGuestIp = pCtx->ip + (uint16_t)cbInstr;
    76607660
    … …  
    76817681                pCtx->cs.ValidSel = IdtEntry.uSel;
    76827682                pCtx->cs.u64Base  = IdtEntry.uSel << cbIdtEntry;
    7683                 if (   uIntType == VMX_EXIT_INTERRUPTION_INFO_TYPE_HW_XCPT
     7683                if (   uIntType == VMX_EXIT_INT_INFO_TYPE_HW_XCPT
    76847684                    && uVector  == X86_XCPT_PF)
    76857685                    pCtx->cr2 = GCPtrFaultAddress;
    … …  
    76927692
    76937693                /* We're clearing interrupts, which means no block-by-STI interrupt-inhibition. */
    7694                 if (*pfIntrState & VMX_VMCS_GUEST_INTERRUPTIBILITY_STATE_BLOCK_STI)
     7694                if (*pfIntrState & VMX_VMCS_GUEST_INT_STATE_BLOCK_STI)
    76957695                {
    7696                     Assert(   uIntType != VMX_EXIT_INTERRUPTION_INFO_TYPE_NMI
    7697                            && uIntType != VMX_EXIT_INTERRUPTION_INFO_TYPE_EXT_INT);
     7696                    Assert(   uIntType != VMX_EXIT_INT_INFO_TYPE_NMI
     7697                           && uIntType != VMX_EXIT_INT_INFO_TYPE_EXT_INT);
    76987698                    Log4Func(("Clearing inhibition due to STI\n"));
    7699                     *pfIntrState &= ~VMX_VMCS_GUEST_INTERRUPTIBILITY_STATE_BLOCK_STI;
     7699                    *pfIntrState &= ~VMX_VMCS_GUEST_INT_STATE_BLOCK_STI;
    77007700                }
    77017701                Log4(("Injecting real-mode: u32IntInfo=%#x u32ErrCode=%#x cbInstr=%#x Eflags=%#x CS:EIP=%04x:%04x\n",
    … …  
    77177717
    77187718    /* Validate. */
    7719     Assert(VMX_EXIT_INTERRUPTION_INFO_IS_VALID(u32IntInfo));             /* Bit 31 (Valid bit) must be set by caller. */
    7720     Assert(!VMX_EXIT_INTERRUPTION_INFO_IS_NMI_UNBLOCK_IRET(u32IntInfo)); /* Bit 12 MBZ. */
     7719    Assert(VMX_EXIT_INT_INFO_IS_VALID(u32IntInfo));                      /* Bit 31 (Valid bit) must be set by caller. */
     7720    Assert(!VMX_EXIT_INT_INFO_IS_NMI_UNBLOCK_IRET(u32IntInfo));          /* Bit 12 MBZ. */
    77217721    Assert(!(u32IntInfo & 0x7ffff000));                                  /* Bits 30:12 MBZ. */
    77227722
    77237723    /* Inject. */
    77247724    int rc = VMXWriteVmcs32(VMX_VMCS32_CTRL_ENTRY_INTERRUPTION_INFO, u32IntInfo);
    7725     if (VMX_EXIT_INTERRUPTION_INFO_IS_ERROR_CODE_VALID(u32IntInfo))
     7725    if (VMX_EXIT_INT_INFO_IS_ERROR_CODE_VALID(u32IntInfo))
    77267726        rc |= VMXWriteVmcs32(VMX_VMCS32_CTRL_ENTRY_EXCEPTION_ERRCODE, u32ErrCode);
    77277727    rc |= VMXWriteVmcs32(VMX_VMCS32_CTRL_ENTRY_INSTR_LENGTH, cbInstr);
    … …  
    77297729
    77307730    /* Update CR2. */
    7731     if (   VMX_EXIT_INTERRUPTION_INFO_TYPE(u32IntInfo) == VMX_EXIT_INTERRUPTION_INFO_TYPE_HW_XCPT
     7731    if (   VMX_EXIT_INT_INFO_TYPE(u32IntInfo) == VMX_EXIT_INT_INFO_TYPE_HW_XCPT
    77327732        && uVector == X86_XCPT_PF)
    77337733        pCtx->cr2 = GCPtrFaultAddress;
    … …  
    85568556    AssertRC(rc);
    85578557    pVmxTransient->uExitReason    = (uint16_t)VMX_EXIT_REASON_BASIC(uExitReason);
    8558     pVmxTransient->fVMEntryFailed = VMX_ENTRY_INTERRUPTION_INFO_IS_VALID(pVmxTransient->uEntryIntInfo);
     8558    pVmxTransient->fVMEntryFailed = VMX_ENTRY_INT_INFO_IS_VALID(pVmxTransient->uEntryIntInfo);
    85598559
    85608560    if (rcVMRun == VINF_SUCCESS)
    … …  
    92409240        case VMX_EXIT_XCPT_OR_NMI:
    92419241        {
    9242             uint8_t const idxVector = VMX_EXIT_INTERRUPTION_INFO_VECTOR(pVmxTransient->uExitIntInfo);
    9243             switch (VMX_EXIT_INTERRUPTION_INFO_TYPE(pVmxTransient->uExitIntInfo))
     9242            uint8_t const idxVector = VMX_EXIT_INT_INFO_VECTOR(pVmxTransient->uExitIntInfo);
     9243            switch (VMX_EXIT_INT_INFO_TYPE(pVmxTransient->uExitIntInfo))
    92449244            {
    9245                 case VMX_EXIT_INTERRUPTION_INFO_TYPE_HW_XCPT:
    9246                 case VMX_EXIT_INTERRUPTION_INFO_TYPE_SW_XCPT:
    9247                 case VMX_EXIT_INTERRUPTION_INFO_TYPE_PRIV_SW_XCPT:
     9245                case VMX_EXIT_INT_INFO_TYPE_HW_XCPT:
     9246                case VMX_EXIT_INT_INFO_TYPE_SW_XCPT:
     9247                case VMX_EXIT_INT_INFO_TYPE_PRIV_SW_XCPT:
    92489248                    if (idxVector <= (unsigned)(DBGFEVENT_XCPT_LAST - DBGFEVENT_XCPT_FIRST))
    92499249                    {
    9250                         if (VMX_EXIT_INTERRUPTION_INFO_IS_ERROR_CODE_VALID(pVmxTransient->uExitIntInfo))
     9250                        if (VMX_EXIT_INT_INFO_IS_ERROR_CODE_VALID(pVmxTransient->uExitIntInfo))
    92519251                        {
    92529252                            hmR0VmxReadExitIntErrorCodeVmcs(pVmxTransient);
    … …  
    92819281                    break;
    92829282
    9283                 case VMX_EXIT_INTERRUPTION_INFO_TYPE_SW_INT:
     9283                case VMX_EXIT_INT_INFO_TYPE_SW_INT:
    92849284                    uEventArg = idxVector;
    92859285                    enmEvent1 = DBGFEVENT_INTERRUPT_SOFTWARE;
    … …  
    96099609        int rc2 = hmR0VmxReadExitIntInfoVmcs(pVmxTransient);
    96109610        AssertRCReturn(rc2, rc2);
    9611         uint32_t uIntType = VMX_EXIT_INTERRUPTION_INFO_TYPE(pVmxTransient->uExitIntInfo);
    9612         if (uIntType == VMX_EXIT_INTERRUPTION_INFO_TYPE_NMI)
     9611        uint32_t uIntType = VMX_EXIT_INT_INFO_TYPE(pVmxTransient->uExitIntInfo);
     9612        if (uIntType == VMX_EXIT_INT_INFO_TYPE_NMI)
    96139613            return hmR0VmxExitXcptOrNmi(pVCpu, pVmxTransient);
    96149614    }
    … …  
    1036210362        rc = VMXReadVmcs32(VMX_VMCS32_CTRL_ENTRY_INTERRUPTION_INFO, &u32EntryInfo);
    1036310363        AssertRCBreak(rc);
    10364         if (   VMX_ENTRY_INTERRUPTION_INFO_IS_VALID(u32EntryInfo)
    10365             && VMX_ENTRY_INTERRUPTION_INFO_TYPE(u32EntryInfo) == VMX_EXIT_INTERRUPTION_INFO_TYPE_EXT_INT)
     10364        if (   VMX_ENTRY_INT_INFO_IS_VALID(u32EntryInfo)
     10365            && VMX_ENTRY_INT_INFO_TYPE(u32EntryInfo) == VMX_EXIT_INT_INFO_TYPE_EXT_INT)
    1036610366        {
    1036710367            HMVMX_CHECK_BREAK(u32Eflags & X86_EFL_IF, VMX_IGS_RFLAGS_IF_INVALID);
    … …  
    1070310703                          || u32ActivityState != VMX_VMCS_GUEST_ACTIVITY_HLT, VMX_IGS_ACTIVITY_STATE_HLT_INVALID);
    1070410704        uint32_t u32IntrState;
    10705         rc = VMXReadVmcs32(VMX_VMCS32_GUEST_INTERRUPTIBILITY_STATE, &u32IntrState);
     10705        rc = VMXReadVmcs32(VMX_VMCS32_GUEST_INT_STATE, &u32IntrState);
    1070610706        AssertRCBreak(rc);
    10707         if (   u32IntrState == VMX_VMCS_GUEST_INTERRUPTIBILITY_STATE_BLOCK_MOVSS
    10708             || u32IntrState == VMX_VMCS_GUEST_INTERRUPTIBILITY_STATE_BLOCK_STI)
     10707        if (   u32IntrState == VMX_VMCS_GUEST_INT_STATE_BLOCK_MOVSS
     10708            || u32IntrState == VMX_VMCS_GUEST_INT_STATE_BLOCK_STI)
    1070910709        {
    1071010710            HMVMX_CHECK_BREAK(u32ActivityState == VMX_VMCS_GUEST_ACTIVITY_ACTIVE, VMX_IGS_ACTIVITY_STATE_ACTIVE_INVALID);
    … …  
    1071910719        /* Guest interruptibility-state. */
    1072010720        HMVMX_CHECK_BREAK(!(u32IntrState & 0xfffffff0), VMX_IGS_INTERRUPTIBILITY_STATE_RESERVED);
    10721         HMVMX_CHECK_BREAK((u32IntrState & (  VMX_VMCS_GUEST_INTERRUPTIBILITY_STATE_BLOCK_STI
    10722                                            | VMX_VMCS_GUEST_INTERRUPTIBILITY_STATE_BLOCK_MOVSS))
    10723                             != (  VMX_VMCS_GUEST_INTERRUPTIBILITY_STATE_BLOCK_STI
    10724                                 | VMX_VMCS_GUEST_INTERRUPTIBILITY_STATE_BLOCK_MOVSS),
     10721        HMVMX_CHECK_BREAK((u32IntrState & (VMX_VMCS_GUEST_INT_STATE_BLOCK_STI | VMX_VMCS_GUEST_INT_STATE_BLOCK_MOVSS))
     10722                                       != (VMX_VMCS_GUEST_INT_STATE_BLOCK_STI | VMX_VMCS_GUEST_INT_STATE_BLOCK_MOVSS),
    1072510723                          VMX_IGS_INTERRUPTIBILITY_STATE_STI_MOVSS_INVALID);
    1072610724        HMVMX_CHECK_BREAK(   (u32Eflags & X86_EFL_IF)
    10727                           || !(u32IntrState & VMX_VMCS_GUEST_INTERRUPTIBILITY_STATE_BLOCK_STI),
     10725                          || !(u32IntrState & VMX_VMCS_GUEST_INT_STATE_BLOCK_STI),
    1072810726                          VMX_IGS_INTERRUPTIBILITY_STATE_STI_EFL_INVALID);
    10729         if (VMX_ENTRY_INTERRUPTION_INFO_IS_VALID(u32EntryInfo))
    10730         {
    10731             if (VMX_ENTRY_INTERRUPTION_INFO_TYPE(u32EntryInfo) == VMX_EXIT_INTERRUPTION_INFO_TYPE_EXT_INT)
     10727        if (VMX_ENTRY_INT_INFO_IS_VALID(u32EntryInfo))
     10728        {
     10729            if (VMX_ENTRY_INT_INFO_TYPE(u32EntryInfo) == VMX_EXIT_INT_INFO_TYPE_EXT_INT)
    1073210730            {
    10733                 HMVMX_CHECK_BREAK(   !(u32IntrState & VMX_VMCS_GUEST_INTERRUPTIBILITY_STATE_BLOCK_STI)
    10734                                   && !(u32IntrState & VMX_VMCS_GUEST_INTERRUPTIBILITY_STATE_BLOCK_MOVSS),
     10731                HMVMX_CHECK_BREAK(   !(u32IntrState & VMX_VMCS_GUEST_INT_STATE_BLOCK_STI)
     10732                                  && !(u32IntrState & VMX_VMCS_GUEST_INT_STATE_BLOCK_MOVSS),
    1073510733                                  VMX_IGS_INTERRUPTIBILITY_STATE_EXT_INT_INVALID);
    1073610734            }
    10737             else if (VMX_ENTRY_INTERRUPTION_INFO_TYPE(u32EntryInfo) == VMX_EXIT_INTERRUPTION_INFO_TYPE_NMI)
     10735            else if (VMX_ENTRY_INT_INFO_TYPE(u32EntryInfo) == VMX_EXIT_INT_INFO_TYPE_NMI)
    1073810736            {
    10739                 HMVMX_CHECK_BREAK(!(u32IntrState & VMX_VMCS_GUEST_INTERRUPTIBILITY_STATE_BLOCK_MOVSS),
     10737                HMVMX_CHECK_BREAK(!(u32IntrState & VMX_VMCS_GUEST_INT_STATE_BLOCK_MOVSS),
    1074010738                                  VMX_IGS_INTERRUPTIBILITY_STATE_MOVSS_INVALID);
    10741                 HMVMX_CHECK_BREAK(!(u32IntrState & VMX_VMCS_GUEST_INTERRUPTIBILITY_STATE_BLOCK_STI),
     10739                HMVMX_CHECK_BREAK(!(u32IntrState & VMX_VMCS_GUEST_INT_STATE_BLOCK_STI),
    1074210740                                  VMX_IGS_INTERRUPTIBILITY_STATE_STI_INVALID);
    1074310741            }
    1074410742        }
    1074510743        /** @todo Assumes the processor is not in SMM. */
    10746         HMVMX_CHECK_BREAK(!(u32IntrState & VMX_VMCS_GUEST_INTERRUPTIBILITY_STATE_BLOCK_SMI),
     10744        HMVMX_CHECK_BREAK(!(u32IntrState & VMX_VMCS_GUEST_INT_STATE_BLOCK_SMI),
    1074710745                          VMX_IGS_INTERRUPTIBILITY_STATE_SMI_INVALID);
    1074810746        HMVMX_CHECK_BREAK(   !(pVCpu->hm.s.vmx.u32EntryCtls & VMX_VMCS_CTRL_ENTRY_ENTRY_SMM)
    10749                           || (u32IntrState & VMX_VMCS_GUEST_INTERRUPTIBILITY_STATE_BLOCK_SMI),
     10747                          || (u32IntrState & VMX_VMCS_GUEST_INT_STATE_BLOCK_SMI),
    1075010748                             VMX_IGS_INTERRUPTIBILITY_STATE_SMI_SMM_INVALID);
    1075110749        if (   (pVCpu->hm.s.vmx.u32PinCtls & VMX_VMCS_CTRL_PIN_EXEC_VIRTUAL_NMI)
    10752             && VMX_ENTRY_INTERRUPTION_INFO_IS_VALID(u32EntryInfo)
    10753             && VMX_ENTRY_INTERRUPTION_INFO_TYPE(u32EntryInfo) == VMX_EXIT_INTERRUPTION_INFO_TYPE_NMI)
    10754         {
    10755             HMVMX_CHECK_BREAK(!(u32IntrState & VMX_VMCS_GUEST_INTERRUPTIBILITY_STATE_BLOCK_NMI),
     10750            && VMX_ENTRY_INT_INFO_IS_VALID(u32EntryInfo)
     10751            && VMX_ENTRY_INT_INFO_TYPE(u32EntryInfo) == VMX_EXIT_INT_INFO_TYPE_NMI)
     10752        {
     10753            HMVMX_CHECK_BREAK(!(u32IntrState & VMX_VMCS_GUEST_INT_STATE_BLOCK_NMI),
    1075610754                              VMX_IGS_INTERRUPTIBILITY_STATE_NMI_INVALID);
    1075710755        }
    … …  
    1075910757        /* Pending debug exceptions. */
    1076010758#if HC_ARCH_BITS == 64
    10761         rc = VMXReadVmcs64(VMX_VMCS_GUEST_PENDING_DEBUG_EXCEPTIONS, &u64Val);
     10759        rc = VMXReadVmcs64(VMX_VMCS_GUEST_PENDING_DEBUG_XCPTS, &u64Val);
    1076210760        AssertRCBreak(rc);
    1076310761        /* Bits 63:15, Bit 13, Bits 11:4 MBZ. */
    … …  
    1076510763        u32Val = u64Val;    /* For pending debug exceptions checks below. */
    1076610764#else
    10767         rc = VMXReadVmcs32(VMX_VMCS_GUEST_PENDING_DEBUG_EXCEPTIONS, &u32Val);
     10765        rc = VMXReadVmcs32(VMX_VMCS_GUEST_PENDING_DEBUG_XCPTS, &u32Val);
    1076810766        AssertRCBreak(rc);
    1076910767        /* Bits 31:15, Bit 13, Bits 11:4 MBZ. */
    … …  
    1077110769#endif
    1077210770
    10773         if (   (u32IntrState & VMX_VMCS_GUEST_INTERRUPTIBILITY_STATE_BLOCK_STI)
    10774             || (u32IntrState & VMX_VMCS_GUEST_INTERRUPTIBILITY_STATE_BLOCK_MOVSS)
     10771        if (   (u32IntrState & VMX_VMCS_GUEST_INT_STATE_BLOCK_STI)
     10772            || (u32IntrState & VMX_VMCS_GUEST_INT_STATE_BLOCK_MOVSS)
    1077510773            || u32ActivityState == VMX_VMCS_GUEST_ACTIVITY_HLT)
    1077610774        {
    … …  
    1086910867    AssertRCReturn(rc, rc);
    1087010868
    10871     uint32_t uIntType = VMX_EXIT_INTERRUPTION_INFO_TYPE(pVmxTransient->uExitIntInfo);
     10869    uint32_t uIntType = VMX_EXIT_INT_INFO_TYPE(pVmxTransient->uExitIntInfo);
    1087210870    Assert(   !(pVCpu->hm.s.vmx.u32ExitCtls & VMX_VMCS_CTRL_EXIT_ACK_EXT_INT)
    10873            && uIntType != VMX_EXIT_INTERRUPTION_INFO_TYPE_EXT_INT);
    10874     Assert(VMX_EXIT_INTERRUPTION_INFO_IS_VALID(pVmxTransient->uExitIntInfo));
    10875 
    10876     if (uIntType == VMX_EXIT_INTERRUPTION_INFO_TYPE_NMI)
     10871           && uIntType != VMX_EXIT_INT_INFO_TYPE_EXT_INT);
     10872    Assert(VMX_EXIT_INT_INFO_IS_VALID(pVmxTransient->uExitIntInfo));
     10873
     10874    if (uIntType == VMX_EXIT_INT_INFO_TYPE_NMI)
    1087710875    {
    1087810876        /*
    … …  
    1090310901
    1090410902    uint32_t uExitIntInfo = pVmxTransient->uExitIntInfo;
    10905     uint32_t uVector      = VMX_EXIT_INTERRUPTION_INFO_VECTOR(uExitIntInfo);
     10903    uint32_t uVector      = VMX_EXIT_INT_INFO_VECTOR(uExitIntInfo);
    1090610904    switch (uIntType)
    1090710905    {
    10908         case VMX_EXIT_INTERRUPTION_INFO_TYPE_PRIV_SW_XCPT:  /* Privileged software exception. (#DB from ICEBP) */
     10906        case VMX_EXIT_INT_INFO_TYPE_PRIV_SW_XCPT:  /* Privileged software exception. (#DB from ICEBP) */
    1090910907            Assert(uVector == X86_XCPT_DB);
    1091010908            RT_FALL_THRU();
    10911         case VMX_EXIT_INTERRUPTION_INFO_TYPE_SW_XCPT:       /* Software exception. (#BP or #OF) */
    10912             Assert(uVector == X86_XCPT_BP || uVector == X86_XCPT_OF || uIntType == VMX_EXIT_INTERRUPTION_INFO_TYPE_PRIV_SW_XCPT);
     10909        case VMX_EXIT_INT_INFO_TYPE_SW_XCPT:       /* Software exception. (#BP or #OF) */
     10910            Assert(uVector == X86_XCPT_BP || uVector == X86_XCPT_OF || uIntType == VMX_EXIT_INT_INFO_TYPE_PRIV_SW_XCPT);
    1091310911            RT_FALL_THRU();
    10914         case VMX_EXIT_INTERRUPTION_INFO_TYPE_HW_XCPT:
     10912        case VMX_EXIT_INT_INFO_TYPE_HW_XCPT:
    1091510913        {
    1091610914            /*
    … …  
    1096410962                        rc |= hmR0VmxReadExitIntErrorCodeVmcs(pVmxTransient);
    1096510963                        AssertRCReturn(rc, rc);
    10966                         hmR0VmxSetPendingEvent(pVCpu, VMX_VMCS_CTRL_ENTRY_IRQ_INFO_FROM_EXIT_INT_INFO(uExitIntInfo),
     10964                        hmR0VmxSetPendingEvent(pVCpu, VMX_VMCS_ENTRY_IRQ_INFO_FROM_EXIT_INT_INFO(uExitIntInfo),
    1096710965                                               pVmxTransient->cbInstr, pVmxTransient->uExitIntErrorCode,
    1096810966                                               0 /* GCPtrFaultAddress */);
    … …  
    1098410982            pVCpu->hm.s.u32HMError = uExitIntInfo;
    1098510983            rc = VERR_VMX_UNEXPECTED_INTERRUPTION_EXIT_TYPE;
    10986             AssertMsgFailed(("Unexpected interruption info %#x\n", VMX_EXIT_INTERRUPTION_INFO_TYPE(uExitIntInfo)));
     10984            AssertMsgFailed(("Unexpected interruption info %#x\n", VMX_EXIT_INT_INFO_TYPE(uExitIntInfo)));
    1098710985            break;
    1098810986        }
    … …  
    1102811026     */
    1102911027    uint32_t fIntrState = 0;
    11030     int rc = VMXReadVmcs32(VMX_VMCS32_GUEST_INTERRUPTIBILITY_STATE, &fIntrState);
     11028    int rc = VMXReadVmcs32(VMX_VMCS32_GUEST_INT_STATE, &fIntrState);
    1103111029    AssertRCReturn(rc, rc);
    1103211030
    11033     bool const fBlockSti = RT_BOOL(fIntrState & VMX_VMCS_GUEST_INTERRUPTIBILITY_STATE_BLOCK_STI);
     11031    bool const fBlockSti = RT_BOOL(fIntrState & VMX_VMCS_GUEST_INT_STATE_BLOCK_STI);
    1103411032    if (   fBlockSti
    1103511033        && VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_INHIBIT_INTERRUPTS))
    … …  
    1156011558    rc |= hmR0VmxReadEntryXcptErrorCodeVmcs(pVmxTransient);
    1156111559    rc |= hmR0VmxReadEntryInstrLenVmcs(pVmxTransient);
    11562     rc |= VMXReadVmcs32(VMX_VMCS32_GUEST_INTERRUPTIBILITY_STATE, &fIntrState);
     11560    rc |= VMXReadVmcs32(VMX_VMCS32_GUEST_INT_STATE, &fIntrState);
    1156311561    AssertRCReturn(rc, rc);
    1156411562
    … …  
    1156711565    Log4(("VMX_VMCS32_CTRL_ENTRY_EXCEPTION_ERRCODE    %#RX32\n", pVmxTransient->uEntryXcptErrorCode));
    1156811566    Log4(("VMX_VMCS32_CTRL_ENTRY_INSTR_LENGTH         %#RX32\n", pVmxTransient->cbEntryInstr));
    11569     Log4(("VMX_VMCS32_GUEST_INTERRUPTIBILITY_STATE    %#RX32\n", fIntrState));
     11567    Log4(("VMX_VMCS32_GUEST_INT_STATE                 %#RX32\n", fIntrState));
    1157011568
    1157111569    rc = VMXReadVmcs32(VMX_VMCS_GUEST_CR0, &u32Val);                        AssertRC(rc);
    … …  
    1257812576     */
    1257912577    RTGCPHYS GCPhys;
    12580     int rc = VMXReadVmcs64(VMX_VMCS64_EXIT_GUEST_PHYS_ADDR_FULL, &GCPhys);
     12578    int rc = VMXReadVmcs64(VMX_VMCS64_RO_GUEST_PHYS_ADDR_FULL, &GCPhys);
    1258112579    rc    |= hmR0VmxImportGuestState(pVCpu, IEM_CPUMCTX_EXTRN_MUST_MASK);
    1258212580    AssertRCReturn(rc, rc);
    … …  
    1265612654
    1265712655    RTGCPHYS GCPhys;
    12658     int rc  = VMXReadVmcs64(VMX_VMCS64_EXIT_GUEST_PHYS_ADDR_FULL, &GCPhys);
     12656    int rc  = VMXReadVmcs64(VMX_VMCS64_RO_GUEST_PHYS_ADDR_FULL, &GCPhys);
    1265912657    rc     |= hmR0VmxReadExitQualificationVmcs(pVCpu, pVmxTransient);
    1266012658    rc     |= hmR0VmxImportGuestState(pVCpu, IEM_CPUMCTX_EXTRN_MUST_MASK);
    … …  
    1273412732    }
    1273512733
    12736     hmR0VmxSetPendingEvent(pVCpu, VMX_VMCS_CTRL_ENTRY_IRQ_INFO_FROM_EXIT_INT_INFO(pVmxTransient->uExitIntInfo),
     12734    hmR0VmxSetPendingEvent(pVCpu, VMX_VMCS_ENTRY_IRQ_INFO_FROM_EXIT_INT_INFO(pVmxTransient->uExitIntInfo),
    1273712735                           pVmxTransient->cbInstr, pVmxTransient->uExitIntErrorCode, 0 /* GCPtrFaultAddress */);
    1273812736    return rc;
    … …  
    1276012758        AssertRCReturn(rc, rc);
    1276112759
    12762         hmR0VmxSetPendingEvent(pVCpu, VMX_VMCS_CTRL_ENTRY_IRQ_INFO_FROM_EXIT_INT_INFO(pVmxTransient->uExitIntInfo),
     12760        hmR0VmxSetPendingEvent(pVCpu, VMX_VMCS_ENTRY_IRQ_INFO_FROM_EXIT_INT_INFO(pVmxTransient->uExitIntInfo),
    1276312761                               pVmxTransient->cbInstr, pVmxTransient->uExitIntErrorCode, 0 /* GCPtrFaultAddress */);
    1276412762    }
    … …  
    1278412782    Assert(ASMAtomicUoReadU32(&pVmxTransient->fVmcsFieldsRead) & HMVMX_READ_EXIT_INTERRUPTION_INFO);
    1278512783
    12786     hmR0VmxSetPendingEvent(pVCpu, VMX_VMCS_CTRL_ENTRY_IRQ_INFO_FROM_EXIT_INT_INFO(pVmxTransient->uExitIntInfo),
     12784    hmR0VmxSetPendingEvent(pVCpu, VMX_VMCS_ENTRY_IRQ_INFO_FROM_EXIT_INT_INFO(pVmxTransient->uExitIntInfo),
    1278712785                           pVmxTransient->cbInstr, pVmxTransient->uExitIntErrorCode, 0 /* GCPtrFaultAddress */);
    1278812786    return VINF_SUCCESS;
    … …  
    1285812856        rc |= hmR0VmxReadExitIntErrorCodeVmcs(pVmxTransient);
    1285912857        AssertRCReturn(rc, rc);
    12860         hmR0VmxSetPendingEvent(pVCpu, VMX_VMCS_CTRL_ENTRY_IRQ_INFO_FROM_EXIT_INT_INFO(pVmxTransient->uExitIntInfo),
     12858        hmR0VmxSetPendingEvent(pVCpu, VMX_VMCS_ENTRY_IRQ_INFO_FROM_EXIT_INT_INFO(pVmxTransient->uExitIntInfo),
    1286112859                               pVmxTransient->cbInstr, pVmxTransient->uExitIntErrorCode, 0 /* GCPtrFaultAddress */);
    1286212860        return VINF_SUCCESS;
    … …  
    1290112899        Log4Func(("Gst: CS:RIP %04x:%08RX64 ErrorCode=%#x CR0=%#RX64 CPL=%u TR=%#04x\n", pCtx->cs.Sel, pCtx->rip,
    1290212900                  pVmxTransient->uExitIntErrorCode, pCtx->cr0, CPUMGetGuestCPL(pVCpu), pCtx->tr.Sel));
    12903         hmR0VmxSetPendingEvent(pVCpu, VMX_VMCS_CTRL_ENTRY_IRQ_INFO_FROM_EXIT_INT_INFO(pVmxTransient->uExitIntInfo),
     12901        hmR0VmxSetPendingEvent(pVCpu, VMX_VMCS_ENTRY_IRQ_INFO_FROM_EXIT_INT_INFO(pVmxTransient->uExitIntInfo),
    1290412902                               pVmxTransient->cbInstr, pVmxTransient->uExitIntErrorCode, 0 /* GCPtrFaultAddress */);
    1290512903        return rc;
    … …  
    1320313201    AssertMsg(pVCpu->hm.s.fUsingDebugLoop || pVCpu->hm.s.vmx.RealMode.fRealOnV86Active,
    1320413202              ("uVector=%#x u32XcptBitmap=%#X32\n",
    13205                VMX_EXIT_INTERRUPTION_INFO_VECTOR(pVmxTransient->uExitIntInfo), pVCpu->hm.s.vmx.u32XcptBitmap));
     13203               VMX_EXIT_INT_INFO_VECTOR(pVmxTransient->uExitIntInfo), pVCpu->hm.s.vmx.u32XcptBitmap));
    1320613204#endif
    1320713205
    … …  
    1321513213#ifdef DEBUG_ramshankar
    1321613214    rc |= hmR0VmxImportGuestState(pVCpu, CPUMCTX_EXTRN_CS | CPUMCTX_EXTRN_RIP);
    13217     uint8_t uVector = VMX_EXIT_INTERRUPTION_INFO_VECTOR(pVmxTransient->uExitIntInfo);
     13215    uint8_t uVector = VMX_EXIT_INT_INFO_VECTOR(pVmxTransient->uExitIntInfo);
    1321813216    Log(("hmR0VmxExitXcptGeneric: Reinjecting Xcpt. uVector=%#x cs:rip=%#04x:%#RX64\n", uVector, pCtx->cs.Sel, pCtx->rip));
    1321913217#endif
    1322013218
    13221     hmR0VmxSetPendingEvent(pVCpu, VMX_VMCS_CTRL_ENTRY_IRQ_INFO_FROM_EXIT_INT_INFO(pVmxTransient->uExitIntInfo),
     13219    hmR0VmxSetPendingEvent(pVCpu, VMX_VMCS_ENTRY_IRQ_INFO_FROM_EXIT_INT_INFO(pVmxTransient->uExitIntInfo),
    1322213220                           pVmxTransient->cbInstr, pVmxTransient->uExitIntErrorCode, 0 /* GCPtrFaultAddress */);
    1322313221    return VINF_SUCCESS;
    … …  
    1324713245        if (RT_LIKELY(!pVmxTransient->fVectoringDoublePF))
    1324813246        {
    13249             hmR0VmxSetPendingEvent(pVCpu, VMX_VMCS_CTRL_ENTRY_IRQ_INFO_FROM_EXIT_INT_INFO(pVmxTransient->uExitIntInfo),
     13247            hmR0VmxSetPendingEvent(pVCpu, VMX_VMCS_ENTRY_IRQ_INFO_FROM_EXIT_INT_INFO(pVmxTransient->uExitIntInfo),
    1325013248                                   0 /* cbInstr */, pVmxTransient->uExitIntErrorCode, pVmxTransient->uExitQualification);
    1325113249        }
    … …  
    1330013298            TRPMResetTrap(pVCpu);
    1330113299            pVCpu->hm.s.Event.fPending = false;                 /* In case it's a contributory #PF. */
    13302             hmR0VmxSetPendingEvent(pVCpu, VMX_VMCS_CTRL_ENTRY_IRQ_INFO_FROM_EXIT_INT_INFO(pVmxTransient->uExitIntInfo),
     13300            hmR0VmxSetPendingEvent(pVCpu, VMX_VMCS_ENTRY_IRQ_INFO_FROM_EXIT_INT_INFO(pVmxTransient->uExitIntInfo),
    1330313301                                   0 /* cbInstr */, uGstErrorCode, pVmxTransient->uExitQualification);
    1330413302        }
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