VirtualBox

Changeset 7358 in vbox


Ignore:
Timestamp:
Mar 7, 2008 1:13:17 PM (17 years ago)
Author:
vboxsync
svn:sync-xref-src-repo-rev:
28781
Message:

pcnet: logging

File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/src/VBox/Devices/Network/DevPCNet.cpp

    r7321 r7358  
    7171#define PCNET_GC_ENABLED
    7272
    73 #if 0
    74 #define LOG_REGISTER(a)                 LogRel(a)
    75 #else
    76 #define LOG_REGISTER(a)
    77 #endif
    78 #if 0
    79 #define LOG_PACKET(name, buf, count)    LogPkt(name, buf, count)
    80 #define LOG_PACKETS
    81 #else
    82 #define LOG_PACKET(name, buf, count)
    83 #undef  LOG_PACKETS
    84 #endif
    85 
    8673#if defined(LOG_ENABLED)
    8774#define PCNET_DEBUG_IO
     
    10592/* Maximum number of times we report a link down to the guest (failure to send frame) */
    10693#define PCNET_MAX_LINKDOWN_REPORTED     3
     94
     95#define MAX_FRAME                       1536
    10796
    10897/* Frame cache */
     
    250239    uint32_t                            u32LinkSpeed;
    251240
    252 /* #define PCNET_QUEUE_SEND_PACKETS */
     241//#define PCNET_QUEUE_SEND_PACKETS
    253242#ifdef PCNET_QUEUE_SEND_PACKETS
    254243    #define PCNET_MAX_XMIT_SLOTS         128
     
    263252    STAMCOUNTER                         StatReceiveBytes;
    264253    STAMCOUNTER                         StatTransmitBytes;
    265 
    266254#ifdef VBOX_WITH_STATISTICS
    267255    STAMPROFILEADV                      StatMMIOReadGC;
     
    309297};
    310298
    311 #define PCNETSTATE_2_DEVINS(pPCNet)            ( (pPCNet)->CTXSUFF(pDevIns) )
    312 #define PCIDEV_2_PCNETSTATE(pPciDev)           ( (PCNetState *)(pPciDev) )
     299#define PCNETSTATE_2_DEVINS(pPCNet)            ((pPCNet)->CTXSUFF(pDevIns))
     300#define PCIDEV_2_PCNETSTATE(pPciDev)           ((PCNetState *)(pPciDev))
     301#define PCNET_INST_NR                          (PCNETSTATE_2_DEVINS(pData)->iInstance)
    313302
    314303/* BUS CONFIGURATION REGISTERS */
     
    812801};
    813802#pragma pack()
    814 
    815 #ifdef LOG_PACKETS
    816 static void LogPkt(const char *name, const void *const src, int count)
    817 {
    818     int i, j;
    819     const uint8_t * const p = (const uint8_t * const)src;
    820     LogRel(("%s:  ", name));
    821     i  = 14;               // length of MAC header
    822     i += 4*(p[i] & 15);    // length of IP  header
    823     i += 4*(p[i+12] >> 4); // length of TCP header
    824     for (j=i; j<70 && j<count; j++)
    825         LogRel((" %02x", p[j]));
    826     LogRel((" ("));
    827     for (j=i; j<70 && j<count; j++)
    828         LogRel(("%c", p[j] >= 32 && p[j] < 127 ? p[j] : '.'));
    829     LogRel((")\n"));
    830 }
    831 #endif
    832803
    833804#define PRINT_PKTHDR(BUF) do {                                        \
     
    961932#ifdef PCNET_DEBUG_MATCH
    962933    Log(("#%d packet dhost=%02x:%02x:%02x:%02x:%02x:%02x, "
    963          "padr=%02x:%02x:%02x:%02x:%02x:%02x\n",
    964          PCNETSTATE_2_DEVINS(pData)->iInstance,
     934         "padr=%02x:%02x:%02x:%02x:%02x:%02x => %d\n", PCNET_INST_NR,
    965935         hdr->ether_dhost[0],hdr->ether_dhost[1],hdr->ether_dhost[2],
    966936         hdr->ether_dhost[3],hdr->ether_dhost[4],hdr->ether_dhost[5],
    967          padr[0],padr[1],padr[2],padr[3],padr[4],padr[5]));
    968     Log(("padr_match result=%d\n", result));
     937         padr[0],padr[1],padr[2],padr[3],padr[4],padr[5], result));
    969938#endif
    970939    return result;
     
    977946    int result = !CSR_DRCVBC(pData) && !memcmp(hdr->ether_dhost, aBCAST, 6);
    978947#ifdef PCNET_DEBUG_MATCH
    979     Log(("#%d padr_bcast result=%d\n", PCNETSTATE_2_DEVINS(pData)->iInstance, result));
     948    Log(("#%d padr_bcast result=%d\n", PCNET_INST_NR, result));
    980949#endif
    981950   return result;
     
    10761045    PCNetState *pData   = (PCNetState *)pvUser;
    10771046
    1078     Log(("#%d pcnetHandleRingWriteGC: write to %#010x\n", PCNETSTATE_2_DEVINS(pData)->iInstance, GCPhysFault));
     1047    Log(("#%d pcnetHandleRingWriteGC: write to %#010x\n", PCNET_INST_NR, GCPhysFault));
    10791048
    10801049    uint32_t cb;
     
    11371106    PCNetState *pData   = PDMINS2DATA(pDevIns, PCNetState *);
    11381107
    1139     Log(("#%d pcnetHandleRingWrite: write to %#010x\n", PCNETSTATE_2_DEVINS(pData)->iInstance, GCPhys));
     1108    Log(("#%d pcnetHandleRingWrite: write to %#010x\n", PCNET_INST_NR, GCPhys));
    11401109#ifdef VBOX_WITH_STATISTICS
    11411110    STAM_COUNTER_INC(&CTXSUFF(pData->StatRingWrite));
     
    11721141static void pcnetSoftReset(PCNetState *pData)
    11731142{
    1174     Log(("#%d pcnetSoftReset:\n", PCNETSTATE_2_DEVINS(pData)->iInstance));
     1143    Log(("#%d pcnetSoftReset:\n", PCNET_INST_NR));
    11751144
    11761145    pData->u32Lnkst = 0x40;
     
    12571226        pData->aCSR[4] &= ~0x0080; /* clear UINTCMD */
    12581227        pData->aCSR[4] |=  0x0040; /* set UINT */
    1259         Log(("#%d user int\n", PCNETSTATE_2_DEVINS(pData)->iInstance));
     1228        Log(("#%d user int\n", PCNET_INST_NR));
    12601229    }
    12611230    if (pData->aCSR[4] & csr0 & 0x0040 /* CSR_INEA */)
     
    12711240        csr0           |=  0x0080; /* set INTR */
    12721241        iISR = 1;
    1273         Log(("#%d user int\n", PCNETSTATE_2_DEVINS(pData)->iInstance));
     1242        Log(("#%d user int\n", PCNET_INST_NR));
    12741243    }
    12751244#endif /* !VBOX */
     
    12911260    pData->aCSR[0] = csr0;
    12921261
    1293     Log2(("#%d set irq iISR=%d\n", PCNETSTATE_2_DEVINS(pData)->iInstance, iISR));
     1262    Log2(("#%d set irq iISR=%d\n", PCNET_INST_NR, iISR));
    12941263
    12951264    /* normal path is to _not_ change the IRQ status */
    12961265    if (RT_UNLIKELY(iISR != pData->iISR))
    12971266    {
    1298         Log(("#%d INTA=%d\n", PCNETSTATE_2_DEVINS(pData)->iInstance, iISR));
     1267        Log(("#%d INTA=%d\n", PCNET_INST_NR, iISR));
    12991268        PDMDevHlpPCISetIrqNoWait(PCNETSTATE_2_DEVINS(pData), 0, iISR);
    13001269        pData->iISR = iISR;
     
    13961365{
    13971366    PPDMDEVINS pDevIns = PCNETSTATE_2_DEVINS(pData);
    1398     Log(("#%d pcnetInit: init_addr=%#010x\n", PCNETSTATE_2_DEVINS(pData)->iInstance,
    1399          PHYSADDR(pData, CSR_IADR(pData))));
     1367    Log(("#%d pcnetInit: init_addr=%#010x\n", PCNET_INST_NR, PHYSADDR(pData, CSR_IADR(pData))));
    14001368
    14011369    /** @todo Documentation says that RCVRL and XMTRL are stored as two's complement!
     
    14251393        PCNET_INIT();
    14261394        Log(("#%d initblk.rlen=%#04x, initblk.tlen=%#04x\n",
    1427              PCNETSTATE_2_DEVINS(pData)->iInstance, initblk.rlen, initblk.tlen));
     1395             PCNET_INST_NR, initblk.rlen, initblk.tlen));
    14281396    }
    14291397    else
     
    14331401        PCNET_INIT();
    14341402        Log(("#%d initblk.rlen=%#04x, initblk.tlen=%#04x\n",
    1435              PCNETSTATE_2_DEVINS(pData)->iInstance, initblk.rlen, initblk.tlen));
     1403             PCNET_INST_NR, initblk.rlen, initblk.tlen));
    14361404    }
    14371405
     
    14531421
    14541422    LogRel(("PCNet#%d: Init: ss32=%d GCRDRA=%#010x[%d] GCTDRA=%#010x[%d]\n",
    1455             PCNETSTATE_2_DEVINS(pData)->iInstance, BCR_SSIZE32(pData),
     1423            PCNET_INST_NR, BCR_SSIZE32(pData),
    14561424            pData->GCRDRA, CSR_RCVRL(pData), pData->GCTDRA, CSR_XMTRL(pData)));
    14571425
     
    14661434static void pcnetStart(PCNetState *pData)
    14671435{
    1468     Log(("#%d pcnetStart:\n", PCNETSTATE_2_DEVINS(pData)->iInstance));
     1436    Log(("#%d pcnetStart:\n", PCNET_INST_NR));
    14691437    if (!CSR_DTX(pData))
    14701438        pData->aCSR[0] |= 0x0010;    /* set TXON */
     
    14801448static void pcnetStop(PCNetState *pData)
    14811449{
    1482     Log(("#%d pcnetStop:\n", PCNETSTATE_2_DEVINS(pData)->iInstance));
     1450    Log(("#%d pcnetStop:\n", PCNET_INST_NR));
    14831451    pData->aCSR[0] &= ~0x7feb;
    14841452    pData->aCSR[0] |=  0x0014;
     
    15531521                /* This is not problematic since we don't own the descriptor */
    15541522                LogRel(("PCNet#%d: BAD RMD ENTRIES AT %#010x (i=%d)\n",
    1555                         PCNETSTATE_2_DEVINS(pData)->iInstance, addr, i));
     1523                        PCNET_INST_NR, addr, i));
    15561524                return;
    15571525            }
     
    15831551            /* This is not problematic since we don't own the descriptor */
    15841552            LogRel(("PCNet#%d: BAD RMD ENTRIES + AT %#010x (i=%d)\n",
    1585                     PCNETSTATE_2_DEVINS(pData)->iInstance, addr, i));
     1553                    PCNET_INST_NR, addr, i));
    15861554            return;
    15871555        }
     
    16201588            STAM_PROFILE_ADV_STOP(&pData->CTXSUFF(StatTdtePoll), a);
    16211589            LogRel(("PCNet#%d: BAD TMD XDA=%#010x\n",
    1622                     PCNETSTATE_2_DEVINS(pData)->iInstance, PHYSADDR(pData, cxda)));
     1590                    PCNET_INST_NR, PHYSADDR(pData, cxda)));
    16231591            return 0;
    16241592        }
     
    16681636
    16691637    /* byte count stored in two's complement 12 bits wide */
    1670     Log(("#%d pcnetCanReceiveNoSync %d bytes\n", PCNETSTATE_2_DEVINS(pData)->iInstance,
     1638    Log(("#%d pcnetCanReceiveNoSync %d bytes\n", PCNET_INST_NR,
    16711639         4096 - CSR_CRBC(pData)));
    16721640    return 4096 - CSR_CRBC(pData);
     
    16861654        return;
    16871655
    1688     Log(("#%d pcnetReceiveNoSync: size=%d\n", PCNETSTATE_2_DEVINS(pData)->iInstance, size));
    1689 
    1690     LOG_PACKET("rraw", buf, size);
     1656    Log(("#%d pcnetReceiveNoSync: size=%d\n", PCNET_INST_NR, size));
    16911657
    16921658    /*
     
    17051671             * we already called pcnetCanReceive(). */
    17061672            LogRel(("PCNet#%d: no buffer: RCVRC=%d\n",
    1707                     PCNETSTATE_2_DEVINS(pData)->iInstance, CSR_RCVRC(pData)));
     1673                    PCNET_INST_NR, CSR_RCVRC(pData)));
    17081674            /* Dump the status of all RX descriptors */
    17091675            const unsigned  cb = 1 << pData->iLog2DescSize;
     
    18031769            {
    18041770                LogRel(("PCNet#%d: Overflow by %ubytes\n",
    1805                          PCNETSTATE_2_DEVINS(pData)->iInstance, size));
     1771                         PCNET_INST_NR, size));
    18061772                rmd.rmd1.oflo = 1;
    18071773                rmd.rmd1.buff = 1;
     
    18141780            pData->aCSR[0] |= 0x0400;
    18151781
    1816             Log(("#%d RCVRC=%d CRDA=%#010x BLKS=%d\n", PCNETSTATE_2_DEVINS(pData)->iInstance,
     1782            Log(("#%d RCVRC=%d CRDA=%#010x BLKS=%d\n", PCNET_INST_NR,
    18171783                 CSR_RCVRC(pData), PHYSADDR(pData, CSR_CRDA(pData)), pktcount));
    18181784#ifdef PCNET_DEBUG_RMD
     
    19521918    STAM_PROFILE_ADV_STOP(&pData->StatTransmitSend, a);
    19531919
    1954     return PDMCritSectEnter(&pData->CritSect, VERR_PERMISSION_DENIED);
     1920    return PDMCritSectEnter(&pData->CritSect, VERR_SEM_BUSY);
    19551921#endif
    19561922}
     
    19681934    pData->Led.Asserted.s.fError = pData->Led.Actual.s.fError = 1;
    19691935    Log(("#%d pcnetTransmit: Signaling send error. swstyle=%#x\n",
    1970          PCNETSTATE_2_DEVINS(pData)->iInstance, pData->aBCR[BCR_SWS]));
     1936         PCNET_INST_NR, pData->aBCR[BCR_SWS]));
    19711937}
    19721938
     
    19811947    pData->Led.Asserted.s.fError = pData->Led.Actual.s.fError = 1;
    19821948    Log(("#%d pcnetTransmit: Signaling send error. swstyle=%#x\n",
    1983          PCNETSTATE_2_DEVINS(pData)->iInstance, pData->aBCR[BCR_SWS]));
     1949         PCNET_INST_NR, pData->aBCR[BCR_SWS]));
    19841950}
    19851951
     
    20812047        STAM_PROFILE_ADV_STOP(&pData->StatTransmitSend, a);
    20822048
    2083         PDMCritSectEnter(&pData->CritSect, VERR_PERMISSION_DENIED);
     2049        PDMCritSectEnter(&pData->CritSect, VERR_SEM_BUSY);
    20842050
    20852051        pData->cbXmitRingBuffer[pData->ulXmitRingBufCons] = 0;
     
    21242090
    21252091#ifdef PCNET_DEBUG_TMD
    2126         Log2(("#%d TMDLOAD %#010x\n", PCNETSTATE_2_DEVINS(pData)->iInstance, PHYSADDR(pData, CSR_CXDA(pData))));
     2092        Log2(("#%d TMDLOAD %#010x\n", PCNET_INST_NR, PHYSADDR(pData, CSR_CXDA(pData))));
    21272093        PRINT_TMD(&tmd);
    21282094#endif
     
    21352101        {
    21362102            const unsigned cb = 4096 - tmd.tmd1.bcnt;
    2137             Log(("#%d pcnetTransmit: stp&enp: cb=%d xmtrc=%#x\n", PCNETSTATE_2_DEVINS(pData)->iInstance, cb, CSR_XMTRC(pData)));
     2103            Log(("#%d pcnetTransmit: stp&enp: cb=%d xmtrc=%#x\n", PCNET_INST_NR, cb, CSR_XMTRC(pData)));
    21382104
    21392105            if (RT_LIKELY(pcnetIsLinkUp(pData) || CSR_LOOP(pData)))
     
    21432109                 * ENP = 1).'' That means that the first buffer might have a
    21442110                 * zero length if it is not the last one in the chain. */
    2145                 if (RT_LIKELY(cb <= 1536))
     2111                if (RT_LIKELY(cb <= MAX_FRAME))
    21462112                {
    21472113                    pcnetXmitRead1st(pData, PHYSADDR(pData, tmd.tmd0.tbadr), cb);
     
    21672133                     * the buffer length of 0 is interpreted as a 4096-byte
    21682134                     * buffer.'' */
    2169                     LogRel(("PCNET: pcnetAsyncTransmit: illegal 4kb frame -> ignoring\n"));
     2135                    LogRel(("PCNet#%d: pcnetAsyncTransmit: illegal 4kb frame -> ignoring\n", PCNET_INST_NR));
    21702136                    pcnetTmdStorePassHost(pData, &tmd, PHYSADDR(pData, CSR_CXDA(pData)));
    21712137                    break;
     
    21752141                    /* Signal error, as this violates the Ethernet specs. */
    21762142                    /** @todo check if the correct error is generated. */
    2177                     LogRel(("PCNET: pcnetAsyncTransmit: illegal 4kb frame -> signalling error\n"));
     2143                    LogRel(("PCNet#%d: pcnetAsyncTransmit: illegal 4kb frame -> signalling error\n", PCNET_INST_NR));
    21782144
    21792145                    pcnetXmitFailTMDGeneric(pData, &tmd);
     
    21972163             * Read TMDs until end-of-packet or tdte poll fails (underflow).
    21982164             */
    2199             const unsigned cbMaxFrame = 1536;
    22002165            bool fDropFrame = false;
    22012166            unsigned cb = 4096 - tmd.tmd1.bcnt;
     
    22412206                pcnetTmdLoad(pData, &tmd, PHYSADDR(pData, CSR_CXDA(pData)), false);
    22422207                cb = 4096 - tmd.tmd1.bcnt;
    2243                 if (    pData->SendFrame.cb + cb < cbMaxFrame
     2208                if (    pData->SendFrame.cb + cb < MAX_FRAME
    22442209                    &&  !fDropFrame)
    22452210                    pcnetXmitReadMore(pData, PHYSADDR(pData, tmd.tmd0.tbadr), cb);
     
    22522217                if (tmd.tmd1.enp)
    22532218                {
    2254                     Log(("#%d pcnetTransmit: stp: cb=%d xmtrc=%#x-%#x\n", PCNETSTATE_2_DEVINS(pData)->iInstance,
     2219                    Log(("#%d pcnetTransmit: stp: cb=%d xmtrc=%#x-%#x\n", PCNET_INST_NR,
    22552220                         pData->SendFrame.cb, iStart, CSR_XMTRC(pData)));
    22562221                    if (pcnetIsLinkUp(pData) && !fDropFrame)
     
    22872252             */
    22882253            /** @todo according to the specs we're supposed to clear the own bit and move on to the next one. */
    2289             Log(("#%d pcnetTransmit: guest is giving us shit!\n", PCNETSTATE_2_DEVINS(pData)->iInstance));
     2254            Log(("#%d pcnetTransmit: guest is giving us shit!\n", PCNET_INST_NR));
    22902255            break;
    22912256        }
     
    23632328         * suspended while waiting for the critical section.
    23642329         */
    2365         rc = PDMCritSectEnter(&pThis->CritSect, VERR_PERMISSION_DENIED);
     2330        rc = PDMCritSectEnter(&pThis->CritSect, VERR_SEM_BUSY);
    23662331        AssertReleaseRCReturn(rc, rc);
    23672332
     
    24212386    if (CSR_STOP(pData) || CSR_SPND(pData))
    24222387        Log2(("#%d pcnetPollTimer time=%#010llx CSR_STOP=%d CSR_SPND=%d\n",
    2423              PCNETSTATE_2_DEVINS(pData)->iInstance, RTTimeMilliTS(), CSR_STOP(pData), CSR_SPND(pData)));
     2388             PCNET_INST_NR, RTTimeMilliTS(), CSR_STOP(pData), CSR_SPND(pData)));
    24242389    else
    24252390        Log2(("#%d pcnetPollTimer time=%#010llx TDMD=%d TXON=%d POLL=%d TDTE=%d TDRA=%#x\n",
    2426              PCNETSTATE_2_DEVINS(pData)->iInstance, RTTimeMilliTS(), CSR_TDMD(pData), CSR_TXON(pData),
     2391             PCNET_INST_NR, RTTimeMilliTS(), CSR_TDMD(pData), CSR_TXON(pData),
    24272392             !CSR_DPOLL(pData), pcnetTdtePoll(pData, &dummy), pData->GCTDRA));
    24282393    Log2(("#%d pcnetPollTimer: CSR_CXDA=%#x CSR_XMTRL=%d CSR_XMTRC=%d\n",
    2429           PCNETSTATE_2_DEVINS(pData)->iInstance, CSR_CXDA(pData), CSR_XMTRL(pData), CSR_XMTRC(pData)));
     2394          PCNET_INST_NR, CSR_CXDA(pData), CSR_XMTRL(pData), CSR_XMTRC(pData)));
    24302395#endif
    24312396#ifdef PCNET_DEBUG_TMD
     
    24342399        TMD tmd;
    24352400        pcnetTmdLoad(pData, &tmd, PHYSADDR(pData, CSR_CXDA(pData)), false);
    2436         Log2(("#%d pcnetPollTimer: TMDLOAD %#010x\n", PCNETSTATE_2_DEVINS(pData)->iInstance, PHYSADDR(pData, CSR_CXDA(pData))));
     2401        Log2(("#%d pcnetPollTimer: TMDLOAD %#010x\n", PCNET_INST_NR, PHYSADDR(pData, CSR_CXDA(pData))));
    24372402        PRINT_TMD(&tmd);
    24382403    }
     
    24762441    int      rc  = VINF_SUCCESS;
    24772442#ifdef PCNET_DEBUG_CSR
    2478     Log(("#%d pcnetCSRWriteU16: rap=%d val=%#06x\n", PCNETSTATE_2_DEVINS(pData)->iInstance, u32RAP, val));
     2443    Log(("#%d pcnetCSRWriteU16: rap=%d val=%#06x\n", PCNET_INST_NR, u32RAP, val));
    24792444#endif
    24802445    switch (u32RAP)
     
    24932458                    val &= ~3;
    24942459
    2495                 Log(("#%d pcnetWriteCSR0: %#06x => %#06x\n", PCNETSTATE_2_DEVINS(pData)->iInstance, pData->aCSR[0], csr0));
     2460                Log(("#%d pcnetWriteCSR0: %#06x => %#06x\n", PCNET_INST_NR, pData->aCSR[0], csr0));
    24962461
    24972462#ifndef IN_RING3
    24982463                if (!(csr0 & 0x0001/*init*/) && (val & 1))
    24992464                {
    2500                     Log(("#%d pcnetCSRWriteU16: pcnetInit requested => HC\n", PCNETSTATE_2_DEVINS(pData)->iInstance));
     2465                    Log(("#%d pcnetCSRWriteU16: pcnetInit requested => HC\n", PCNET_INST_NR));
    25012466                    return VINF_IOM_HC_IOPORT_WRITE;
    25022467                }
    25032468#endif
    2504                 LOG_REGISTER(("PCNet#%d: WRITE CSR%d, %#06x => %#06x (%#06x)\n",
    2505                               PCNETSTATE_2_DEVINS(pData)->iInstance,
    2506                               u32RAP, new_value, csr0, pData->aCSR[0]));
    25072469                pData->aCSR[0] = csr0;
    25082470
     
    25632525            if (CSR_STOP(pData) || CSR_SPND(pData))
    25642526                break;
    2565             LOG_REGISTER(("PCNet#%d: WRITE CSR%d, %#06x\n",
    2566                          PCNETSTATE_2_DEVINS(pData)->iInstance, u32RAP, val));
    2567             return rc;
    25682527        case 3: /* Interrupt Mask and Deferral Control */
    2569             LOG_REGISTER(("PCNet#%d: WRITE CSR%d, %#06x\n",
    2570                          PCNETSTATE_2_DEVINS(pData)->iInstance, u32RAP, val));
    25712528            break;
    25722529        case 4: /* Test and Features Control */
    2573             LOG_REGISTER(("PCNet#%d: WRITE CSR%d, %#06x\n",
    2574                          PCNETSTATE_2_DEVINS(pData)->iInstance, u32RAP, val));
    25752530            pData->aCSR[4] &= ~(val & 0x026a);
    25762531            val &= ~0x026a;
     
    25782533            break;
    25792534        case 5: /* Extended Control and Interrupt 1 */
    2580             LOG_REGISTER(("PCNet#%d: WRITE CSR%d, %#06x\n",
    2581                         PCNETSTATE_2_DEVINS(pData)->iInstance, u32RAP, val));
    25822535            pData->aCSR[5] &= ~(val & 0x0a90);
    25832536            val &= ~0x0a90;
     
    25962549            if ((pData->aCSR[15] & 0x8000) != (val & 0x8000) && pData->pDrv)
    25972550            {
    2598                 Log(("PCNet#%d: promiscuous mode changed to %d\n",
    2599                      PCNETSTATE_2_DEVINS(pData)->iInstance, !!(val & 0x8000)));
     2551                Log(("#%d: promiscuous mode changed to %d\n", PCNET_INST_NR, !!(val & 0x8000)));
    26002552#ifndef IN_RING3
    26012553                return VINF_IOM_HC_IOPORT_WRITE;
     
    26202572            if (!CSR_STOP(pData) && !CSR_SPND(pData))
    26212573            {
    2622                 Log(("PCNet#%d: WRITE CSR%d, %#06x !!\n", PCNETSTATE_2_DEVINS(pData)->iInstance, u32RAP, val));
     2574                Log(("#%d: WRITE CSR%d, %#06x !!\n", PCNET_INST_NR, u32RAP, val));
    26232575                return rc;
    26242576            }
     
    26272579            else
    26282580                pData->GCRDRA = (pData->GCRDRA & 0x0000ffff) | ((val & 0x0000ffff) << 16);
    2629             Log(("PCNet#%d: WRITE CSR%d, %#06x => GCRDRA=%08x (alt init)\n", PCNETSTATE_2_DEVINS(pData)->iInstance,
     2581            Log(("#%d: WRITE CSR%d, %#06x => GCRDRA=%08x (alt init)\n", PCNET_INST_NR,
    26302582                 u32RAP, val, pData->GCRDRA));
    26312583            break;
     
    26392591            if (!CSR_STOP(pData) && !CSR_SPND(pData))
    26402592            {
    2641                 Log(("PCNet#%d: WRITE CSR%d, %#06x !!\n", PCNETSTATE_2_DEVINS(pData)->iInstance, u32RAP, val));
     2593                Log(("#%d: WRITE CSR%d, %#06x !!\n", PCNET_INST_NR, u32RAP, val));
    26422594                return rc;
    26432595            }
     
    26462598            else
    26472599                pData->GCTDRA = (pData->GCTDRA & 0x0000ffff) | ((val & 0x0000ffff) << 16);
    2648             Log(("PCNet#%d: WRITE CSR%d, %#06x => GCTDRA=%08x (alt init)\n", PCNETSTATE_2_DEVINS(pData)->iInstance,
     2600            Log(("#%d: WRITE CSR%d, %#06x => GCTDRA=%08x (alt init)\n", PCNET_INST_NR,
    26492601                 u32RAP, val, pData->GCTDRA));
    26502602            break;
    26512603
    26522604        case 58: /* Software Style */
    2653             LOG_REGISTER(("PCNet#%d: WRITE SW_STYLE, %#06x\n",
    2654                          PCNETSTATE_2_DEVINS(pData)->iInstance, val));
    26552605            rc = pcnetBCRWriteU16(pData, BCR_SWS, val);
    26562606            break;
     
    26662616            if (!CSR_STOP(pData) && !CSR_SPND(pData))
    26672617            {
    2668                 Log(("PCNet#%d: WRITE CSR%d, %#06x !!\n", PCNETSTATE_2_DEVINS(pData)->iInstance, u32RAP, val));
     2618                Log(("#%d: WRITE CSR%d, %#06x !!\n", PCNET_INST_NR, u32RAP, val));
    26692619                return rc;
    26702620            }
    2671             Log(("PCNet#%d: WRITE CSR%d, %#06x (hacked %#06x) (alt init)\n", PCNETSTATE_2_DEVINS(pData)->iInstance,
     2621            Log(("#%d: WRITE CSR%d, %#06x (hacked %#06x) (alt init)\n", PCNET_INST_NR,
    26722622                 u32RAP, val, 1 + ~(uint16_t)val));
    26732623            val = 1 + ~(uint16_t)val;
     
    27272677        default:
    27282678            val = pData->aCSR[u32RAP];
    2729             LOG_REGISTER(("PCNet#%d: read  CSR%d => %#06x\n",
    2730                     PCNETSTATE_2_DEVINS(pData)->iInstance, u32RAP, val));
    27312679    }
    27322680#ifdef PCNET_DEBUG_CSR
    2733     Log(("#%d pcnetCSRReadU16: rap=%d val=%#06x\n", PCNETSTATE_2_DEVINS(pData)->iInstance,
     2681    Log(("#%d pcnetCSRReadU16: rap=%d val=%#06x\n", PCNET_INST_NR,
    27342682         u32RAP, val));
    27352683#endif
     
    27422690    u32RAP &= 0x7f;
    27432691#ifdef PCNET_DEBUG_BCR
    2744     Log2(("#%d pcnetBCRWriteU16: rap=%d val=%#06x\n", PCNETSTATE_2_DEVINS(pData)->iInstance,
     2692    Log2(("#%d pcnetBCRWriteU16: rap=%d val=%#06x\n", PCNET_INST_NR,
    27452693         u32RAP, val));
    27462694#endif
     
    27542702            {
    27552703                default:
    2756                     Log(("Bad SWSTYLE=%#04x\n", val & 0xff));
     2704                    Log(("#%d Bad SWSTYLE=%#04x\n", PCNET_INST_NR, val & 0xff));
    27572705                    // fall through
    27582706                case 0:
     
    27732721                    break;
    27742722            }
    2775             LOG_REGISTER(("PCNet#%d: WRITE SW_STYLE, %#06x\n",
    2776                          PCNETSTATE_2_DEVINS(pData)->iInstance, val));
    2777             Log(("BCR_SWS=%#06x\n", val));
     2723            Log(("#%d BCR_SWS=%#06x\n", PCNET_INST_NR, val));
    27782724            pData->aCSR[58] = val;
    27792725            /* fall through */
     
    27892735        case BCR_MIICAS:
    27902736        case BCR_MIIADDR:
    2791             LOG_REGISTER(("PCNet#%d: WRITE BCR%d, %#06x\n",
    2792                          PCNETSTATE_2_DEVINS(pData)->iInstance, u32RAP, val));
    27932737            pData->aBCR[u32RAP] = val;
    27942738            break;
     
    28022746
    28032747        case BCR_MIIMDR:
    2804             LOG_REGISTER(("PCNet#%d: WRITE MII%d, %#06x\n",
    2805                          PCNETSTATE_2_DEVINS(pData)->iInstance, u32RAP, val));
    28062748            pData->aMII[pData->aBCR[BCR_MIIADDR] & 0x1f] = val;
    28072749#ifdef PCNET_DEBUG_MII
    2808             Log(("#%d pcnet: mii write %d <- %#x\n", PCNETSTATE_2_DEVINS(pData)->iInstance,
     2750            Log(("#%d pcnet: mii write %d <- %#x\n", PCNET_INST_NR,
    28092751                   pData->aBCR[BCR_MIIADDR] & 0x1f, val));
    28102752#endif
     
    29262868
    29272869#ifdef PCNET_DEBUG_MII
    2928     Log(("#%d pcnet: mii read %d -> %#x\n", PCNETSTATE_2_DEVINS(pData)->iInstance,
     2870    Log(("#%d pcnet: mii read %d -> %#x\n", PCNET_INST_NR,
    29292871         miiaddr, val));
    29302872#endif
     
    29682910    }
    29692911#ifdef PCNET_DEBUG_BCR
    2970     Log2(("#%d pcnetBCRReadU16: rap=%d val=%#06x\n", PCNETSTATE_2_DEVINS(pData)->iInstance,
     2912    Log2(("#%d pcnetBCRReadU16: rap=%d val=%#06x\n", PCNET_INST_NR,
    29712913         u32RAP, val));
    29722914#endif
     
    30202962    addr &= 0x0f;
    30212963    val  &= 0xff;
    3022     Log(("#%d pcnetAPROMWriteU8: addr=%#010x val=%#04x\n", PCNETSTATE_2_DEVINS(pData)->iInstance,
     2964    Log(("#%d pcnetAPROMWriteU8: addr=%#010x val=%#04x\n", PCNET_INST_NR,
    30232965         addr, val));
    30242966    /* Check APROMWE bit to enable write access */
     
    30302972{
    30312973    uint32_t val = pData->aPROM[addr &= 0x0f];
    3032     Log(("#%d pcnetAPROMReadU8: addr=%#010x val=%#04x\n", PCNETSTATE_2_DEVINS(pData)->iInstance,
     2974    Log(("#%d pcnetAPROMReadU8: addr=%#010x val=%#04x\n", PCNET_INST_NR,
    30332975         addr, val));
    30342976    return val;
     
    30402982
    30412983#ifdef PCNET_DEBUG_IO
    3042     Log2(("#%d pcnetIoportWriteU16: addr=%#010x val=%#06x\n", PCNETSTATE_2_DEVINS(pData)->iInstance,
     2984    Log2(("#%d pcnetIoportWriteU16: addr=%#010x val=%#06x\n", PCNET_INST_NR,
    30432985         addr, val));
    30442986#endif
     
    30613003    }
    30623004    else
    3063         Log(("#%d pcnetIoportWriteU16: addr=%#010x val=%#06x BCR_DWIO !!\n", PCNETSTATE_2_DEVINS(pData)->iInstance, addr, val));
     3005        Log(("#%d pcnetIoportWriteU16: addr=%#010x val=%#06x BCR_DWIO !!\n", PCNET_INST_NR, addr, val));
    30643006
    30653007    return rc;
     
    30993041    }
    31003042    else
    3101         Log(("#%d pcnetIoportReadU16: addr=%#010x val=%#06x BCR_DWIO !!\n", PCNETSTATE_2_DEVINS(pData)->iInstance, addr, val & 0xffff));
     3043        Log(("#%d pcnetIoportReadU16: addr=%#010x val=%#06x BCR_DWIO !!\n", PCNET_INST_NR, addr, val & 0xffff));
    31023044
    31033045    pcnetUpdateIrq(pData);
     
    31053047skip_update_irq:
    31063048#ifdef PCNET_DEBUG_IO
    3107     Log2(("#%d pcnetIoportReadU16: addr=%#010x val=%#06x\n", PCNETSTATE_2_DEVINS(pData)->iInstance,
    3108          addr, val & 0xffff));
     3049    Log2(("#%d pcnetIoportReadU16: addr=%#010x val=%#06x\n", PCNET_INST_NR, addr, val & 0xffff));
    31093050#endif
    31103051    return val;
     
    31163057
    31173058#ifdef PCNET_DEBUG_IO
    3118     Log2(("#%d pcnetIoportWriteU32: addr=%#010x val=%#010x\n", PCNETSTATE_2_DEVINS(pData)->iInstance,
     3059    Log2(("#%d pcnetIoportWriteU32: addr=%#010x val=%#010x\n", PCNET_INST_NR,
    31193060         addr, val));
    31203061#endif
     
    31453086    }
    31463087    else
    3147         Log(("#%d pcnetIoportWriteU32: addr=%#010x val=%#010x !BCR_DWIO !!\n", PCNETSTATE_2_DEVINS(pData)->iInstance, addr, val));
     3088        Log(("#%d pcnetIoportWriteU32: addr=%#010x val=%#010x !BCR_DWIO !!\n", PCNET_INST_NR, addr, val));
    31483089
    31493090    return rc;
     
    31833124    }
    31843125    else
    3185         Log(("#%d pcnetIoportReadU32: addr=%#010x val=%#010x !BCR_DWIO !!\n", PCNETSTATE_2_DEVINS(pData)->iInstance, addr, val));
     3126        Log(("#%d pcnetIoportReadU32: addr=%#010x val=%#010x !BCR_DWIO !!\n", PCNET_INST_NR, addr, val));
    31863127    pcnetUpdateIrq(pData);
    31873128
    31883129skip_update_irq:
    31893130#ifdef PCNET_DEBUG_IO
    3190     Log2(("#%d pcnetIoportReadU32: addr=%#010x val=%#010x\n", PCNETSTATE_2_DEVINS(pData)->iInstance,
     3131    Log2(("#%d pcnetIoportReadU32: addr=%#010x val=%#010x\n", PCNET_INST_NR,
    31913132         addr, val));
    31923133#endif
     
    31973138{
    31983139#ifdef PCNET_DEBUG_IO
    3199     Log2(("#%d pcnetMMIOWriteU8: addr=%#010x val=%#04x\n", PCNETSTATE_2_DEVINS(pData)->iInstance,
     3140    Log2(("#%d pcnetMMIOWriteU8: addr=%#010x val=%#04x\n", PCNET_INST_NR,
    32003141         addr, val));
    32013142#endif
     
    32103151        val = pcnetAPROMReadU8(pData, addr);
    32113152#ifdef PCNET_DEBUG_IO
    3212     Log2(("#%d pcnetMMIOReadU8: addr=%#010x val=%#04x\n", PCNETSTATE_2_DEVINS(pData)->iInstance,
     3153    Log2(("#%d pcnetMMIOReadU8: addr=%#010x val=%#04x\n", PCNET_INST_NR,
    32133154         addr, val & 0xff));
    32143155#endif
     
    32193160{
    32203161#ifdef PCNET_DEBUG_IO
    3221     Log2(("#%d pcnetMMIOWriteU16: addr=%#010x val=%#06x\n", PCNETSTATE_2_DEVINS(pData)->iInstance,
     3162    Log2(("#%d pcnetMMIOWriteU16: addr=%#010x val=%#06x\n", PCNET_INST_NR,
    32223163         addr, val));
    32233164#endif
     
    32453186    }
    32463187#ifdef PCNET_DEBUG_IO
    3247     Log2(("#%d pcnetMMIOReadU16: addr=%#010x val = %#06x\n", PCNETSTATE_2_DEVINS(pData)->iInstance,
     3188    Log2(("#%d pcnetMMIOReadU16: addr=%#010x val = %#06x\n", PCNET_INST_NR,
    32483189         addr, val & 0xffff));
    32493190#endif
     
    32543195{
    32553196#ifdef PCNET_DEBUG_IO
    3256     Log2(("#%d pcnetMMIOWriteU32: addr=%#010x val=%#010x\n", PCNETSTATE_2_DEVINS(pData)->iInstance,
     3197    Log2(("#%d pcnetMMIOWriteU32: addr=%#010x val=%#010x\n", PCNET_INST_NR,
    32573198         addr, val));
    32583199#endif
     
    32863227    }
    32873228#ifdef PCNET_DEBUG_IO
    3288     Log2(("#%d pcnetMMIOReadU32: addr=%#010x val=%#010x\n", PCNETSTATE_2_DEVINS(pData)->iInstance,
     3229    Log2(("#%d pcnetMMIOReadU32: addr=%#010x val=%#010x\n", PCNET_INST_NR,
    32893230         addr, val));
    32903231#endif
     
    33283269        else
    33293270        {
    3330             Log(("#%d pcnetIOPortAPromRead: Port=%RTiop cb=%d BCR_DWIO !!\n", PCNETSTATE_2_DEVINS(pData)->iInstance, Port, cb));
     3271            Log(("#%d pcnetIOPortAPromRead: Port=%RTiop cb=%d BCR_DWIO !!\n", PCNET_INST_NR, Port, cb));
    33313272            rc = VERR_IOM_IOPORT_UNUSED;
    33323273        }
     
    33353276    STAM_PROFILE_ADV_STOP(&pData->StatAPROMRead, a);
    33363277    LogFlow(("#%d pcnetIOPortAPromRead: Port=%RTiop *pu32=%#RX32 cb=%d rc=%Vrc\n",
    3337              PCNETSTATE_2_DEVINS(pData)->iInstance, Port, *pu32, cb, rc));
     3278             PCNET_INST_NR, Port, *pu32, cb, rc));
    33383279    return rc;
    33393280}
     
    33613302        STAM_PROFILE_ADV_START(&pData->StatAPROMWrite, a);
    33623303        rc = PDMCritSectEnter(&pData->CritSect, VINF_IOM_HC_IOPORT_WRITE);
    3363         if (rc == VINF_SUCCESS)
     3304        if (RT_LIKELY(rc == VINF_SUCCESS))
    33643305        {
    33653306            pcnetAPROMWriteU8(pData, Port, u32);
     
    33743315    }
    33753316    LogFlow(("#%d pcnetIOPortAPromWrite: Port=%RTiop u32=%#RX32 cb=%d rc=%Vrc\n",
    3376              PCNETSTATE_2_DEVINS(pData)->iInstance, Port, u32, cb, rc));
     3317             PCNET_INST_NR, Port, u32, cb, rc));
     3318#ifdef LOG_ENABLED
     3319    if (rc == VINF_IOM_HC_IOPORT_WRITE)
     3320        LogFlow(("#%d => HC\n", PCNET_INST_NR));
     3321#endif
    33773322    return rc;
    33783323}
     
    33983343    STAM_PROFILE_ADV_START(&pData->CTXSUFF(StatIORead), a);
    33993344    rc = PDMCritSectEnter(&pData->CritSect, VINF_IOM_HC_IOPORT_READ);
    3400     if (rc == VINF_SUCCESS)
     3345    if (RT_LIKELY(rc == VINF_SUCCESS))
    34013346    {
    34023347        switch (cb)
     
    34123357    STAM_PROFILE_ADV_STOP(&pData->CTXSUFF(StatIORead), a);
    34133358    LogFlow(("#%d pcnetIOPortRead: Port=%RTiop *pu32=%#RX32 cb=%d rc=%Vrc\n",
    3414              PCNETSTATE_2_DEVINS(pData)->iInstance, Port, *pu32, cb, rc));
     3359             PCNET_INST_NR, Port, *pu32, cb, rc));
     3360#ifdef LOG_ENABLED
     3361    if (rc == VINF_IOM_HC_IOPORT_READ)
     3362        LogFlow(("#%d => HC\n", PCNET_INST_NR));
     3363#endif
    34153364    return rc;
    34163365}
     
    34363385    STAM_PROFILE_ADV_START(&pData->CTXSUFF(StatIOWrite), a);
    34373386    rc = PDMCritSectEnter(&pData->CritSect, VINF_IOM_HC_IOPORT_WRITE);
    3438     if (rc == VINF_SUCCESS)
     3387    if (RT_LIKELY(rc == VINF_SUCCESS))
    34393388    {
    34403389        switch (cb)
     
    34513400    STAM_PROFILE_ADV_STOP(&pData->CTXSUFF(StatIOWrite), a);
    34523401    LogFlow(("#%d pcnetIOPortWrite: Port=%RTiop u32=%#RX32 cb=%d rc=%Vrc\n",
    3453              PCNETSTATE_2_DEVINS(pData)->iInstance, Port, u32, cb, rc));
     3402             PCNET_INST_NR, Port, u32, cb, rc));
     3403#ifdef LOG_ENABLED
     3404    if (rc == VINF_IOM_HC_IOPORT_WRITE)
     3405        LogFlow(("#%d => HC\n", PCNET_INST_NR));
     3406#endif
    34543407    return rc;
    34553408}
     
    34803433        STAM_PROFILE_ADV_START(&pData->CTXSUFF(StatMMIORead), a);
    34813434        rc = PDMCritSectEnter(&pData->CritSect, VINF_IOM_HC_MMIO_READ);
    3482         if (rc == VINF_SUCCESS)
     3435        if (RT_LIKELY(rc == VINF_SUCCESS))
    34833436        {
    34843437            switch (cb)
     
    35003453
    35013454    LogFlow(("#%d pcnetMMIORead: pvUser=%p:{%.*Rhxs} cb=%d GCPhysAddr=%RGp rc=%Vrc\n",
    3502              PCNETSTATE_2_DEVINS(pData)->iInstance, pv, cb, pv, cb, GCPhysAddr, rc));
     3455             PCNET_INST_NR, pv, cb, pv, cb, GCPhysAddr, rc));
     3456#ifdef LOG_ENABLED
     3457    if (rc == VINF_IOM_HC_MMIO_READ)
     3458        LogFlow(("#%d => HC\n", PCNET_INST_NR));
     3459#endif
    35033460    return rc;
    35043461}
     
    35293486        STAM_PROFILE_ADV_START(&pData->CTXSUFF(StatMMIOWrite), a);
    35303487        rc = PDMCritSectEnter(&pData->CritSect, VINF_IOM_HC_MMIO_WRITE);
    3531         if (rc == VINF_SUCCESS)
     3488        if (RT_LIKELY(rc == VINF_SUCCESS))
    35323489        {
    35333490            switch (cb)
     
    35483505    }
    35493506    LogFlow(("#%d pcnetMMIOWrite: pvUser=%p:{%.*Rhxs} cb=%d GCPhysAddr=%RGp rc=%Vrc\n",
    3550              PCNETSTATE_2_DEVINS(pData)->iInstance, pv, cb, pv, cb, GCPhysAddr, rc));
     3507             PCNET_INST_NR, pv, cb, pv, cb, GCPhysAddr, rc));
     3508#ifdef LOG_ENABLED
     3509    if (rc == VINF_IOM_HC_MMIO_WRITE)
     3510        LogFlow(("#%d => HC\n", PCNET_INST_NR));
     3511#endif
    35513512    return rc;
    35523513}
     
    44244385    rc = CFGMR3QueryU32(pCfgHandle, "LineSpeed", &pData->u32LinkSpeed);
    44254386    if (rc == VERR_CFGM_VALUE_NOT_FOUND)
    4426         pData->u32LinkSpeed = 100000;    /* 100 Mbps (in kbps units)*/
     4387        pData->u32LinkSpeed = 1000000;    /* 1GBit/s (in kbps units)*/
    44274388    else if (VBOX_FAILURE(rc))
    44284389        return PDMDEV_SET_ERROR(pDevIns, rc,
     
    46594620    pData->ulXmitRingBufProd   = 0;
    46604621    pData->ulXmitRingBufCons   = 0;
    4661     pData->pXmitRingBuffer[0]  = (char *)RTMemAlloc(PCNET_MAX_XMIT_SLOTS * 1536);
     4622    pData->pXmitRingBuffer[0]  = (char *)RTMemAlloc(PCNET_MAX_XMIT_SLOTS * MAX_FRAME);
    46624623    pData->cbXmitRingBuffer[0] = 0;
    46634624    for (i = 1; i < PCNET_MAX_XMIT_SLOTS; i++)
    46644625    {
    4665         pData->pXmitRingBuffer[i]  = pData->pXmitRingBuffer[i-1] + 1536;
     4626        pData->pXmitRingBuffer[i]  = pData->pXmitRingBuffer[i-1] + MAX_FRAME;
    46664627        pData->cbXmitRingBuffer[i] = 0;
    46674628    }
     
    46984659
    46994660    for (i = 0; i < ELEMENTS(pData->aStatXmitFlush) - 1; i++)
    4700         PDMDevHlpSTAMRegisterF(pDevIns, &pData->aStatXmitFlush[i],  STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "",                                       "/Devices/PCNet%d/XmitFlushIrq/%d", iInstance, i + 1);
    4701     PDMDevHlpSTAMRegisterF(pDevIns, &pData->aStatXmitFlush[i],      STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES,    "",                                    "/Devices/PCNet%d/XmitFlushIrq/%d+", iInstance, i + 1);
     4661        PDMDevHlpSTAMRegisterF(pDevIns, &pData->aStatXmitFlush[i],  STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES,       "",                                   "/Devices/PCNet%d/XmitFlushIrq/%d", iInstance, i + 1);
     4662    PDMDevHlpSTAMRegisterF(pDevIns, &pData->aStatXmitFlush[i],      STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES,       "",                                   "/Devices/PCNet%d/XmitFlushIrq/%d+", iInstance, i + 1);
    47024663
    47034664    for (i = 0; i < ELEMENTS(pData->aStatXmitChainCounts) - 1; i++)
    4704         PDMDevHlpSTAMRegisterF(pDevIns, &pData->aStatXmitChainCounts[i], STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "",                                  "/Devices/PCNet%d/XmitChainCounts/%d", iInstance, i + 1);
    4705     PDMDevHlpSTAMRegisterF(pDevIns, &pData->aStatXmitChainCounts[i], STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES,    "",                                   "/Devices/PCNet%d/XmitChainCounts/%d+", iInstance, i + 1);
    4706 
    4707     PDMDevHlpSTAMRegisterF(pDevIns, &pData->StatXmitSkipCurrent,    STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES,    "",                                    "/Devices/PCNet%d/Xmit/Skipped", iInstance, i + 1);
     4665        PDMDevHlpSTAMRegisterF(pDevIns, &pData->aStatXmitChainCounts[i], STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES,  "",                                   "/Devices/PCNet%d/XmitChainCounts/%d", iInstance, i + 1);
     4666    PDMDevHlpSTAMRegisterF(pDevIns, &pData->aStatXmitChainCounts[i], STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES,      "",                                   "/Devices/PCNet%d/XmitChainCounts/%d+", iInstance, i + 1);
     4667
     4668    PDMDevHlpSTAMRegisterF(pDevIns, &pData->StatXmitSkipCurrent,    STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES,     "",                                   "/Devices/PCNet%d/Xmit/Skipped", iInstance, i + 1);
    47084669
    47094670    PDMDevHlpSTAMRegisterF(pDevIns, &pData->StatInterrupt,          STAMTYPE_PROFILE, STAMVISIBILITY_ALWAYS, STAMUNIT_TICKS_PER_CALL, "Profiling PCNet interrupt checks",   "/Devices/PCNet%d/UpdateIRQ", iInstance);
     
    47164677    PDMDevHlpSTAMRegisterF(pDevIns, &pData->StatRingWriteR0,        STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES,     "Nr of monitored ring page writes",   "/Devices/PCNet%d/Ring/R0/Writes", iInstance);
    47174678    PDMDevHlpSTAMRegisterF(pDevIns, &pData->StatRingWriteGC,        STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES,     "Nr of monitored ring page writes",   "/Devices/PCNet%d/Ring/GC/Writes", iInstance);
    4718     PDMDevHlpSTAMRegisterF(pDevIns, &pData->StatRingWriteFailedHC,  STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES,     "Nr of failed ring page writes",   "/Devices/PCNet%d/Ring/HC/Failed", iInstance);
    4719     PDMDevHlpSTAMRegisterF(pDevIns, &pData->StatRingWriteFailedR0,  STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES,     "Nr of failed ring page writes",   "/Devices/PCNet%d/Ring/R0/Failed", iInstance);
    4720     PDMDevHlpSTAMRegisterF(pDevIns, &pData->StatRingWriteFailedGC,  STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES,     "Nr of failed ring page writes",   "/Devices/PCNet%d/Ring/GC/Failed", iInstance);
    4721     PDMDevHlpSTAMRegisterF(pDevIns, &pData->StatRingWriteOutsideRangeHC,  STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES,     "Nr of monitored writes outside ring range",  "/Devices/PCNet%d/Ring/HC/Outside", iInstance);
    4722     PDMDevHlpSTAMRegisterF(pDevIns, &pData->StatRingWriteOutsideRangeR0,  STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES,     "Nr of monitored writes outside ring range",  "/Devices/PCNet%d/Ring/R0/Outside", iInstance);
    4723     PDMDevHlpSTAMRegisterF(pDevIns, &pData->StatRingWriteOutsideRangeGC,  STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES,     "Nr of monitored writes outside ring range",  "/Devices/PCNet%d/Ring/GC/Outside", iInstance);
     4679    PDMDevHlpSTAMRegisterF(pDevIns, &pData->StatRingWriteFailedHC,  STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES,     "Nr of failed ring page writes",      "/Devices/PCNet%d/Ring/HC/Failed", iInstance);
     4680    PDMDevHlpSTAMRegisterF(pDevIns, &pData->StatRingWriteFailedR0,  STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES,     "Nr of failed ring page writes",      "/Devices/PCNet%d/Ring/R0/Failed", iInstance);
     4681    PDMDevHlpSTAMRegisterF(pDevIns, &pData->StatRingWriteFailedGC,  STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES,     "Nr of failed ring page writes",      "/Devices/PCNet%d/Ring/GC/Failed", iInstance);
     4682    PDMDevHlpSTAMRegisterF(pDevIns, &pData->StatRingWriteOutsideRangeHC,  STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Nr of monitored writes outside ring range", "/Devices/PCNet%d/Ring/HC/Outside", iInstance);
     4683    PDMDevHlpSTAMRegisterF(pDevIns, &pData->StatRingWriteOutsideRangeR0,  STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Nr of monitored writes outside ring range", "/Devices/PCNet%d/Ring/R0/Outside", iInstance);
     4684    PDMDevHlpSTAMRegisterF(pDevIns, &pData->StatRingWriteOutsideRangeGC,  STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Nr of monitored writes outside ring range", "/Devices/PCNet%d/Ring/GC/Outside", iInstance);
    47244685# endif /* PCNET_NO_POLLING */
    47254686#endif
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