Changeset 74022 in vbox for trunk/include
- Timestamp:
- Sep 2, 2018 6:52:19 AM (7 years ago)
- svn:sync-xref-src-repo-rev:
- 124769
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/include/VBox/vmm/hm_vmx.h
r74017 r74022 2320 2320 * @{ */ 2321 2321 typedef uint8_t VMXINSTRID; 2322 #define VMX_INSTR_ID_VALID RT_BIT(7) 2323 #define VMX_INSTR_ID_IS_VALID(a) (((a) >> 7) & 1) 2324 #define VMX_INSTR_ID_GET_ID(a) ((a) & ~VMX_INSTR_ID_VALID) 2322 #define VMXINSTRID_VALID RT_BIT(7) 2323 #define VMXINSTRID_IS_VALID(a) (((a) >> 7) & 1) 2324 #define VMXINSTRID_GET_ID(a) ((a) & ~VMXINSTRID_VALID) 2325 #define VMXINSTRID_NONE 0 2325 2326 /** The OR'd rvalues are from the VT-x spec (valid bit is VBox specific): */ 2326 #define VMX_INSTR_ID_SGDT ((VMX_INSTR_ID_VALID) | 0) 2327 #define VMX_INSTR_ID_SIDT ((VMX_INSTR_ID_VALID) | 1) 2328 #define VMX_INSTR_ID_LGDT ((VMX_INSTR_ID_VALID) | 2) 2329 #define VMX_INSTR_ID_LIDT ((VMX_INSTR_ID_VALID) | 3) 2330 2331 #define VMX_INSTR_ID_SLDT ((VMX_INSTR_ID_VALID) | 0) 2332 #define VMX_INSTR_ID_STR ((VMX_INSTR_ID_VALID) | 1) 2333 #define VMX_INSTR_ID_LLDT ((VMX_INSTR_ID_VALID) | 2) 2334 #define VMX_INSTR_ID_LTR ((VMX_INSTR_ID_VALID) | 3) 2327 #define VMXINSTRID_SGDT ((VMXINSTRID_VALID) | 0) 2328 #define VMXINSTRID_SIDT ((VMXINSTRID_VALID) | 1) 2329 #define VMXINSTRID_LGDT ((VMXINSTRID_VALID) | 2) 2330 #define VMXINSTRID_LIDT ((VMXINSTRID_VALID) | 3) 2331 2332 #define VMXINSTRID_SLDT ((VMXINSTRID_VALID) | 0) 2333 #define VMXINSTRID_STR ((VMXINSTRID_VALID) | 1) 2334 #define VMXINSTRID_LLDT ((VMXINSTRID_VALID) | 2) 2335 #define VMXINSTRID_LTR ((VMXINSTRID_VALID) | 3) 2336 2337 /** The following are used internally and are not based on the VT-x spec: */ 2338 #define VMXINSTRID_VMLAUNCH ((VMXINSTRID_VALID) | 50) 2339 #define VMXINSTRID_VMRESUME ((VMXINSTRID_VALID) | 51) 2335 2340 /** @} */ 2336 2341 … … 2803 2808 /** SMM MSEG revision ID. */ 2804 2809 #define VMX_V_MSEG_REV_ID 0 2810 /** @} */ 2811 2812 /** @name VMX_V_VMCS_STATE_XXX - Virtual VMCS state. 2813 * @{ */ 2814 /** VMCS state clear. */ 2815 #define VMX_V_VMCS_STATE_CLEAR RT_BIT(1) 2816 /** VMCS state launched. */ 2817 #define VMX_V_VMCS_STATE_LAUNCHED RT_BIT(2) 2818 /** @} */ 2819 2820 /** 2821 * Virtual VM-Exit information. 2822 * 2823 * This is a convenience structure that bundles some VM-exit information related 2824 * fields together. 2825 */ 2826 typedef struct 2827 { 2828 /** The VM-exit reason. */ 2829 uint32_t uReason; 2830 /** The VM-exit instruction length. */ 2831 uint32_t cbInstr; 2832 /** The VM-exit instruction information. */ 2833 VMXEXITINSTRINFO InstrInfo; 2834 /** Padding. */ 2835 uint32_t u32Padding0; 2836 2837 /** The VM-exit qualification field. */ 2838 uint64_t u64Qual; 2839 /** The guest-linear address field. */ 2840 uint64_t u64GuestLinearAddr; 2841 /** The effective guest-linear address if @a InstrInfo indicates a memory-based 2842 * instruction VM-exit. */ 2843 RTGCPTR GCPtrEffAddr; 2844 2845 /** The VM-exit instruction ID. */ 2846 VMXINSTRID uInstrId; 2847 } VMXVEXITINFO; 2848 /** Pointer to the VMXVEXITINFO struct. */ 2849 typedef VMXVEXITINFO *PVMXVEXITINFO; 2850 /** Pointer to a const VMXVEXITINFO struct. */ 2851 typedef const VMXVEXITINFO *PCVMXVEXITINFO; 2852 2853 /** 2854 * Virtual VMCS. 2855 * This is our custom format and merged into the actual VMCS (/shadow) when we 2856 * execute nested-guest code using hardware-assisted VMX. 2857 * 2858 * The first 8 bytes are as per Intel spec. 24.2 "Format of the VMCS Region". 2859 * 2860 * The offset and size of the VMCS state field (fVmcsState) is also fixed (not by 2861 * Intel but for our own requirements) as we use it to offset into guest memory. 2862 * 2863 * We always treat natural-width fields as 64-bit in our implementation since 2864 * it's easier, allows for teleporation in the future and does not affect guest 2865 * software. 2866 * 2867 * Although the guest is supposed to access the VMCS only through the execution of 2868 * VMX instructions (VMREAD, VMWRITE etc.), since the VMCS may reside in guest 2869 * memory (e.g, active but not current VMCS), for saved-states compatibility, and 2870 * for teleportation (when implemented) any newly added fields should be added to 2871 * the appropriate reserved sections or at the end of the structure. 2872 */ 2873 #pragma pack(1) 2874 typedef struct 2875 { 2876 /** 0x0 - VMX VMCS revision identifier. */ 2877 VMXVMCSREVID u32VmcsRevId; 2878 /** 0x4 - VMX-abort indicator. */ 2879 uint32_t u32VmxAbortId; 2880 /** 0x8 - VMCS state, see VMX_V_VMCS_STATE_XXX. */ 2881 uint8_t fVmcsState; 2882 /** 0x9 - Reserved for future. */ 2883 uint8_t au8Padding0[3]; 2884 /** 0xc - Reserved for future. */ 2885 uint32_t au32Reserved0[7]; 2886 2887 /** @name 16-bit control fields. 2888 * @{ */ 2889 /** 0x28 - Virtual processor ID. */ 2890 uint16_t u16Vpid; 2891 /** 0x2a - Posted interrupt notify vector. */ 2892 uint16_t u16PostIntNotifyVector; 2893 /** 0x2c - EPTP index. */ 2894 uint16_t u16EptpIndex; 2895 /** 0x2e - Reserved for future. */ 2896 uint16_t au16Reserved0[8]; 2897 /** @} */ 2898 2899 /** @name 16-bit Guest-state fields. 2900 * @{ */ 2901 /** 0x3e - Guest ES selector. */ 2902 RTSEL GuestEs; 2903 /** 0x40 - Guest ES selector. */ 2904 RTSEL GuestCs; 2905 /** 0x42 - Guest ES selector. */ 2906 RTSEL GuestSs; 2907 /** 0x44 - Guest ES selector. */ 2908 RTSEL GuestDs; 2909 /** 0x46 - Guest ES selector. */ 2910 RTSEL GuestFs; 2911 /** 0x48 - Guest ES selector. */ 2912 RTSEL GuestGs; 2913 /** 0x4a - Guest LDTR selector. */ 2914 RTSEL GuestLdtr; 2915 /** 0x4c - Guest TR selector. */ 2916 RTSEL GuestTr; 2917 /** 0x4e - Guest interrupt status (virtual-interrupt delivery). */ 2918 uint16_t u16GuestIntStatus; 2919 /** 0x50 - PML index. */ 2920 uint16_t u16PmlIndex; 2921 /** 0x52 - Reserved for future. */ 2922 uint16_t au16Reserved1[8]; 2923 /** @} */ 2924 2925 /** name 16-bit Host-state fields. 2926 * @{ */ 2927 /** 0x62 - Host ES selector. */ 2928 RTSEL HostEs; 2929 /** 0x64 - Host CS selector. */ 2930 RTSEL HostCs; 2931 /** 0x66 - Host SS selector. */ 2932 RTSEL HostSs; 2933 /** 0x68 - Host DS selector. */ 2934 RTSEL HostDs; 2935 /** 0x6a - Host FS selector. */ 2936 RTSEL HostFs; 2937 /** 0x6c - Host GS selector. */ 2938 RTSEL HostGs; 2939 /** 0x6e - Host TR selector. */ 2940 RTSEL HostTr; 2941 /** 0x70 - Reserved for future. */ 2942 uint16_t au16Reserved2[10]; 2943 /** @} */ 2944 2945 /** @name 32-bit Control fields. 2946 * @{ */ 2947 /** 0x84 - Pin-based VM-execution controls. */ 2948 uint32_t u32PinCtls; 2949 /** 0x88 - Processor-based VM-execution controls. */ 2950 uint32_t u32ProcCtls; 2951 /** 0x8c - Exception bitmap. */ 2952 uint32_t u32XcptBitmap; 2953 /** 0x90 - Page-fault exception error mask. */ 2954 uint32_t u32XcptPFMask; 2955 /** 0x94 - Page-fault exception error match. */ 2956 uint32_t u32XcptPFMatch; 2957 /** 0x98 - CR3-target count. */ 2958 uint32_t u32Cr3TargetCount; 2959 /** 0x9c - VM-exit controls. */ 2960 uint32_t u32ExitCtls; 2961 /** 0xa0 - VM-exit MSR store count. */ 2962 uint32_t u32ExitMsrStoreCount; 2963 /** 0xa4 - VM-exit MSR load count. */ 2964 uint32_t u32ExitMsrLoadCount; 2965 /** 0xa8 - VM-entry controls. */ 2966 uint32_t u32EntryCtls; 2967 /** 0xac - VM-entry MSR load count. */ 2968 uint32_t u32EntryMsrLoadCount; 2969 /** 0xb0 - VM-entry interruption information. */ 2970 uint32_t u32EntryIntInfo; 2971 /** 0xb4 - VM-entry exception error code. */ 2972 uint32_t u32EntryXcptErrCode; 2973 /** 0xb8 - VM-entry instruction length. */ 2974 uint32_t u32EntryInstrLen; 2975 /** 0xbc - TPR-treshold. */ 2976 uint32_t u32TprTreshold; 2977 /** 0xc0 - Secondary-processor based VM-execution controls. */ 2978 uint32_t u32ProcCtls2; 2979 /** 0xc4 - Pause-loop exiting Gap. */ 2980 uint32_t u32PleGap; 2981 /** 0xc8 - Pause-loop exiting Window. */ 2982 uint32_t u32PleWindow; 2983 /** 0xcc - Reserved for future. */ 2984 uint32_t au32Reserved1[8]; 2985 /** @} */ 2986 2987 /** @name 32-bit Read-only Data fields. 2988 * @{ */ 2989 /** 0xec - VM-instruction error. */ 2990 uint32_t u32RoVmInstrError; 2991 /** 0xf0 - VM-exit reason. */ 2992 uint32_t u32RoVmExitReason; 2993 /** 0xf4 - VM-exit interruption information. */ 2994 uint32_t u32RoVmExitIntInfo; 2995 /** 0xf8 - VM-exit interruption error code. */ 2996 uint32_t u32RoVmExitErrCode; 2997 /** 0xfc - IDT-vectoring information. */ 2998 uint32_t u32RoIdtVectoringInfo; 2999 /** 0x100 - IDT-vectoring error code. */ 3000 uint32_t u32RoIdtVectoringErrCode; 3001 /** 0x104 - VM-exit instruction length. */ 3002 uint32_t u32RoVmExitInstrLen; 3003 /** 0x108 - VM-exit instruction information. */ 3004 uint32_t u32RoVmExitInstrInfo; 3005 /** 0x10c - Reserved for future. */ 3006 uint32_t au32RoReserved2[8]; 3007 /** @} */ 3008 3009 /** @name 32-bit Guest-state fields. 3010 * @{ */ 3011 /** 0x12c - Guest ES limit. */ 3012 uint32_t u32GuestEsLimit; 3013 /** 0x130 - Guest CS limit. */ 3014 uint32_t u32GuestCsLimit; 3015 /** 0x134 - Guest SS limit. */ 3016 uint32_t u32GuestSsLimit; 3017 /** 0x138 - Guest DS limit. */ 3018 uint32_t u32GuestDsLimit; 3019 /** 0x13c - Guest FS limit. */ 3020 uint32_t u32GuestFsLimit; 3021 /** 0x140 - Guest GS limit. */ 3022 uint32_t u32GuestGsLimit; 3023 /** 0x144 - Guest LDTR limit. */ 3024 uint32_t u32GuestLdtrLimit; 3025 /** 0x148 - Guest TR limit. */ 3026 uint32_t u32GuestTrLimit; 3027 /** 0x14c - Guest GDTR limit. */ 3028 uint32_t u32GuestGdtrLimit; 3029 /** 0x150 - Guest IDTR limit. */ 3030 uint32_t u32GuestIdtrLimit; 3031 /** 0x154 - Guest ES attributes. */ 3032 uint32_t u32GuestEsAttr; 3033 /** 0x158 - Guest CS attributes. */ 3034 uint32_t u32GuestCsAttr; 3035 /** 0x15c - Guest SS attributes. */ 3036 uint32_t u32GuestSsAttr; 3037 /** 0x160 - Guest DS attributes. */ 3038 uint32_t u32GuestDsAttr; 3039 /** 0x164 - Guest FS attributes. */ 3040 uint32_t u32GuestFsAttr; 3041 /** 0x168 - Guest GS attributes. */ 3042 uint32_t u32GuestGsAttr; 3043 /** 0x16c - Guest LDTR attributes. */ 3044 uint32_t u32GuestLdtrAttr; 3045 /** 0x170 - Guest TR attributes. */ 3046 uint32_t u32GuestTrAttr; 3047 /** 0x174 - Guest interruptibility state. */ 3048 uint32_t u32GuestIntrState; 3049 /** 0x178 - Guest activity state. */ 3050 uint32_t u32GuestActivityState; 3051 /** 0x17c - Guest SMBASE. */ 3052 uint32_t u32GuestSmBase; 3053 /** 0x180 - Guest SYSENTER CS. */ 3054 uint32_t u32GuestSysenterCS; 3055 /** 0x184 - Preemption timer value. */ 3056 uint32_t u32PreemptTimer; 3057 /** 0x188 - Reserved for future. */ 3058 uint32_t au32Reserved3[8]; 3059 /** @} */ 3060 3061 /** @name 32-bit Host-state fields. 3062 * @{ */ 3063 /** 0x1a8 - Host SYSENTER CS. */ 3064 uint32_t u32HostSysenterCs; 3065 /** 0x1ac - Reserved for future. */ 3066 uint32_t au32Reserved4[11]; 3067 /** @} */ 3068 3069 /** @name 64-bit Control fields. 3070 * @{ */ 3071 /** 0x1d8 - I/O bitmap A address. */ 3072 RTUINT64U u64AddrIoBitmapA; 3073 /** 0x1e0 - I/O bitmap B address. */ 3074 RTUINT64U u64AddrIoBitmapB; 3075 /** 0x1e8 - MSR bitmap address. */ 3076 RTUINT64U u64AddrMsrBitmap; 3077 /** 0x1f0 - VM-exit MSR-store area address. */ 3078 RTUINT64U u64AddrVmExitMsrStore; 3079 /** 0x1f8 - VM-exit MSR-load area address. */ 3080 RTUINT64U u64AddrVmExitMsrLoad; 3081 /** 0x200 - VM-entry MSR-load area address. */ 3082 RTUINT64U u64AddrVmEntryMsrLoad; 3083 /** 0x208 - Executive-VMCS pointer. */ 3084 RTUINT64U u64ExecVmcsPtr; 3085 /** 0x210 - PML address. */ 3086 RTUINT64U u64AddrPml; 3087 /** 0x218 - TSC offset. */ 3088 RTUINT64U u64TscOffset; 3089 /** 0x220 - Virtual-APIC address. */ 3090 RTUINT64U u64AddrVirtApic; 3091 /** 0x228 - APIC-access address. */ 3092 RTUINT64U u64AddrApicAccess; 3093 /** 0x230 - Posted-interrupt descriptor address. */ 3094 RTUINT64U u64AddrPostedIntDesc; 3095 /** 0x238 - VM-functions control. */ 3096 RTUINT64U u64VmFuncCtls; 3097 /** 0x240 - EPTP pointer. */ 3098 RTUINT64U u64EptpPtr; 3099 /** 0x248 - EOI-exit bitmap 0. */ 3100 RTUINT64U u64EoiExitBitmap0; 3101 /** 0x250 - EOI-exit bitmap 1. */ 3102 RTUINT64U u64EoiExitBitmap1; 3103 /** 0x258 - EOI-exit bitmap 2. */ 3104 RTUINT64U u64EoiExitBitmap2; 3105 /** 0x260 - EOI-exit bitmap 3. */ 3106 RTUINT64U u64EoiExitBitmap3; 3107 /** 0x268 - EPTP-list address. */ 3108 RTUINT64U u64AddrEptpList; 3109 /** 0x270 - VMREAD-bitmap address. */ 3110 RTUINT64U u64AddrVmreadBitmap; 3111 /** 0x278 - VMWRITE-bitmap address. */ 3112 RTUINT64U u64AddrVmwriteBitmap; 3113 /** 0x280 - Virtualization-exception information address. */ 3114 RTUINT64U u64AddrXcptVeInfo; 3115 /** 0x288 - XSS-exiting bitmap address. */ 3116 RTUINT64U u64AddrXssBitmap; 3117 /** 0x290 - ENCLS-exiting bitmap address. */ 3118 RTUINT64U u64AddrEnclsBitmap; 3119 /** 0x298 - TSC multiplier. */ 3120 RTUINT64U u64TscMultiplier; 3121 /** 0x2a0 - Reserved for future. */ 3122 RTUINT64U au64Reserved0[16]; 3123 /** @} */ 3124 3125 /** @name 64-bit Read-only Data fields. 3126 * @{ */ 3127 /** 0x320 - Guest-physical address. */ 3128 RTUINT64U u64GuestPhysAddr; 3129 /** 0x328 - Reserved for future. */ 3130 RTUINT64U au64Reserved1[8]; 3131 /** @} */ 3132 3133 /** @name 64-bit Guest-state fields. 3134 * @{ */ 3135 /** 0x368 - VMCS link pointer. */ 3136 RTUINT64U u64VmcsLinkPtr; 3137 /** 0x370 - Guest debug-control MSR. */ 3138 RTUINT64U u64GuestDebugCtlMsr; 3139 /** 0x378 - Guest PAT MSR. */ 3140 RTUINT64U u64GuestPatMsr; 3141 /** 0x380 - Guest EFER MSR. */ 3142 RTUINT64U u64GuestEferMsr; 3143 /** 0x388 - Guest global performance-control MSR. */ 3144 RTUINT64U u64GuestPerfGlobalCtlMsr; 3145 /** 0x390 - Guest PDPTE 0. */ 3146 RTUINT64U u64GuestPdpte0; 3147 /** 0x398 - Guest PDPTE 0. */ 3148 RTUINT64U u64GuestPdpte1; 3149 /** 0x3a0 - Guest PDPTE 1. */ 3150 RTUINT64U u64GuestPdpte2; 3151 /** 0x3a8 - Guest PDPTE 2. */ 3152 RTUINT64U u64GuestPdpte3; 3153 /** 0x3b0 - Guest Bounds-config MSR (Intel MPX - Memory Protection Extensions). */ 3154 RTUINT64U u64GuestBndcfgsMsr; 3155 /** 0x3b8 - Reserved for future. */ 3156 RTUINT64U au64Reserved2[16]; 3157 /** @} */ 3158 3159 /** @name 64-bit Host-state Fields. 3160 * @{ */ 3161 /** 0x438 - Host PAT MSR. */ 3162 RTUINT64U u64HostPatMsr; 3163 /** 0x440 - Host EFER MSR. */ 3164 RTUINT64U u64HostEferMsr; 3165 /** 0x448 - Host global performance-control MSR. */ 3166 RTUINT64U u64HostPerfGlobalCtlMsr; 3167 /** 0x450 - Reserved for future. */ 3168 RTUINT64U au64Reserved3[16]; 3169 /** @} */ 3170 3171 /** @name Natural-width Control fields. 3172 * @{ */ 3173 /** 0x4d0 - CR0 guest/host Mask. */ 3174 RTUINT64U u64Cr0Mask; 3175 /** 0x4d8 - CR4 guest/host Mask. */ 3176 RTUINT64U u64Cr4Mask; 3177 /** 0x4e0 - CR0 read shadow. */ 3178 RTUINT64U u64Cr0ReadShadow; 3179 /** 0x4e8 - CR4 read shadow. */ 3180 RTUINT64U u64Cr4ReadShadow; 3181 /** 0x4f0 - CR3-target value 0. */ 3182 RTUINT64U u64Cr3Target0; 3183 /** 0x4f8 - CR3-target value 1. */ 3184 RTUINT64U u64Cr3Target1; 3185 /** 0x500 - CR3-target value 2. */ 3186 RTUINT64U u64Cr3Target2; 3187 /** 0x508 - CR3-target value 3. */ 3188 RTUINT64U u64Cr3Target3; 3189 /** 0x510 - Reserved for future. */ 3190 RTUINT64U au64Reserved4[32]; 3191 /** @} */ 3192 3193 /** @name Natural-width Read-only Data fields. */ 3194 /** 0x610 - Exit qualification. */ 3195 RTUINT64U u64ExitQual; 3196 /** 0x618 - I/O RCX. */ 3197 RTUINT64U u64IoRcx; 3198 /** 0x620 - I/O RSI. */ 3199 RTUINT64U u64IoRsi; 3200 /** 0x628 - I/O RDI. */ 3201 RTUINT64U u64IoRdi; 3202 /** 0x630 - I/O RIP. */ 3203 RTUINT64U u64IoRip; 3204 /** 0x638 - Guest-linear address. */ 3205 RTUINT64U u64GuestLinearAddr; 3206 /** 0x640 - Reserved for future. */ 3207 RTUINT64U au64Reserved5[16]; 3208 /** @} */ 3209 3210 /** @name Natural-width Guest-state Fields. 3211 * @{ */ 3212 /** 0x6c0 - Guest CR0. */ 3213 RTUINT64U u64GuestCr0; 3214 /** 0x6c8 - Guest CR3. */ 3215 RTUINT64U u64GuestCr3; 3216 /** 0x6d0 - Guest CR4. */ 3217 RTUINT64U u64GuestCr4; 3218 /** 0x6d8 - Guest ES base. */ 3219 RTUINT64U u64GuestEsBase; 3220 /** 0x6e0 - Guest CS base. */ 3221 RTUINT64U u64GuestCsBase; 3222 /** 0x6e8 - Guest SS base. */ 3223 RTUINT64U u64GuestSsBase; 3224 /** 0x6f0 - Guest DS base. */ 3225 RTUINT64U u64GuestDsBase; 3226 /** 0x6f8 - Guest FS base. */ 3227 RTUINT64U u64GuestFsBase; 3228 /** 0x700 - Guest GS base. */ 3229 RTUINT64U u64GuestGsBase; 3230 /** 0x708 - Guest LDTR base. */ 3231 RTUINT64U u64GuestLdtrBase; 3232 /** 0x710 - Guest TR base. */ 3233 RTUINT64U u64GuestTrBase; 3234 /** 0x718 - Guest GDTR base. */ 3235 RTUINT64U u64GuestGdtrBase; 3236 /** 0x720 - Guest IDTR base. */ 3237 RTUINT64U u64GuestIdtrBase; 3238 /** 0x728 - Guest DR7. */ 3239 RTUINT64U u64GuestDr7; 3240 /** 0x730 - Guest RSP. */ 3241 RTUINT64U u64GuestRsp; 3242 /** 0x738 - Guest RIP. */ 3243 RTUINT64U u64GuestRip; 3244 /** 0x740 - Guest RFLAGS. */ 3245 RTUINT64U u64GuestRFlags; 3246 /** 0x748 - Guest pending debug exception. */ 3247 RTUINT64U u64GuestPendingDbgXcpt; 3248 /** 0x750 - Guest SYSENTER ESP. */ 3249 RTUINT64U u64GuestSysenterEsp; 3250 /** 0x758 - Guest SYSENTER EIP. */ 3251 RTUINT64U u64GuestSysenterEip; 3252 /** 0x760 - Reserved for future. */ 3253 RTUINT64U au64Reserved6[32]; 3254 /** @} */ 3255 3256 /** @name Natural-width Host-state fields. 3257 * @{ */ 3258 /** 0x860 - Host CR0. */ 3259 RTUINT64U u64HostCr0; 3260 /** 0x868 - Host CR3. */ 3261 RTUINT64U u64HostCr3; 3262 /** 0x870 - Host CR4. */ 3263 RTUINT64U u64HostCr4; 3264 /** 0x878 - Host FS base. */ 3265 RTUINT64U u64HostFsBase; 3266 /** 0x880 - Host GS base. */ 3267 RTUINT64U u64HostGsBase; 3268 /** 0x888 - Host TR base. */ 3269 RTUINT64U u64HostTrBase; 3270 /** 0x890 - Host GDTR base. */ 3271 RTUINT64U u64HostGdtrBase; 3272 /** 0x898 - Host IDTR base. */ 3273 RTUINT64U u64HostIdtrBase; 3274 /** 0x8a0 - Host SYSENTER ESP base. */ 3275 RTUINT64U u64HostSysenterEsp; 3276 /** 0x8a8 - Host SYSENTER ESP base. */ 3277 RTUINT64U u64HostSysenterEip; 3278 /** 0x8b0 - Host RSP. */ 3279 RTUINT64U u64HostRsp; 3280 /** 0x8b8 - Host RIP. */ 3281 RTUINT64U u64HostRip; 3282 /** 0x8c0 - Reserved for future. */ 3283 RTUINT64U au64Reserved7[32]; 3284 /** @} */ 3285 3286 /** 0x9c0 - Padding. */ 3287 uint8_t abPadding[X86_PAGE_4K_SIZE - 0x9c0]; 3288 } VMXVVMCS; 3289 #pragma pack() 3290 /** Pointer to the VMXVVMCS struct. */ 3291 typedef VMXVVMCS *PVMXVVMCS; 3292 /** Pointer to a const VMXVVMCS struct. */ 3293 typedef const VMXVVMCS *PCVMXVVMCS; 3294 AssertCompileSize(VMXVVMCS, X86_PAGE_4K_SIZE); 3295 AssertCompileMemberSize(VMXVVMCS, fVmcsState, sizeof(uint8_t)); 3296 AssertCompileMemberOffset(VMXVVMCS, u32VmxAbortId, 0x004); 3297 AssertCompileMemberOffset(VMXVVMCS, fVmcsState, 0x008); 3298 AssertCompileMemberOffset(VMXVVMCS, u16Vpid, 0x028); 3299 AssertCompileMemberOffset(VMXVVMCS, GuestEs, 0x03e); 3300 AssertCompileMemberOffset(VMXVVMCS, HostEs, 0x062); 3301 AssertCompileMemberOffset(VMXVVMCS, u32PinCtls, 0x084); 3302 AssertCompileMemberOffset(VMXVVMCS, u32RoVmInstrError, 0x0ec); 3303 AssertCompileMemberOffset(VMXVVMCS, u32GuestEsLimit, 0x12c); 3304 AssertCompileMemberOffset(VMXVVMCS, u32HostSysenterCs, 0x1a8); 3305 AssertCompileMemberOffset(VMXVVMCS, u64AddrIoBitmapA, 0x1d8); 3306 AssertCompileMemberOffset(VMXVVMCS, u64GuestPhysAddr, 0x320); 3307 AssertCompileMemberOffset(VMXVVMCS, u64VmcsLinkPtr, 0x368); 3308 AssertCompileMemberOffset(VMXVVMCS, u64HostPatMsr, 0x438); 3309 AssertCompileMemberOffset(VMXVVMCS, u64Cr0Mask, 0x4d0); 3310 AssertCompileMemberOffset(VMXVVMCS, u64ExitQual, 0x610); 3311 AssertCompileMemberOffset(VMXVVMCS, u64GuestCr0, 0x6c0); 3312 AssertCompileMemberOffset(VMXVVMCS, u64HostCr0, 0x860); 2805 3313 /** @} */ 2806 3314 … … 2911 3419 kVmxVInstrDiag_Vmread_Success, 2912 3420 kVmxVInstrDiag_Vmread_VmxRoot, 2913 /* VMLAUNCH. */ 2914 kVmxVInstrDiag_Vmlaunch_Cpl, 2915 kVmxVInstrDiag_Vmlaunch_LongModeCS, 2916 kVmxVInstrDiag_Vmlaunch_RealOrV86Mode, 2917 kVmxVInstrDiag_Vmlaunch_VmxRoot, 3421 /* VMLAUNCH/VMRESUME. */ 3422 kVmxVInstrDiag_VmlaunchVmresume_BlocKMovSS, 3423 kVmxVInstrDiag_VmlaunchVmresume_Cpl, 3424 kVmxVInstrDiag_VmlaunchVmresume_LongModeCS, 3425 kVmxVInstrDiag_VmlaunchVmresume_PtrInvalid, 3426 kVmxVInstrDiag_VmlaunchVmresume_RealOrV86Mode, 3427 kVmxVInstrDiag_VmlaunchVmresume_VmcsClear, 3428 kVmxVInstrDiag_VmlaunchVmresume_VmcsLaunch, 3429 kVmxVInstrDiag_VmlaunchVmresume_VmxRoot, 2918 3430 /* Last member for determining array index limit. */ 2919 3431 kVmxVInstrDiag_Last 2920 3432 } VMXVINSTRDIAG; 2921 3433 AssertCompileSize(VMXVINSTRDIAG, 4); 2922 2923 /** @name VMX_V_VMCS_STATE_XXX - Virtual VMCS state.2924 * @{ */2925 /** VMCS state clear. */2926 #define VMX_V_VMCS_STATE_CLEAR RT_BIT(0)2927 /** VMCS state launched. */2928 #define VMX_V_VMCS_STATE_LAUNCHED RT_BIT(1)2929 /** @} */2930 2931 /**2932 * Virtual VM-Exit information.2933 *2934 * This is a convenience structure that bundles some VM-exit information related2935 * fields together.2936 */2937 typedef struct2938 {2939 /** The VM-exit reason. */2940 uint32_t uReason;2941 /** The VM-exit instruction length. */2942 uint32_t cbInstr;2943 /** The VM-exit instruction information. */2944 VMXEXITINSTRINFO InstrInfo;2945 /** Padding. */2946 uint32_t u32Padding0;2947 2948 /** The VM-exit qualification field. */2949 uint64_t u64Qual;2950 /** The guest-linear address field. */2951 uint64_t u64GuestLinearAddr;2952 /** The effective guest-linear address if @a InstrInfo indicates a memory-based2953 * instruction VM-exit. */2954 RTGCPTR GCPtrEffAddr;2955 2956 /** The VM-exit instruction ID. */2957 VMXINSTRID uInstrId;2958 } VMXVEXITINFO;2959 /** Pointer to the VMXVEXITINFO struct. */2960 typedef VMXVEXITINFO *PVMXVEXITINFO;2961 /** Pointer to a const VMXVEXITINFO struct. */2962 typedef const VMXVEXITINFO *PCVMXVEXITINFO;2963 2964 /**2965 * Virtual VMCS.2966 * This is our custom format and merged into the actual VMCS (/shadow) when we2967 * execute nested-guest code using hardware-assisted VMX.2968 *2969 * The first 8 bytes are as per Intel spec. 24.2 "Format of the VMCS Region".2970 *2971 * The offset and size of the VMCS state field (fVmcsState) is also fixed (not by2972 * Intel but for our own requirements) as we use it to offset into guest memory.2973 *2974 * We always treat natural-width fields as 64-bit in our implementation since2975 * it's easier, allows for teleporation in the future and does not affect guest2976 * software.2977 *2978 * Although the guest is supposed to access the VMCS only through the execution of2979 * VMX instructions (VMREAD, VMWRITE etc.), since the VMCS may reside in guest2980 * memory (e.g, active but not current VMCS), for saved-states compatibility, and2981 * for teleportation (when implemented) any newly added fields should be added to2982 * the appropriate reserved sections or at the end of the structure.2983 */2984 #pragma pack(1)2985 typedef struct2986 {2987 /** 0x0 - VMX VMCS revision identifier. */2988 VMXVMCSREVID u32VmcsRevId;2989 /** 0x4 - VMX-abort indicator. */2990 uint32_t u32VmxAbortId;2991 /** 0x8 - VMCS state, see VMX_V_VMCS_STATE_XXX. */2992 uint8_t fVmcsState;2993 /** 0x9 - Reserved for future. */2994 uint8_t au8Padding0[3];2995 /** 0xc - Reserved for future. */2996 uint32_t au32Reserved0[7];2997 2998 /** @name 16-bit control fields.2999 * @{ */3000 /** 0x28 - Virtual processor ID. */3001 uint16_t u16Vpid;3002 /** 0x2a - Posted interrupt notify vector. */3003 uint16_t u16PostIntNotifyVector;3004 /** 0x2c - EPTP index. */3005 uint16_t u16EptpIndex;3006 /** 0x2e - Reserved for future. */3007 uint16_t au16Reserved0[8];3008 /** @} */3009 3010 /** @name 16-bit Guest-state fields.3011 * @{ */3012 /** 0x3e - Guest ES selector. */3013 RTSEL GuestEs;3014 /** 0x40 - Guest ES selector. */3015 RTSEL GuestCs;3016 /** 0x42 - Guest ES selector. */3017 RTSEL GuestSs;3018 /** 0x44 - Guest ES selector. */3019 RTSEL GuestDs;3020 /** 0x46 - Guest ES selector. */3021 RTSEL GuestFs;3022 /** 0x48 - Guest ES selector. */3023 RTSEL GuestGs;3024 /** 0x4a - Guest LDTR selector. */3025 RTSEL GuestLdtr;3026 /** 0x4c - Guest TR selector. */3027 RTSEL GuestTr;3028 /** 0x4e - Guest interrupt status (virtual-interrupt delivery). */3029 uint16_t u16GuestIntStatus;3030 /** 0x50 - PML index. */3031 uint16_t u16PmlIndex;3032 /** 0x52 - Reserved for future. */3033 uint16_t au16Reserved1[8];3034 /** @} */3035 3036 /** name 16-bit Host-state fields.3037 * @{ */3038 /** 0x62 - Host ES selector. */3039 RTSEL HostEs;3040 /** 0x64 - Host CS selector. */3041 RTSEL HostCs;3042 /** 0x66 - Host SS selector. */3043 RTSEL HostSs;3044 /** 0x68 - Host DS selector. */3045 RTSEL HostDs;3046 /** 0x6a - Host FS selector. */3047 RTSEL HostFs;3048 /** 0x6c - Host GS selector. */3049 RTSEL HostGs;3050 /** 0x6e - Host TR selector. */3051 RTSEL HostTr;3052 /** 0x70 - Reserved for future. */3053 uint16_t au16Reserved2[10];3054 /** @} */3055 3056 /** @name 32-bit Control fields.3057 * @{ */3058 /** 0x84 - Pin-based VM-execution controls. */3059 uint32_t u32PinCtls;3060 /** 0x88 - Processor-based VM-execution controls. */3061 uint32_t u32ProcCtls;3062 /** 0x8c - Exception bitmap. */3063 uint32_t u32XcptBitmap;3064 /** 0x90 - Page-fault exception error mask. */3065 uint32_t u32XcptPFMask;3066 /** 0x94 - Page-fault exception error match. */3067 uint32_t u32XcptPFMatch;3068 /** 0x98 - CR3-target count. */3069 uint32_t u32Cr3TargetCount;3070 /** 0x9c - VM-exit controls. */3071 uint32_t u32ExitCtls;3072 /** 0xa0 - VM-exit MSR store count. */3073 uint32_t u32ExitMsrStoreCount;3074 /** 0xa4 - VM-exit MSR load count. */3075 uint32_t u32ExitMsrLoadCount;3076 /** 0xa8 - VM-entry controls. */3077 uint32_t u32EntryCtls;3078 /** 0xac - VM-entry MSR load count. */3079 uint32_t u32EntryMsrLoadCount;3080 /** 0xb0 - VM-entry interruption information. */3081 uint32_t u32EntryIntInfo;3082 /** 0xb4 - VM-entry exception error code. */3083 uint32_t u32EntryXcptErrCode;3084 /** 0xb8 - VM-entry instruction length. */3085 uint32_t u32EntryInstrLen;3086 /** 0xbc - TPR-treshold. */3087 uint32_t u32TprTreshold;3088 /** 0xc0 - Secondary-processor based VM-execution controls. */3089 uint32_t u32ProcCtls2;3090 /** 0xc4 - Pause-loop exiting Gap. */3091 uint32_t u32PleGap;3092 /** 0xc8 - Pause-loop exiting Window. */3093 uint32_t u32PleWindow;3094 /** 0xcc - Reserved for future. */3095 uint32_t au32Reserved1[8];3096 /** @} */3097 3098 /** @name 32-bit Read-only Data fields.3099 * @{ */3100 /** 0xec - VM-instruction error. */3101 uint32_t u32RoVmInstrError;3102 /** 0xf0 - VM-exit reason. */3103 uint32_t u32RoVmExitReason;3104 /** 0xf4 - VM-exit interruption information. */3105 uint32_t u32RoVmExitIntInfo;3106 /** 0xf8 - VM-exit interruption error code. */3107 uint32_t u32RoVmExitErrCode;3108 /** 0xfc - IDT-vectoring information. */3109 uint32_t u32RoIdtVectoringInfo;3110 /** 0x100 - IDT-vectoring error code. */3111 uint32_t u32RoIdtVectoringErrCode;3112 /** 0x104 - VM-exit instruction length. */3113 uint32_t u32RoVmExitInstrLen;3114 /** 0x108 - VM-exit instruction information. */3115 uint32_t u32RoVmExitInstrInfo;3116 /** 0x10c - Reserved for future. */3117 uint32_t au32RoReserved2[8];3118 /** @} */3119 3120 /** @name 32-bit Guest-state fields.3121 * @{ */3122 /** 0x12c - Guest ES limit. */3123 uint32_t u32GuestEsLimit;3124 /** 0x130 - Guest CS limit. */3125 uint32_t u32GuestCsLimit;3126 /** 0x134 - Guest SS limit. */3127 uint32_t u32GuestSsLimit;3128 /** 0x138 - Guest DS limit. */3129 uint32_t u32GuestDsLimit;3130 /** 0x13c - Guest FS limit. */3131 uint32_t u32GuestFsLimit;3132 /** 0x140 - Guest GS limit. */3133 uint32_t u32GuestGsLimit;3134 /** 0x144 - Guest LDTR limit. */3135 uint32_t u32GuestLdtrLimit;3136 /** 0x148 - Guest TR limit. */3137 uint32_t u32GuestTrLimit;3138 /** 0x14c - Guest GDTR limit. */3139 uint32_t u32GuestGdtrLimit;3140 /** 0x150 - Guest IDTR limit. */3141 uint32_t u32GuestIdtrLimit;3142 /** 0x154 - Guest ES attributes. */3143 uint32_t u32GuestEsAttr;3144 /** 0x158 - Guest CS attributes. */3145 uint32_t u32GuestCsAttr;3146 /** 0x15c - Guest SS attributes. */3147 uint32_t u32GuestSsAttr;3148 /** 0x160 - Guest DS attributes. */3149 uint32_t u32GuestDsAttr;3150 /** 0x164 - Guest FS attributes. */3151 uint32_t u32GuestFsAttr;3152 /** 0x168 - Guest GS attributes. */3153 uint32_t u32GuestGsAttr;3154 /** 0x16c - Guest LDTR attributes. */3155 uint32_t u32GuestLdtrAttr;3156 /** 0x170 - Guest TR attributes. */3157 uint32_t u32GuestTrAttr;3158 /** 0x174 - Guest interruptibility state. */3159 uint32_t u32GuestIntrState;3160 /** 0x178 - Guest activity state. */3161 uint32_t u32GuestActivityState;3162 /** 0x17c - Guest SMBASE. */3163 uint32_t u32GuestSmBase;3164 /** 0x180 - Guest SYSENTER CS. */3165 uint32_t u32GuestSysenterCS;3166 /** 0x184 - Preemption timer value. */3167 uint32_t u32PreemptTimer;3168 /** 0x188 - Reserved for future. */3169 uint32_t au32Reserved3[8];3170 /** @} */3171 3172 /** @name 32-bit Host-state fields.3173 * @{ */3174 /** 0x1a8 - Host SYSENTER CS. */3175 uint32_t u32HostSysenterCs;3176 /** 0x1ac - Reserved for future. */3177 uint32_t au32Reserved4[11];3178 /** @} */3179 3180 /** @name 64-bit Control fields.3181 * @{ */3182 /** 0x1d8 - I/O bitmap A address. */3183 RTUINT64U u64AddrIoBitmapA;3184 /** 0x1e0 - I/O bitmap B address. */3185 RTUINT64U u64AddrIoBitmapB;3186 /** 0x1e8 - MSR bitmap address. */3187 RTUINT64U u64AddrMsrBitmap;3188 /** 0x1f0 - VM-exit MSR-store area address. */3189 RTUINT64U u64AddrVmExitMsrStore;3190 /** 0x1f8 - VM-exit MSR-load area address. */3191 RTUINT64U u64AddrVmExitMsrLoad;3192 /** 0x200 - VM-entry MSR-load area address. */3193 RTUINT64U u64AddrVmEntryMsrLoad;3194 /** 0x208 - Executive-VMCS pointer. */3195 RTUINT64U u64ExecVmcsPtr;3196 /** 0x210 - PML address. */3197 RTUINT64U u64AddrPml;3198 /** 0x218 - TSC offset. */3199 RTUINT64U u64TscOffset;3200 /** 0x220 - Virtual-APIC address. */3201 RTUINT64U u64AddrVirtApic;3202 /** 0x228 - APIC-access address. */3203 RTUINT64U u64AddrApicAccess;3204 /** 0x230 - Posted-interrupt descriptor address. */3205 RTUINT64U u64AddrPostedIntDesc;3206 /** 0x238 - VM-functions control. */3207 RTUINT64U u64VmFuncCtls;3208 /** 0x240 - EPTP pointer. */3209 RTUINT64U u64EptpPtr;3210 /** 0x248 - EOI-exit bitmap 0. */3211 RTUINT64U u64EoiExitBitmap0;3212 /** 0x250 - EOI-exit bitmap 1. */3213 RTUINT64U u64EoiExitBitmap1;3214 /** 0x258 - EOI-exit bitmap 2. */3215 RTUINT64U u64EoiExitBitmap2;3216 /** 0x260 - EOI-exit bitmap 3. */3217 RTUINT64U u64EoiExitBitmap3;3218 /** 0x268 - EPTP-list address. */3219 RTUINT64U u64AddrEptpList;3220 /** 0x270 - VMREAD-bitmap address. */3221 RTUINT64U u64AddrVmreadBitmap;3222 /** 0x278 - VMWRITE-bitmap address. */3223 RTUINT64U u64AddrVmwriteBitmap;3224 /** 0x280 - Virtualization-exception information address. */3225 RTUINT64U u64AddrXcptVeInfo;3226 /** 0x288 - XSS-exiting bitmap address. */3227 RTUINT64U u64AddrXssBitmap;3228 /** 0x290 - ENCLS-exiting bitmap address. */3229 RTUINT64U u64AddrEnclsBitmap;3230 /** 0x298 - TSC multiplier. */3231 RTUINT64U u64TscMultiplier;3232 /** 0x2a0 - Reserved for future. */3233 RTUINT64U au64Reserved0[16];3234 /** @} */3235 3236 /** @name 64-bit Read-only Data fields.3237 * @{ */3238 /** 0x320 - Guest-physical address. */3239 RTUINT64U u64GuestPhysAddr;3240 /** 0x328 - Reserved for future. */3241 RTUINT64U au64Reserved1[8];3242 /** @} */3243 3244 /** @name 64-bit Guest-state fields.3245 * @{ */3246 /** 0x368 - VMCS link pointer. */3247 RTUINT64U u64VmcsLinkPtr;3248 /** 0x370 - Guest debug-control MSR. */3249 RTUINT64U u64GuestDebugCtlMsr;3250 /** 0x378 - Guest PAT MSR. */3251 RTUINT64U u64GuestPatMsr;3252 /** 0x380 - Guest EFER MSR. */3253 RTUINT64U u64GuestEferMsr;3254 /** 0x388 - Guest global performance-control MSR. */3255 RTUINT64U u64GuestPerfGlobalCtlMsr;3256 /** 0x390 - Guest PDPTE 0. */3257 RTUINT64U u64GuestPdpte0;3258 /** 0x398 - Guest PDPTE 0. */3259 RTUINT64U u64GuestPdpte1;3260 /** 0x3a0 - Guest PDPTE 1. */3261 RTUINT64U u64GuestPdpte2;3262 /** 0x3a8 - Guest PDPTE 2. */3263 RTUINT64U u64GuestPdpte3;3264 /** 0x3b0 - Guest Bounds-config MSR (Intel MPX - Memory Protection Extensions). */3265 RTUINT64U u64GuestBndcfgsMsr;3266 /** 0x3b8 - Reserved for future. */3267 RTUINT64U au64Reserved2[16];3268 /** @} */3269 3270 /** @name 64-bit Host-state Fields.3271 * @{ */3272 /** 0x438 - Host PAT MSR. */3273 RTUINT64U u64HostPatMsr;3274 /** 0x440 - Host EFER MSR. */3275 RTUINT64U u64HostEferMsr;3276 /** 0x448 - Host global performance-control MSR. */3277 RTUINT64U u64HostPerfGlobalCtlMsr;3278 /** 0x450 - Reserved for future. */3279 RTUINT64U au64Reserved3[16];3280 /** @} */3281 3282 /** @name Natural-width Control fields.3283 * @{ */3284 /** 0x4d0 - CR0 guest/host Mask. */3285 RTUINT64U u64Cr0Mask;3286 /** 0x4d8 - CR4 guest/host Mask. */3287 RTUINT64U u64Cr4Mask;3288 /** 0x4e0 - CR0 read shadow. */3289 RTUINT64U u64Cr0ReadShadow;3290 /** 0x4e8 - CR4 read shadow. */3291 RTUINT64U u64Cr4ReadShadow;3292 /** 0x4f0 - CR3-target value 0. */3293 RTUINT64U u64Cr3Target0;3294 /** 0x4f8 - CR3-target value 1. */3295 RTUINT64U u64Cr3Target1;3296 /** 0x500 - CR3-target value 2. */3297 RTUINT64U u64Cr3Target2;3298 /** 0x508 - CR3-target value 3. */3299 RTUINT64U u64Cr3Target3;3300 /** 0x510 - Reserved for future. */3301 RTUINT64U au64Reserved4[32];3302 /** @} */3303 3304 /** @name Natural-width Read-only Data fields. */3305 /** 0x610 - Exit qualification. */3306 RTUINT64U u64ExitQual;3307 /** 0x618 - I/O RCX. */3308 RTUINT64U u64IoRcx;3309 /** 0x620 - I/O RSI. */3310 RTUINT64U u64IoRsi;3311 /** 0x628 - I/O RDI. */3312 RTUINT64U u64IoRdi;3313 /** 0x630 - I/O RIP. */3314 RTUINT64U u64IoRip;3315 /** 0x638 - Guest-linear address. */3316 RTUINT64U u64GuestLinearAddr;3317 /** 0x640 - Reserved for future. */3318 RTUINT64U au64Reserved5[16];3319 /** @} */3320 3321 /** @name Natural-width Guest-state Fields.3322 * @{ */3323 /** 0x6c0 - Guest CR0. */3324 RTUINT64U u64GuestCr0;3325 /** 0x6c8 - Guest CR3. */3326 RTUINT64U u64GuestCr3;3327 /** 0x6d0 - Guest CR4. */3328 RTUINT64U u64GuestCr4;3329 /** 0x6d8 - Guest ES base. */3330 RTUINT64U u64GuestEsBase;3331 /** 0x6e0 - Guest CS base. */3332 RTUINT64U u64GuestCsBase;3333 /** 0x6e8 - Guest SS base. */3334 RTUINT64U u64GuestSsBase;3335 /** 0x6f0 - Guest DS base. */3336 RTUINT64U u64GuestDsBase;3337 /** 0x6f8 - Guest FS base. */3338 RTUINT64U u64GuestFsBase;3339 /** 0x700 - Guest GS base. */3340 RTUINT64U u64GuestGsBase;3341 /** 0x708 - Guest LDTR base. */3342 RTUINT64U u64GuestLdtrBase;3343 /** 0x710 - Guest TR base. */3344 RTUINT64U u64GuestTrBase;3345 /** 0x718 - Guest GDTR base. */3346 RTUINT64U u64GuestGdtrBase;3347 /** 0x720 - Guest IDTR base. */3348 RTUINT64U u64GuestIdtrBase;3349 /** 0x728 - Guest DR7. */3350 RTUINT64U u64GuestDr7;3351 /** 0x730 - Guest RSP. */3352 RTUINT64U u64GuestRsp;3353 /** 0x738 - Guest RIP. */3354 RTUINT64U u64GuestRip;3355 /** 0x740 - Guest RFLAGS. */3356 RTUINT64U u64GuestRFlags;3357 /** 0x748 - Guest pending debug exception. */3358 RTUINT64U u64GuestPendingDbgXcpt;3359 /** 0x750 - Guest SYSENTER ESP. */3360 RTUINT64U u64GuestSysenterEsp;3361 /** 0x758 - Guest SYSENTER EIP. */3362 RTUINT64U u64GuestSysenterEip;3363 /** 0x760 - Reserved for future. */3364 RTUINT64U au64Reserved6[32];3365 /** @} */3366 3367 /** @name Natural-width Host-state fields.3368 * @{ */3369 /** 0x860 - Host CR0. */3370 RTUINT64U u64HostCr0;3371 /** 0x868 - Host CR3. */3372 RTUINT64U u64HostCr3;3373 /** 0x870 - Host CR4. */3374 RTUINT64U u64HostCr4;3375 /** 0x878 - Host FS base. */3376 RTUINT64U u64HostFsBase;3377 /** 0x880 - Host GS base. */3378 RTUINT64U u64HostGsBase;3379 /** 0x888 - Host TR base. */3380 RTUINT64U u64HostTrBase;3381 /** 0x890 - Host GDTR base. */3382 RTUINT64U u64HostGdtrBase;3383 /** 0x898 - Host IDTR base. */3384 RTUINT64U u64HostIdtrBase;3385 /** 0x8a0 - Host SYSENTER ESP base. */3386 RTUINT64U u64HostSysenterEsp;3387 /** 0x8a8 - Host SYSENTER ESP base. */3388 RTUINT64U u64HostSysenterEip;3389 /** 0x8b0 - Host RSP. */3390 RTUINT64U u64HostRsp;3391 /** 0x8b8 - Host RIP. */3392 RTUINT64U u64HostRip;3393 /** 0x8c0 - Reserved for future. */3394 RTUINT64U au64Reserved7[32];3395 /** @} */3396 3397 /** 0x9c0 - Padding. */3398 uint8_t abPadding[X86_PAGE_4K_SIZE - 0x9c0];3399 } VMXVVMCS;3400 #pragma pack()3401 /** Pointer to the VMXVVMCS struct. */3402 typedef VMXVVMCS *PVMXVVMCS;3403 /** Pointer to a const VMXVVMCS struct. */3404 typedef const VMXVVMCS *PCVMXVVMCS;3405 AssertCompileSize(VMXVVMCS, X86_PAGE_4K_SIZE);3406 AssertCompileMemberSize(VMXVVMCS, fVmcsState, sizeof(uint8_t));3407 AssertCompileMemberOffset(VMXVVMCS, u32VmxAbortId, 0x004);3408 AssertCompileMemberOffset(VMXVVMCS, fVmcsState, 0x008);3409 AssertCompileMemberOffset(VMXVVMCS, u16Vpid, 0x028);3410 AssertCompileMemberOffset(VMXVVMCS, GuestEs, 0x03e);3411 AssertCompileMemberOffset(VMXVVMCS, HostEs, 0x062);3412 AssertCompileMemberOffset(VMXVVMCS, u32PinCtls, 0x084);3413 AssertCompileMemberOffset(VMXVVMCS, u32RoVmInstrError, 0x0ec);3414 AssertCompileMemberOffset(VMXVVMCS, u32GuestEsLimit, 0x12c);3415 AssertCompileMemberOffset(VMXVVMCS, u32HostSysenterCs, 0x1a8);3416 AssertCompileMemberOffset(VMXVVMCS, u64AddrIoBitmapA, 0x1d8);3417 AssertCompileMemberOffset(VMXVVMCS, u64GuestPhysAddr, 0x320);3418 AssertCompileMemberOffset(VMXVVMCS, u64VmcsLinkPtr, 0x368);3419 AssertCompileMemberOffset(VMXVVMCS, u64HostPatMsr, 0x438);3420 AssertCompileMemberOffset(VMXVVMCS, u64Cr0Mask, 0x4d0);3421 AssertCompileMemberOffset(VMXVVMCS, u64ExitQual, 0x610);3422 AssertCompileMemberOffset(VMXVVMCS, u64GuestCr0, 0x6c0);3423 AssertCompileMemberOffset(VMXVVMCS, u64HostCr0, 0x860);3424 /** @} */3425 3434 3426 3435
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