Changeset 74183 in vbox
- Timestamp:
- Sep 10, 2018 4:29:32 PM (7 years ago)
- svn:sync-xref-src-repo-rev:
- 124958
- Location:
- trunk
- Files:
-
- 3 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/include/VBox/vmm/hm_vmx.h
r74171 r74183 1035 1035 typedef const VMXEXITINSTRINFO *PCVMXEXITINSTRINFO; 1036 1036 1037 1038 /** @name VM-entry failure reported in VM-exit qualification. 1039 * See Intel spec. 26.7 "VM-entry failures during or after loading guest-state". 1040 */ 1041 /** No errors during VM-entry. */ 1042 #define VMX_ENTRY_FAIL_QUAL_NO_ERROR (0) 1043 /** Not used. */ 1044 #define VMX_ENTRY_FAIL_QUAL_NOT_USED (1) 1045 /** Error while loading PDPTEs. */ 1046 #define VMX_ENTRY_FAIL_QUAL_PDPTE (2) 1047 /** NMI injection when blocking-by-STI is set. */ 1048 #define VMX_ENTRY_FAIL_QUAL_NMI_INJECT (3) 1049 /** Invalid VMCS link pointer. */ 1050 #define VMX_ENTRY_FAIL_QUAL_VMCS_LINK_PTR (4) 1051 /** @} */ 1052 1053 1037 1054 /** 1038 1055 * VMX MSR autoload/store element. … … 2724 2741 */ 2725 2742 /** Hardware breakpoint 0 was met. */ 2726 #define VMX_VMCS_GUEST_PENDING_DEBUG_XCPT_BP0 RT_BIT (0)2743 #define VMX_VMCS_GUEST_PENDING_DEBUG_XCPT_BP0 RT_BIT_64(0) 2727 2744 /** Hardware breakpoint 1 was met. */ 2728 #define VMX_VMCS_GUEST_PENDING_DEBUG_XCPT_BP1 RT_BIT (1)2745 #define VMX_VMCS_GUEST_PENDING_DEBUG_XCPT_BP1 RT_BIT_64(1) 2729 2746 /** Hardware breakpoint 2 was met. */ 2730 #define VMX_VMCS_GUEST_PENDING_DEBUG_XCPT_BP2 RT_BIT (2)2747 #define VMX_VMCS_GUEST_PENDING_DEBUG_XCPT_BP2 RT_BIT_64(2) 2731 2748 /** Hardware breakpoint 3 was met. */ 2732 #define VMX_VMCS_GUEST_PENDING_DEBUG_XCPT_BP3 RT_BIT (3)2749 #define VMX_VMCS_GUEST_PENDING_DEBUG_XCPT_BP3 RT_BIT_64(3) 2733 2750 /** At least one data or IO breakpoint was hit. */ 2734 #define VMX_VMCS_GUEST_PENDING_DEBUG_XCPT_EN_BP RT_BIT (12)2751 #define VMX_VMCS_GUEST_PENDING_DEBUG_XCPT_EN_BP RT_BIT_64(12) 2735 2752 /** A debug exception would have been triggered by single-step execution mode. */ 2736 #define VMX_VMCS_GUEST_PENDING_DEBUG_XCPT_BS RT_BIT (14)2753 #define VMX_VMCS_GUEST_PENDING_DEBUG_XCPT_BS RT_BIT_64(14) 2737 2754 /** A debug exception occurred inside an RTM region. */ 2738 #define VMX_VMCS_GUEST_PENDING_DEBUG_RTM RT_BIT(16) 2755 #define VMX_VMCS_GUEST_PENDING_DEBUG_RTM RT_BIT_64(16) 2756 /** Mask of valid bits. */ 2757 #define VMX_VMCS_GUEST_PENDING_DEBUG_VALID_MASK ( VMX_VMCS_GUEST_PENDING_DEBUG_XCPT_BP0 \ 2758 | VMX_VMCS_GUEST_PENDING_DEBUG_XCPT_BP1 \ 2759 | VMX_VMCS_GUEST_PENDING_DEBUG_XCPT_BP2 \ 2760 | VMX_VMCS_GUEST_PENDING_DEBUG_XCPT_BP3 \ 2761 | VMX_VMCS_GUEST_PENDING_DEBUG_XCPT_EN_BP \ 2762 | VMX_VMCS_GUEST_PENDING_DEBUG_XCPT_BS \ 2763 | VMX_VMCS_GUEST_PENDING_DEBUG_RTM) 2764 #define VMX_VMCS_GUEST_PENDING_DEBUG_RTM_MASK ( VMX_VMCS_GUEST_PENDING_DEBUG_XCPT_EN_BP \ 2765 | VMX_VMCS_GUEST_PENDING_DEBUG_XCPT_BS \ 2766 | VMX_VMCS_GUEST_PENDING_DEBUG_RTM) 2767 /** Bit fields for Pending debug exceptions. */ 2768 #define VMX_BF_VMCS_PENDING_DBG_XCPT_BP0_SHIFT 0 2769 #define VMX_BF_VMCS_PENDING_DBG_XCPT_BP0_MASK UINT64_C(0x0000000000000001) 2770 #define VMX_BF_VMCS_PENDING_DBG_XCPT_BP1_SHIFT 1 2771 #define VMX_BF_VMCS_PENDING_DBG_XCPT_BP1_MASK UINT64_C(0x0000000000000002) 2772 #define VMX_BF_VMCS_PENDING_DBG_XCPT_BP2_SHIFT 2 2773 #define VMX_BF_VMCS_PENDING_DBG_XCPT_BP2_MASK UINT64_C(0x0000000000000004) 2774 #define VMX_BF_VMCS_PENDING_DBG_XCPT_BP3_SHIFT 3 2775 #define VMX_BF_VMCS_PENDING_DBG_XCPT_BP3_MASK UINT64_C(0x0000000000000008) 2776 #define VMX_BF_VMCS_PENDING_DBG_XCPT_RSVD_4_11_SHIFT 4 2777 #define VMX_BF_VMCS_PENDING_DBG_XCPT_RSVD_4_11_MASK UINT64_C(0x0000000000000ff0) 2778 #define VMX_BF_VMCS_PENDING_DBG_XCPT_EN_BP_SHIFT 12 2779 #define VMX_BF_VMCS_PENDING_DBG_XCPT_EN_BP_MASK UINT64_C(0x0000000000001000) 2780 #define VMX_BF_VMCS_PENDING_DBG_XCPT_RSVD_13_SHIFT 13 2781 #define VMX_BF_VMCS_PENDING_DBG_XCPT_RSVD_13_MASK UINT64_C(0x0000000000002000) 2782 #define VMX_BF_VMCS_PENDING_DBG_XCPT_BS_SHIFT 14 2783 #define VMX_BF_VMCS_PENDING_DBG_XCPT_BS_MASK UINT64_C(0x0000000000004000) 2784 #define VMX_BF_VMCS_PENDING_DBG_XCPT_RSVD_15_SHIFT 15 2785 #define VMX_BF_VMCS_PENDING_DBG_XCPT_RSVD_15_MASK UINT64_C(0x0000000000008000) 2786 #define VMX_BF_VMCS_PENDING_DBG_XCPT_RTM_SHIFT 16 2787 #define VMX_BF_VMCS_PENDING_DBG_XCPT_RTM_MASK UINT64_C(0x0000000000010000) 2788 #define VMX_BF_VMCS_PENDING_DBG_XCPT_RSVD_17_63_SHIFT 17 2789 #define VMX_BF_VMCS_PENDING_DBG_XCPT_RSVD_17_63_MASK UINT64_C(0xfffffffffffe0000) 2790 RT_BF_ASSERT_COMPILE_CHECKS(VMX_BF_VMCS_PENDING_DBG_XCPT_, UINT64_C(0), UINT64_MAX, 2791 (BP0, BP1, BP2, BP3, RSVD_4_11, EN_BP, RSVD_13, BS, RSVD_15, RTM, RSVD_17_63)); 2739 2792 /** @} */ 2740 2793 … … 3479 3532 kVmxVDiag_Vmentry_AddrMsrBitmap, 3480 3533 kVmxVDiag_Vmentry_AddrVirtApicPage, 3534 kVmxVDiag_Vmentry_AddrVmcsLinkPtr, 3481 3535 kVmxVDiag_Vmentry_AddrVmreadBitmap, 3482 3536 kVmxVDiag_Vmentry_AddrVmwriteBitmap, … … 3525 3579 kVmxVDiag_Vmentry_GuestPatMsr, 3526 3580 kVmxVDiag_Vmentry_GuestPcide, 3581 kVmxVDiag_Vmentry_GuestPndDbgXcptBsNoTf, 3582 kVmxVDiag_Vmentry_GuestPndDbgXcptBsTf, 3583 kVmxVDiag_Vmentry_GuestPndDbgXcptRsvd, 3584 kVmxVDiag_Vmentry_GuestPndDbgXcptRtm, 3527 3585 kVmxVDiag_Vmentry_GuestRip, 3528 3586 kVmxVDiag_Vmentry_GuestRipRsvd, … … 3616 3674 kVmxVDiag_Vmentry_GuestSegSelTr, 3617 3675 kVmxVDiag_Vmentry_GuestSysenterEspEip, 3676 kVmxVDiag_Vmentry_VmcsLinkPtrCurVmcs, 3677 kVmxVDiag_Vmentry_VmcsLinkPtrReadPhys, 3678 kVmxVDiag_Vmentry_VmcsLinkPtrRevId, 3679 kVmxVDiag_Vmentry_VmcsLinkPtrShadow, 3618 3680 kVmxVDiag_Vmentry_HostCr0Fixed0, 3619 3681 kVmxVDiag_Vmentry_HostCr0Fixed1, -
trunk/src/VBox/VMM/VMMAll/HMVMXAll.cpp
r74171 r74183 134 134 VMXV_DIAG_DESC(kVmxVDiag_Vmentry_AddrMsrBitmap , "AddrMsrBitmap" ), 135 135 VMXV_DIAG_DESC(kVmxVDiag_Vmentry_AddrVirtApicPage , "AddrVirtApicPage" ), 136 VMXV_DIAG_DESC(kVmxVDiag_Vmentry_AddrVmcsLinkPtr , "AddrVmcsLinkPtr" ), 136 137 VMXV_DIAG_DESC(kVmxVDiag_Vmentry_AddrVmreadBitmap , "AddrVmreadBitmap" ), 137 138 VMXV_DIAG_DESC(kVmxVDiag_Vmentry_AddrVmwriteBitmap , "AddrVmwriteBitmap" ), … … 180 181 VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestPatMsr , "GuestPatMsr" ), 181 182 VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestPcide , "GuestPcide" ), 183 VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestPndDbgXcptBsNoTf , "GuestPndDbgXcptBsNoTf" ), 184 VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestPndDbgXcptBsTf , "GuestPndDbgXcptBsTf" ), 185 VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestPndDbgXcptRsvd , "GuestPndDbgXcptRsvd" ), 186 VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestPndDbgXcptRtm , "GuestPndDbgXcptRtm" ), 182 187 VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestRip , "GuestRip" ), 183 188 VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestRipRsvd , "GuestRipRsvd" ), … … 271 276 VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSegSelTr , "GuestSegSelTr" ), 272 277 VMXV_DIAG_DESC(kVmxVDiag_Vmentry_GuestSysenterEspEip , "GuestSysenterEspEip" ), 278 VMXV_DIAG_DESC(kVmxVDiag_Vmentry_VmcsLinkPtrCurVmcs , "VmcsLinkPtrCurVmcs" ), 279 VMXV_DIAG_DESC(kVmxVDiag_Vmentry_VmcsLinkPtrReadPhys , "VmcsLinkPtrReadPhys" ), 280 VMXV_DIAG_DESC(kVmxVDiag_Vmentry_VmcsLinkPtrRevId , "VmcsLinkPtrRevId" ), 281 VMXV_DIAG_DESC(kVmxVDiag_Vmentry_VmcsLinkPtrShadow , "VmcsLinkPtrShadow" ), 273 282 VMXV_DIAG_DESC(kVmxVDiag_Vmentry_HostCr0Fixed0 , "HostCr0Fixed0" ), 274 283 VMXV_DIAG_DESC(kVmxVDiag_Vmentry_HostCr0Fixed1 , "HostCr0Fixed1" ), -
trunk/src/VBox/VMM/VMMAll/IEMAllCImplVmxInstr.cpp.h
r74171 r74183 364 364 #define IEM_VMX_HAS_SHADOW_VMCS(a_pVCpu) RT_BOOL(IEM_VMX_GET_SHADOW_VMCS(a_pVCpu) != NIL_RTGCPHYS) 365 365 366 367 366 /** Gets the guest-physical address of the shadows VMCS for the given VCPU. */ 368 367 #define IEM_VMX_GET_SHADOW_VMCS(a_pVCpu) ((a_pVCpu)->cpum.GstCtx.hwvirt.vmx.CTX_SUFF(pVmcs)->u64VmcsLinkPtr.u) 368 369 /** Gets the VMXON region pointer. */ 370 #define IEM_VMX_GET_VMXON_PTR(a_pVCpu) ((a_pVCpu)->cpum.GstCtx.hwvirt.vmx.GCPhysVmxon) 369 371 370 372 /** Whether a current VMCS is present for the given VCPU. */ … … 2867 2869 2868 2870 /* RFLAGS (bits 63:22 (or 31:22), bits 15, 5, 3 are reserved, bit 1 MB1). */ 2869 uint64_t const fMbzMask = IEM_GET_GUEST_CPU_FEATURES(pVCpu)->fLongMode ? UINT64_C(0xffffffffffc08028) : UINT32_C(0xffc08028); 2870 uint64_t const fMb1Mask = X86_EFL_RA1_MASK; 2871 if ( !(pVmcs->u64GuestRFlags.u & fMbzMask) 2872 && (pVmcs->u64GuestRFlags.u & fMb1Mask) == fMb1Mask) 2871 uint64_t const uGuestRFlags = IEM_GET_GUEST_CPU_FEATURES(pVCpu)->fLongMode ? pVmcs->u64GuestRFlags.u 2872 : pVmcs->u64GuestRFlags.s.Lo; 2873 uint64_t const fMbzMask = ~X86_EFL_LIVE_MASK; 2874 uint64_t const fMb1Mask = X86_EFL_RA1_MASK; 2875 if ( !(uGuestRFlags & fMbzMask) 2876 && (uGuestRFlags & fMb1Mask) == fMb1Mask) 2873 2877 { /* likely */ } 2874 2878 else … … 2878 2882 || !(pVmcs->u64GuestCr0.u & X86_CR0_PE)) 2879 2883 { 2880 if (!( pVmcs->u64GuestRFlags.u& X86_EFL_VM))2884 if (!(uGuestRFlags & X86_EFL_VM)) 2881 2885 { /* likely */ } 2882 2886 else … … 2887 2891 && VMX_ENTRY_INT_INFO_TYPE(pVmcs->u32EntryIntInfo) == VMX_ENTRY_INT_INFO_TYPE_EXT_INT) 2888 2892 { 2889 if ( pVmcs->u64GuestRFlags.u& X86_EFL_IF)2893 if (uGuestRFlags & X86_EFL_IF) 2890 2894 { /* likely */ } 2891 2895 else … … 2911 2915 * See Intel spec. 26.3.1.5 "Checks on Guest Non-Register State". 2912 2916 */ 2913 P CVMXVVMCS pVmcs = pVCpu->cpum.GstCtx.hwvirt.vmx.CTX_SUFF(pVmcs);2917 PVMXVVMCS pVmcs = pVCpu->cpum.GstCtx.hwvirt.vmx.CTX_SUFF(pVmcs); 2914 2918 const char *const pszFailure = "VM-exit"; 2915 2919 … … 3037 3041 IEM_VMX_VMENTRY_FAILED_RET(pVCpu, pszInstr, pszFailure, kVmxVDiag_Vmentry_GuestIntStateEnclave); 3038 3042 3039 /** @todo NSTVMX: Pending debug exceptions, VMCS link pointer. */ 3043 /* 3044 * Pending debug exceptions. 3045 */ 3046 uint64_t const uPendingDbgXcpt = IEM_GET_GUEST_CPU_FEATURES(pVCpu)->fLongMode 3047 ? pVmcs->u64GuestPendingDbgXcpt.u 3048 : pVmcs->u64GuestPendingDbgXcpt.s.Lo; 3049 if (!(uPendingDbgXcpt & ~VMX_VMCS_GUEST_PENDING_DEBUG_VALID_MASK)) 3050 { /* likely */ } 3051 else 3052 IEM_VMX_VMENTRY_FAILED_RET(pVCpu, pszInstr, pszFailure, kVmxVDiag_Vmentry_GuestPndDbgXcptRsvd); 3053 3054 if ( (pVmcs->u32GuestIntrState & (VMX_VMCS_GUEST_INT_STATE_BLOCK_MOVSS | VMX_VMCS_GUEST_INT_STATE_BLOCK_STI)) 3055 || pVmcs->u32GuestActivityState == VMX_VMCS_GUEST_ACTIVITY_HLT) 3056 { 3057 if ( (pVmcs->u64GuestRFlags.u & X86_EFL_TF) 3058 && !(pVmcs->u64GuestDebugCtlMsr.u & MSR_IA32_DEBUGCTL_BTF) 3059 && !(uPendingDbgXcpt & VMX_VMCS_GUEST_PENDING_DEBUG_XCPT_BS)) 3060 IEM_VMX_VMENTRY_FAILED_RET(pVCpu, pszInstr, pszFailure, kVmxVDiag_Vmentry_GuestPndDbgXcptBsTf); 3061 3062 if ( ( !(pVmcs->u64GuestRFlags.u & X86_EFL_TF) 3063 || (pVmcs->u64GuestDebugCtlMsr.u & MSR_IA32_DEBUGCTL_BTF)) 3064 && (uPendingDbgXcpt & VMX_VMCS_GUEST_PENDING_DEBUG_XCPT_BS)) 3065 IEM_VMX_VMENTRY_FAILED_RET(pVCpu, pszInstr, pszFailure, kVmxVDiag_Vmentry_GuestPndDbgXcptBsNoTf); 3066 } 3067 3068 /* We don't support RTM (Real-time Transactional Memory) yet. */ 3069 if (uPendingDbgXcpt & VMX_VMCS_GUEST_PENDING_DEBUG_RTM) 3070 IEM_VMX_VMENTRY_FAILED_RET(pVCpu, pszInstr, pszFailure, kVmxVDiag_Vmentry_GuestPndDbgXcptRtm); 3071 3072 /* 3073 * VMCS link pointer. 3074 */ 3075 if (pVmcs->u64VmcsLinkPtr.u != UINT64_C(0xffffffffffffffff)) 3076 { 3077 /* We don't support SMM yet (so VMCS link pointer cannot be the current VMCS). */ 3078 if (pVmcs->u64VmcsLinkPtr.u != IEM_VMX_GET_CURRENT_VMCS(pVCpu)) 3079 { /* likely */ } 3080 else 3081 { 3082 pVmcs->u64ExitQual.u = VMX_ENTRY_FAIL_QUAL_VMCS_LINK_PTR; 3083 IEM_VMX_VMENTRY_FAILED_RET(pVCpu, pszInstr, pszFailure, kVmxVDiag_Vmentry_VmcsLinkPtrCurVmcs); 3084 } 3085 3086 /* Validate the address. */ 3087 if ( (pVmcs->u64VmcsLinkPtr.u & X86_PAGE_4K_OFFSET_MASK) 3088 || (pVmcs->u64VmcsLinkPtr.u >> IEM_GET_GUEST_CPU_FEATURES(pVCpu)->cVmxMaxPhysAddrWidth) 3089 || !PGMPhysIsGCPhysNormal(pVCpu->CTX_SUFF(pVM), pVmcs->u64VmcsLinkPtr.u)) 3090 { 3091 pVmcs->u64ExitQual.u = VMX_ENTRY_FAIL_QUAL_VMCS_LINK_PTR; 3092 IEM_VMX_VMENTRY_FAILED_RET(pVCpu, pszInstr, pszFailure, kVmxVDiag_Vmentry_AddrVmcsLinkPtr); 3093 } 3094 3095 /* Read the VMCS-link pointer from guest memory. */ 3096 Assert(pVCpu->cpum.GstCtx.hwvirt.vmx.CTX_SUFF(pShadowVmcs)); 3097 int rc = PGMPhysSimpleReadGCPhys(pVCpu->CTX_SUFF(pVM), pVCpu->cpum.GstCtx.hwvirt.vmx.CTX_SUFF(pShadowVmcs), 3098 pVmcs->u64VmcsLinkPtr.u, VMX_V_VMCS_SIZE); 3099 if (RT_FAILURE(rc)) 3100 { 3101 pVmcs->u64ExitQual.u = VMX_ENTRY_FAIL_QUAL_VMCS_LINK_PTR; 3102 IEM_VMX_VMENTRY_FAILED_RET(pVCpu, pszInstr, pszFailure, kVmxVDiag_Vmentry_VmcsLinkPtrReadPhys); 3103 } 3104 3105 /* Verify the VMCS revision specified by the guest matches what we reported to the guest. */ 3106 if (pVCpu->cpum.GstCtx.hwvirt.vmx.CTX_SUFF(pShadowVmcs)->u32VmcsRevId.n.u31RevisionId == VMX_V_VMCS_REVISION_ID) 3107 { /* likely */ } 3108 else 3109 { 3110 pVmcs->u64ExitQual.u = VMX_ENTRY_FAIL_QUAL_VMCS_LINK_PTR; 3111 IEM_VMX_VMENTRY_FAILED_RET(pVCpu, pszInstr, pszFailure, kVmxVDiag_Vmentry_VmcsLinkPtrRevId); 3112 } 3113 3114 /* Verify the shadow bit is set if VMCS shadowing is enabled . */ 3115 if ( !(pVmcs->u32ProcCtls2 & VMX_PROC_CTLS2_VMCS_SHADOWING) 3116 || pVCpu->cpum.GstCtx.hwvirt.vmx.CTX_SUFF(pShadowVmcs)->u32VmcsRevId.n.fIsShadowVmcs) 3117 { /* likely */ } 3118 else 3119 { 3120 pVmcs->u64ExitQual.u = VMX_ENTRY_FAIL_QUAL_VMCS_LINK_PTR; 3121 IEM_VMX_VMENTRY_FAILED_RET(pVCpu, pszInstr, pszFailure, kVmxVDiag_Vmentry_VmcsLinkPtrShadow); 3122 } 3123 } 3040 3124 3041 3125 NOREF(pszInstr);
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