- Timestamp:
- Sep 17, 2018 12:41:15 PM (6 years ago)
- File:
-
- 1 edited
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trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp
r74225 r74307 160 160 ("fExtrn=%#RX64 fExtrnMbz=%#RX64\n", \ 161 161 (a_pVCpu)->cpum.GstCtx.fExtrn, (a_fExtrnMbz))) 162 163 /** Macro for importing guest state from the VMCS back into CPUMCTX (intended to be 164 * used only from VM-exit handlers). */ 165 #define HMVMX_CPUMCTX_IMPORT_STATE(a_pVCpu, a_fWhat) (hmR0VmxImportGuestState((a_pVCpu), (a_fWhat))) 162 166 163 167 /** Helper macro for VM-exit handlers called unexpectedly. */ … … 11272 11276 Assert(CPUMIsGuestInRealModeEx(&pVCpu->cpum.GstCtx)); 11273 11277 11274 rc = hmR0VmxImportGuestState(pVCpu, CPUMCTX_EXTRN_CR0);11278 rc = HMVMX_CPUMCTX_IMPORT_STATE(pVCpu, CPUMCTX_EXTRN_CR0); 11275 11279 rc |= hmR0VmxReadExitInstrLenVmcs(pVmxTransient); 11276 11280 rc |= hmR0VmxReadExitIntErrorCodeVmcs(pVmxTransient); … … 11389 11393 */ 11390 11394 int rc = hmR0VmxReadExitInstrLenVmcs(pVmxTransient); 11391 rc |= hmR0VmxImportGuestState(pVCpu, IEM_CPUMCTX_EXTRN_EXEC_DECODED_NO_MEM_MASK);11395 rc |= HMVMX_CPUMCTX_IMPORT_STATE(pVCpu, IEM_CPUMCTX_EXTRN_EXEC_DECODED_NO_MEM_MASK); 11392 11396 AssertRCReturn(rc, rc); 11393 11397 … … 11415 11419 * Frequent exit or something needing probing. Get state and call EMHistoryExec. 11416 11420 */ 11417 int rc2 = hmR0VmxImportGuestState(pVCpu, HMVMX_CPUMCTX_EXTRN_ALL);11421 int rc2 = HMVMX_CPUMCTX_IMPORT_STATE(pVCpu, HMVMX_CPUMCTX_EXTRN_ALL); 11418 11422 AssertRCReturn(rc2, rc2); 11419 11423 … … 11438 11442 { 11439 11443 HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient); 11440 int rc = hmR0VmxImportGuestState(pVCpu, CPUMCTX_EXTRN_CR4);11444 int rc = HMVMX_CPUMCTX_IMPORT_STATE(pVCpu, CPUMCTX_EXTRN_CR4); 11441 11445 AssertRCReturn(rc, rc); 11442 11446 … … 11455 11459 { 11456 11460 HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient); 11457 int rc = hmR0VmxImportGuestState(pVCpu, IEM_CPUMCTX_EXTRN_MUST_MASK);11461 int rc = HMVMX_CPUMCTX_IMPORT_STATE(pVCpu, IEM_CPUMCTX_EXTRN_MUST_MASK); 11458 11462 rc |= hmR0VmxReadExitInstrLenVmcs(pVmxTransient); 11459 11463 AssertRCReturn(rc, rc); … … 11483 11487 { 11484 11488 HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient); 11485 int rc = hmR0VmxImportGuestState(pVCpu, IEM_CPUMCTX_EXTRN_MUST_MASK | CPUMCTX_EXTRN_TSC_AUX);11489 int rc = HMVMX_CPUMCTX_IMPORT_STATE(pVCpu, IEM_CPUMCTX_EXTRN_MUST_MASK | CPUMCTX_EXTRN_TSC_AUX); 11486 11490 rc |= hmR0VmxReadExitInstrLenVmcs(pVmxTransient); 11487 11491 AssertRCReturn(rc, rc); … … 11511 11515 { 11512 11516 HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient); 11513 int rc = hmR0VmxImportGuestState(pVCpu, CPUMCTX_EXTRN_CR4 | CPUMCTX_EXTRN_CR0 | CPUMCTX_EXTRN_RFLAGS | CPUMCTX_EXTRN_SS);11517 int rc = HMVMX_CPUMCTX_IMPORT_STATE(pVCpu, CPUMCTX_EXTRN_CR4 | CPUMCTX_EXTRN_CR0 | CPUMCTX_EXTRN_RFLAGS | CPUMCTX_EXTRN_SS); 11514 11518 AssertRCReturn(rc, rc); 11515 11519 … … 11541 11545 if (EMAreHypercallInstructionsEnabled(pVCpu)) 11542 11546 { 11543 int rc = hmR0VmxImportGuestState(pVCpu, CPUMCTX_EXTRN_RIP | CPUMCTX_EXTRN_RFLAGS | CPUMCTX_EXTRN_CR0 | CPUMCTX_EXTRN_SS11544 | CPUMCTX_EXTRN_CS| CPUMCTX_EXTRN_EFER);11547 int rc = HMVMX_CPUMCTX_IMPORT_STATE(pVCpu, CPUMCTX_EXTRN_RIP | CPUMCTX_EXTRN_RFLAGS | CPUMCTX_EXTRN_CR0 11548 | CPUMCTX_EXTRN_SS | CPUMCTX_EXTRN_CS | CPUMCTX_EXTRN_EFER); 11545 11549 AssertRCReturn(rc, rc); 11546 11550 … … 11584 11588 int rc = hmR0VmxReadExitQualVmcs(pVCpu, pVmxTransient); 11585 11589 rc |= hmR0VmxReadExitInstrLenVmcs(pVmxTransient); 11586 rc |= hmR0VmxImportGuestState(pVCpu, IEM_CPUMCTX_EXTRN_EXEC_DECODED_MEM_MASK);11590 rc |= HMVMX_CPUMCTX_IMPORT_STATE(pVCpu, IEM_CPUMCTX_EXTRN_EXEC_DECODED_MEM_MASK); 11587 11591 AssertRCReturn(rc, rc); 11588 11592 … … 11609 11613 { 11610 11614 HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient); 11611 int rc = hmR0VmxImportGuestState(pVCpu, CPUMCTX_EXTRN_CR0 | CPUMCTX_EXTRN_RFLAGS | CPUMCTX_EXTRN_SS);11615 int rc = HMVMX_CPUMCTX_IMPORT_STATE(pVCpu, CPUMCTX_EXTRN_CR0 | CPUMCTX_EXTRN_RFLAGS | CPUMCTX_EXTRN_SS); 11612 11616 AssertRCReturn(rc, rc); 11613 11617 … … 11633 11637 { 11634 11638 HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient); 11635 int rc = hmR0VmxImportGuestState(pVCpu, CPUMCTX_EXTRN_CR0 | CPUMCTX_EXTRN_RFLAGS | CPUMCTX_EXTRN_SS);11639 int rc = HMVMX_CPUMCTX_IMPORT_STATE(pVCpu, CPUMCTX_EXTRN_CR0 | CPUMCTX_EXTRN_RFLAGS | CPUMCTX_EXTRN_SS); 11636 11640 AssertRCReturn(rc, rc); 11637 11641 … … 11767 11771 11768 11772 int rc = hmR0VmxAdvanceGuestRip(pVCpu, pVmxTransient); 11769 rc |= hmR0VmxImportGuestState(pVCpu, CPUMCTX_EXTRN_RFLAGS);11773 rc |= HMVMX_CPUMCTX_IMPORT_STATE(pVCpu, CPUMCTX_EXTRN_RFLAGS); 11770 11774 AssertRCReturn(rc, rc); 11771 11775 … … 11820 11824 11821 11825 int rc = hmR0VmxReadExitInstrLenVmcs(pVmxTransient); 11822 rc |= hmR0VmxImportGuestState(pVCpu, IEM_CPUMCTX_EXTRN_MUST_MASK | CPUMCTX_EXTRN_CR4);11826 rc |= HMVMX_CPUMCTX_IMPORT_STATE(pVCpu, IEM_CPUMCTX_EXTRN_MUST_MASK | CPUMCTX_EXTRN_CR4); 11823 11827 AssertRCReturn(rc, rc); 11824 11828 … … 11851 11855 HMVMX_EXIT_NSRC_DECL hmR0VmxExitErrInvalidGuestState(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient) 11852 11856 { 11853 int rc = hmR0VmxImportGuestState(pVCpu, HMVMX_CPUMCTX_EXTRN_ALL);11857 int rc = HMVMX_CPUMCTX_IMPORT_STATE(pVCpu, HMVMX_CPUMCTX_EXTRN_ALL); 11854 11858 AssertRCReturn(rc, rc); 11855 11859 rc = hmR0VmxCheckVmcsCtls(pVCpu); … … 11980 11984 uint32_t const idMsr = pVCpu->cpum.GstCtx.ecx; NOREF(idMsr); /* Save it. */ 11981 11985 int rc = hmR0VmxReadExitInstrLenVmcs(pVmxTransient); 11982 rc |= hmR0VmxImportGuestState(pVCpu, IEM_CPUMCTX_EXTRN_EXEC_DECODED_NO_MEM_MASK | CPUMCTX_EXTRN_ALL_MSRS);11986 rc |= HMVMX_CPUMCTX_IMPORT_STATE(pVCpu, IEM_CPUMCTX_EXTRN_EXEC_DECODED_NO_MEM_MASK | CPUMCTX_EXTRN_ALL_MSRS); 11983 11987 AssertRCReturn(rc, rc); 11984 11988 … … 12039 12043 uint32_t const idMsr = pVCpu->cpum.GstCtx.ecx; /* Save it. */ 12040 12044 int rc = hmR0VmxReadExitInstrLenVmcs(pVmxTransient); 12041 rc |= hmR0VmxImportGuestState(pVCpu, IEM_CPUMCTX_EXTRN_EXEC_DECODED_NO_MEM_MASK | CPUMCTX_EXTRN_ALL_MSRS);12045 rc |= HMVMX_CPUMCTX_IMPORT_STATE(pVCpu, IEM_CPUMCTX_EXTRN_EXEC_DECODED_NO_MEM_MASK | CPUMCTX_EXTRN_ALL_MSRS); 12042 12046 AssertRCReturn(rc, rc); 12043 12047 … … 12202 12206 int rc = hmR0VmxReadExitQualVmcs(pVCpu, pVmxTransient); 12203 12207 rc |= hmR0VmxReadExitInstrLenVmcs(pVmxTransient); 12204 rc |= hmR0VmxImportGuestState(pVCpu, IEM_CPUMCTX_EXTRN_MUST_MASK);12208 rc |= HMVMX_CPUMCTX_IMPORT_STATE(pVCpu, IEM_CPUMCTX_EXTRN_MUST_MASK); 12205 12209 AssertRCReturn(rc, rc); 12206 12210 … … 12386 12390 int rc = hmR0VmxReadExitQualVmcs(pVCpu, pVmxTransient); 12387 12391 rc |= hmR0VmxReadExitInstrLenVmcs(pVmxTransient); 12388 rc |= hmR0VmxImportGuestState(pVCpu, IEM_CPUMCTX_EXTRN_MUST_MASK | CPUMCTX_EXTRN_SREG_MASK | CPUMCTX_EXTRN_EFER);12392 rc |= HMVMX_CPUMCTX_IMPORT_STATE(pVCpu, IEM_CPUMCTX_EXTRN_MUST_MASK | CPUMCTX_EXTRN_SREG_MASK | CPUMCTX_EXTRN_EFER); 12389 12393 /* EFER also required for longmode checks in EMInterpretDisasCurrent(), but it's always up-to-date. */ 12390 12394 AssertRCReturn(rc, rc); … … 12526 12530 * Note that the I/O breakpoint type is undefined if CR4.DE is 0. 12527 12531 */ 12528 rc = hmR0VmxImportGuestState(pVCpu, CPUMCTX_EXTRN_DR7);12532 rc = HMVMX_CPUMCTX_IMPORT_STATE(pVCpu, CPUMCTX_EXTRN_DR7); 12529 12533 AssertRCReturn(rc, rc); 12530 12534 … … 12598 12602 * Frequent exit or something needing probing. Get state and call EMHistoryExec. 12599 12603 */ 12600 int rc2 = hmR0VmxImportGuestState(pVCpu, HMVMX_CPUMCTX_EXTRN_ALL);12604 int rc2 = HMVMX_CPUMCTX_IMPORT_STATE(pVCpu, HMVMX_CPUMCTX_EXTRN_ALL); 12601 12605 AssertRCReturn(rc2, rc2); 12602 12606 STAM_COUNTER_INC(!fIOString ? fIOWrite ? &pVCpu->hm.s.StatExitIOWrite : &pVCpu->hm.s.StatExitIORead … … 12716 12720 12717 12721 /* IOMMIOPhysHandler() below may call into IEM, save the necessary state. */ 12718 int rc = hmR0VmxImportGuestState(pVCpu, IEM_CPUMCTX_EXTRN_MUST_MASK);12722 int rc = HMVMX_CPUMCTX_IMPORT_STATE(pVCpu, IEM_CPUMCTX_EXTRN_MUST_MASK); 12719 12723 rc |= hmR0VmxReadExitQualVmcs(pVCpu, pVmxTransient); 12720 12724 AssertRCReturn(rc, rc); … … 12822 12826 PCPUMCTX pCtx = &pVCpu->cpum.GstCtx; 12823 12827 int rc = hmR0VmxReadExitQualVmcs(pVCpu, pVmxTransient); 12824 rc |= hmR0VmxImportGuestState(pVCpu, CPUMCTX_EXTRN_SREG_MASK | CPUMCTX_EXTRN_DR7);12828 rc |= HMVMX_CPUMCTX_IMPORT_STATE(pVCpu, CPUMCTX_EXTRN_SREG_MASK | CPUMCTX_EXTRN_DR7); 12825 12829 AssertRCReturn(rc, rc); 12826 12830 Log4Func(("CS:RIP=%04x:%08RX64\n", pCtx->cs.Sel, pCtx->rip)); … … 12888 12892 RTGCPHYS GCPhys; 12889 12893 int rc = VMXReadVmcs64(VMX_VMCS64_RO_GUEST_PHYS_ADDR_FULL, &GCPhys); 12890 rc |= hmR0VmxImportGuestState(pVCpu, IEM_CPUMCTX_EXTRN_MUST_MASK);12894 rc |= HMVMX_CPUMCTX_IMPORT_STATE(pVCpu, IEM_CPUMCTX_EXTRN_MUST_MASK); 12891 12895 AssertRCReturn(rc, rc); 12892 12896 … … 12923 12927 * Frequent exit or something needing probing. Get state and call EMHistoryExec. 12924 12928 */ 12925 int rc2 = hmR0VmxImportGuestState(pVCpu, IEM_CPUMCTX_EXTRN_MUST_MASK);12929 int rc2 = HMVMX_CPUMCTX_IMPORT_STATE(pVCpu, IEM_CPUMCTX_EXTRN_MUST_MASK); 12926 12930 AssertRCReturn(rc2, rc2); 12927 12931 … … 12967 12971 int rc = VMXReadVmcs64(VMX_VMCS64_RO_GUEST_PHYS_ADDR_FULL, &GCPhys); 12968 12972 rc |= hmR0VmxReadExitQualVmcs(pVCpu, pVmxTransient); 12969 rc |= hmR0VmxImportGuestState(pVCpu, IEM_CPUMCTX_EXTRN_MUST_MASK);12973 rc |= HMVMX_CPUMCTX_IMPORT_STATE(pVCpu, IEM_CPUMCTX_EXTRN_MUST_MASK); 12970 12974 AssertRCReturn(rc, rc); 12971 12975 … … 13026 13030 STAM_COUNTER_INC(&pVCpu->hm.s.StatExitGuestMF); 13027 13031 13028 int rc = hmR0VmxImportGuestState(pVCpu, CPUMCTX_EXTRN_CR0);13032 int rc = HMVMX_CPUMCTX_IMPORT_STATE(pVCpu, CPUMCTX_EXTRN_CR0); 13029 13033 AssertRCReturn(rc, rc); 13030 13034 … … 13056 13060 STAM_COUNTER_INC(&pVCpu->hm.s.StatExitGuestBP); 13057 13061 13058 int rc = hmR0VmxImportGuestState(pVCpu, HMVMX_CPUMCTX_EXTRN_ALL);13062 int rc = HMVMX_CPUMCTX_IMPORT_STATE(pVCpu, HMVMX_CPUMCTX_EXTRN_ALL); 13059 13063 AssertRCReturn(rc, rc); 13060 13064 … … 13137 13141 VMMRZCallRing3Enable(pVCpu); 13138 13142 13139 rc = hmR0VmxImportGuestState(pVCpu, CPUMCTX_EXTRN_DR7);13143 rc = HMVMX_CPUMCTX_IMPORT_STATE(pVCpu, CPUMCTX_EXTRN_DR7); 13140 13144 AssertRCReturn(rc, rc); 13141 13145 … … 13204 13208 rc |= hmR0VmxReadExitIntErrorCodeVmcs(pVmxTransient); 13205 13209 rc |= hmR0VmxReadExitInstrLenVmcs(pVmxTransient); 13206 rc |= hmR0VmxImportGuestState(pVCpu, HMVMX_CPUMCTX_EXTRN_ALL);13210 rc |= HMVMX_CPUMCTX_IMPORT_STATE(pVCpu, HMVMX_CPUMCTX_EXTRN_ALL); 13207 13211 AssertRCReturn(rc, rc); 13208 13212 Log4Func(("Gst: CS:RIP %04x:%08RX64 ErrorCode=%#x CR0=%#RX64 CPL=%u TR=%#04x\n", pCtx->cs.Sel, pCtx->rip, … … 13216 13220 Assert(!pVCpu->CTX_SUFF(pVM)->hm.s.vmx.fUnrestrictedGuest); 13217 13221 13218 int rc = hmR0VmxImportGuestState(pVCpu, HMVMX_CPUMCTX_EXTRN_ALL);13222 int rc = HMVMX_CPUMCTX_IMPORT_STATE(pVCpu, HMVMX_CPUMCTX_EXTRN_ALL); 13219 13223 AssertRCReturn(rc, rc); 13220 13224 … … 13276 13280 13277 13281 #ifdef DEBUG_ramshankar 13278 rc |= hmR0VmxImportGuestState(pVCpu, CPUMCTX_EXTRN_CS | CPUMCTX_EXTRN_RIP);13282 rc |= HMVMX_CPUMCTX_IMPORT_STATE(pVCpu, CPUMCTX_EXTRN_CS | CPUMCTX_EXTRN_RIP); 13279 13283 uint8_t uVector = VMX_EXIT_INT_INFO_VECTOR(pVmxTransient->uExitIntInfo); 13280 13284 Log(("hmR0VmxExitXcptGeneric: Reinjecting Xcpt. uVector=%#x cs:rip=%#04x:%#RX64\n", uVector, pCtx->cs.Sel, pCtx->rip)); … … 13331 13335 13332 13336 PCPUMCTX pCtx = &pVCpu->cpum.GstCtx; 13333 rc = hmR0VmxImportGuestState(pVCpu, HMVMX_CPUMCTX_EXTRN_ALL);13337 rc = HMVMX_CPUMCTX_IMPORT_STATE(pVCpu, HMVMX_CPUMCTX_EXTRN_ALL); 13334 13338 AssertRCReturn(rc, rc); 13335 13339 … … 13400 13404 13401 13405 int rc = hmR0VmxReadExitInstrLenVmcs(pVmxTransient); 13402 rc |= hmR0VmxImportGuestState(pVCpu, CPUMCTX_EXTRN_RSP | CPUMCTX_EXTRN_SREG_MASK13403 | IEM_CPUMCTX_EXTRN_EXEC_DECODED_MEM_MASK);13406 rc |= HMVMX_CPUMCTX_IMPORT_STATE(pVCpu, CPUMCTX_EXTRN_RSP | CPUMCTX_EXTRN_SREG_MASK 13407 | IEM_CPUMCTX_EXTRN_EXEC_DECODED_MEM_MASK); 13404 13408 rc |= hmR0VmxReadExitInstrInfoVmcs(pVmxTransient); 13405 13409 rc |= hmR0VmxReadExitQualVmcs(pVCpu, pVmxTransient); … … 13449 13453 13450 13454 int rc = hmR0VmxReadExitInstrLenVmcs(pVmxTransient); 13451 rc |= hmR0VmxImportGuestState(pVCpu, CPUMCTX_EXTRN_RSP | CPUMCTX_EXTRN_SREG_MASK13452 | IEM_CPUMCTX_EXTRN_EXEC_DECODED_MEM_MASK);13455 rc |= HMVMX_CPUMCTX_IMPORT_STATE(pVCpu, CPUMCTX_EXTRN_RSP | CPUMCTX_EXTRN_SREG_MASK 13456 | IEM_CPUMCTX_EXTRN_EXEC_DECODED_MEM_MASK); 13453 13457 rc |= hmR0VmxReadExitInstrInfoVmcs(pVmxTransient); 13454 13458 rc |= hmR0VmxReadExitQualVmcs(pVCpu, pVmxTransient); … … 13485 13489 13486 13490 int rc = hmR0VmxReadExitInstrLenVmcs(pVmxTransient); 13487 rc |= hmR0VmxImportGuestState(pVCpu, CPUMCTX_EXTRN_RSP | CPUMCTX_EXTRN_SREG_MASK13488 | IEM_CPUMCTX_EXTRN_EXEC_DECODED_MEM_MASK);13491 rc |= HMVMX_CPUMCTX_IMPORT_STATE(pVCpu, CPUMCTX_EXTRN_RSP | CPUMCTX_EXTRN_SREG_MASK 13492 | IEM_CPUMCTX_EXTRN_EXEC_DECODED_MEM_MASK); 13489 13493 rc |= hmR0VmxReadExitInstrInfoVmcs(pVmxTransient); 13490 13494 rc |= hmR0VmxReadExitQualVmcs(pVCpu, pVmxTransient); … … 13521 13525 13522 13526 int rc = hmR0VmxReadExitInstrLenVmcs(pVmxTransient); 13523 rc |= hmR0VmxImportGuestState(pVCpu, CPUMCTX_EXTRN_RSP | CPUMCTX_EXTRN_SREG_MASK13524 | IEM_CPUMCTX_EXTRN_EXEC_DECODED_MEM_MASK);13527 rc |= HMVMX_CPUMCTX_IMPORT_STATE(pVCpu, CPUMCTX_EXTRN_RSP | CPUMCTX_EXTRN_SREG_MASK 13528 | IEM_CPUMCTX_EXTRN_EXEC_DECODED_MEM_MASK); 13525 13529 rc |= hmR0VmxReadExitInstrInfoVmcs(pVmxTransient); 13526 13530 rc |= hmR0VmxReadExitQualVmcs(pVCpu, pVmxTransient); … … 13571 13575 13572 13576 int rc = hmR0VmxReadExitInstrLenVmcs(pVmxTransient); 13573 rc |= hmR0VmxImportGuestState(pVCpu, CPUMCTX_EXTRN_RSP | CPUMCTX_EXTRN_SREG_MASK13574 | IEM_CPUMCTX_EXTRN_EXEC_DECODED_MEM_MASK);13577 rc |= HMVMX_CPUMCTX_IMPORT_STATE(pVCpu, CPUMCTX_EXTRN_RSP | CPUMCTX_EXTRN_SREG_MASK 13578 | IEM_CPUMCTX_EXTRN_EXEC_DECODED_MEM_MASK); 13575 13579 rc |= hmR0VmxReadExitInstrInfoVmcs(pVmxTransient); 13576 13580 rc |= hmR0VmxReadExitQualVmcs(pVCpu, pVmxTransient); … … 13608 13612 13609 13613 int rc = hmR0VmxReadExitInstrLenVmcs(pVmxTransient); 13610 rc |= hmR0VmxImportGuestState(pVCpu, IEM_CPUMCTX_EXTRN_EXEC_DECODED_NO_MEM_MASK);13614 rc |= HMVMX_CPUMCTX_IMPORT_STATE(pVCpu, IEM_CPUMCTX_EXTRN_EXEC_DECODED_NO_MEM_MASK); 13611 13615 AssertRCReturn(rc, rc); 13612 13616 … … 13636 13640 13637 13641 int rc = hmR0VmxReadExitInstrLenVmcs(pVmxTransient); 13638 rc |= hmR0VmxImportGuestState(pVCpu, CPUMCTX_EXTRN_RSP | CPUMCTX_EXTRN_SREG_MASK13639 | IEM_CPUMCTX_EXTRN_EXEC_DECODED_MEM_MASK);13642 rc |= HMVMX_CPUMCTX_IMPORT_STATE(pVCpu, CPUMCTX_EXTRN_RSP | CPUMCTX_EXTRN_SREG_MASK 13643 | IEM_CPUMCTX_EXTRN_EXEC_DECODED_MEM_MASK); 13640 13644 rc |= hmR0VmxReadExitInstrInfoVmcs(pVmxTransient); 13641 13645 rc |= hmR0VmxReadExitQualVmcs(pVCpu, pVmxTransient);
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