- Timestamp:
- Sep 19, 2018 8:43:05 AM (6 years ago)
- File:
-
- 1 edited
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trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp
r74307 r74360 7683 7683 * See Intel spec. 26.6.5 "Interrupt-Window Exiting and Virtual-Interrupt Delivery". 7684 7684 */ 7685 uint32_t const uIntType = VMX_E XIT_INT_INFO_TYPE(pVCpu->hm.s.Event.u64IntInfo);7685 uint32_t const uIntType = VMX_ENTRY_INT_INFO_TYPE(pVCpu->hm.s.Event.u64IntInfo); 7686 7686 #ifdef VBOX_STRICT 7687 if (uIntType == VMX_E XIT_INT_INFO_TYPE_EXT_INT)7687 if (uIntType == VMX_ENTRY_INT_INFO_TYPE_EXT_INT) 7688 7688 { 7689 7689 bool const fBlockInt = !(pCtx->eflags.u32 & X86_EFL_IF); … … 7692 7692 Assert(!fBlockMovSS); 7693 7693 } 7694 else if (uIntType == VMX_E XIT_INT_INFO_TYPE_NMI)7694 else if (uIntType == VMX_ENTRY_INT_INFO_TYPE_NMI) 7695 7695 { 7696 7696 bool const fBlockNmi = RT_BOOL(fIntrState & VMX_VMCS_GUEST_INT_STATE_BLOCK_NMI); … … 7712 7712 fBlockSti = RT_BOOL(fIntrState & VMX_VMCS_GUEST_INT_STATE_BLOCK_STI); 7713 7713 7714 if (uIntType == VMX_E XIT_INT_INFO_TYPE_EXT_INT)7714 if (uIntType == VMX_ENTRY_INT_INFO_TYPE_EXT_INT) 7715 7715 STAM_COUNTER_INC(&pVCpu->hm.s.StatInjectInterrupt); 7716 7716 else … … 7872 7872 PCPUMCTX pCtx = &pVCpu->cpum.GstCtx; 7873 7873 uint32_t u32IntInfo = (uint32_t)u64IntInfo; 7874 uint32_t const uVector = VMX_E XIT_INT_INFO_VECTOR(u32IntInfo);7875 uint32_t const uIntType = VMX_E XIT_INT_INFO_TYPE(u32IntInfo);7874 uint32_t const uVector = VMX_ENTRY_INT_INFO_VECTOR(u32IntInfo); 7875 uint32_t const uIntType = VMX_ENTRY_INT_INFO_TYPE(u32IntInfo); 7876 7876 7877 7877 #ifdef VBOX_STRICT … … 7894 7894 case X86_XCPT_GP: 7895 7895 case X86_XCPT_AC: 7896 AssertMsg(VMX_E XIT_INT_INFO_IS_ERROR_CODE_VALID(u32IntInfo),7896 AssertMsg(VMX_ENTRY_INT_INFO_IS_ERROR_CODE_VALID(u32IntInfo), 7897 7897 ("Error-code-valid bit not set for exception that has an error code uVector=%#x\n", uVector)); 7898 7898 RT_FALL_THRU(); … … 7927 7927 * See Intel spec. 26.2.1.3 "VM-Entry Control Fields". 7928 7928 */ 7929 u32IntInfo &= ~VMX_E XIT_INT_INFO_ERROR_CODE_VALID;7929 u32IntInfo &= ~VMX_ENTRY_INT_INFO_ERROR_CODE_VALID; 7930 7930 } 7931 7931 else … … 7963 7963 /* Software exceptions (#BP and #OF exceptions thrown as a result of INT3 or INTO) */ 7964 7964 uint16_t uGuestIp = pCtx->ip; 7965 if (uIntType == VMX_E XIT_INT_INFO_TYPE_SW_XCPT)7965 if (uIntType == VMX_ENTRY_INT_INFO_TYPE_SW_XCPT) 7966 7966 { 7967 7967 Assert(uVector == X86_XCPT_BP || uVector == X86_XCPT_OF); … … 7969 7969 uGuestIp = pCtx->ip + (uint16_t)cbInstr; 7970 7970 } 7971 else if (uIntType == VMX_E XIT_INT_INFO_TYPE_SW_INT)7971 else if (uIntType == VMX_ENTRY_INT_INFO_TYPE_SW_INT) 7972 7972 uGuestIp = pCtx->ip + (uint16_t)cbInstr; 7973 7973 … … 7994 7994 pCtx->cs.ValidSel = IdtEntry.uSel; 7995 7995 pCtx->cs.u64Base = IdtEntry.uSel << cbIdtEntry; 7996 if ( uIntType == VMX_E XIT_INT_INFO_TYPE_HW_XCPT7996 if ( uIntType == VMX_ENTRY_INT_INFO_TYPE_HW_XCPT 7997 7997 && uVector == X86_XCPT_PF) 7998 7998 pCtx->cr2 = GCPtrFaultAddress; … … 8007 8007 if (*pfIntrState & VMX_VMCS_GUEST_INT_STATE_BLOCK_STI) 8008 8008 { 8009 Assert( uIntType != VMX_E XIT_INT_INFO_TYPE_NMI8010 && uIntType != VMX_E XIT_INT_INFO_TYPE_EXT_INT);8009 Assert( uIntType != VMX_ENTRY_INT_INFO_TYPE_NMI 8010 && uIntType != VMX_ENTRY_INT_INFO_TYPE_EXT_INT); 8011 8011 Log4Func(("Clearing inhibition due to STI\n")); 8012 8012 *pfIntrState &= ~VMX_VMCS_GUEST_INT_STATE_BLOCK_STI; … … 8035 8035 /* Inject. */ 8036 8036 int rc = VMXWriteVmcs32(VMX_VMCS32_CTRL_ENTRY_INTERRUPTION_INFO, u32IntInfo); 8037 if (VMX_E XIT_INT_INFO_IS_ERROR_CODE_VALID(u32IntInfo))8037 if (VMX_ENTRY_INT_INFO_IS_ERROR_CODE_VALID(u32IntInfo)) 8038 8038 rc |= VMXWriteVmcs32(VMX_VMCS32_CTRL_ENTRY_EXCEPTION_ERRCODE, u32ErrCode); 8039 8039 rc |= VMXWriteVmcs32(VMX_VMCS32_CTRL_ENTRY_INSTR_LENGTH, cbInstr); … … 8041 8041 8042 8042 /* Update CR2. */ 8043 if ( VMX_E XIT_INT_INFO_TYPE(u32IntInfo) == VMX_EXIT_INT_INFO_TYPE_HW_XCPT8043 if ( VMX_ENTRY_INT_INFO_TYPE(u32IntInfo) == VMX_EXIT_INT_INFO_TYPE_HW_XCPT 8044 8044 && uVector == X86_XCPT_PF) 8045 8045 pCtx->cr2 = GCPtrFaultAddress;
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