VirtualBox

Changeset 74491 in vbox for trunk/include/VBox


Ignore:
Timestamp:
Sep 27, 2018 11:14:01 AM (6 years ago)
Author:
vboxsync
Message:

VMM: Nested VMX: bugref:9180 Add functions for querying VMX intercept bits spread across pin, processor and secondary-processor
controls.

File:
1 edited

Legend:

Unmodified
Added
Removed

  • trunk/include/VBox/vmm/cpum.h

    r74487 r74491  
    16221622}
    16231623
    1624 #ifndef IN_RC
    1625 
    1626 /**
    1627  * Checks if the nested-guest VMCB has the specified ctrl/instruction intercept
    1628  * active.
    1629  *
    1630  * @returns @c true if in intercept is set, @c false otherwise.
    1631  * @param   pVCpu       The cross context virtual CPU structure of the calling EMT.
    1632  * @param   pCtx        Pointer to the context.
    1633  * @param   fIntercept  The SVM control/instruction intercept, see
    1634  *                      SVM_CTRL_INTERCEPT_*.
    1635  */
    1636 DECLINLINE(bool) CPUMIsGuestSvmCtrlInterceptSet(PVMCPU pVCpu, PCPUMCTX pCtx, uint64_t fIntercept)
    1637 {
    1638     if (pCtx->hwvirt.enmHwvirt != CPUMHWVIRT_SVM)
    1639         return false;
    1640     PCSVMVMCB pVmcb = pCtx->hwvirt.svm.CTX_SUFF(pVmcb); Assert(pVmcb);
    1641     if (HMHasGuestSvmVmcbCached(pVCpu))
    1642         return HMIsGuestSvmCtrlInterceptSet(pVCpu, fIntercept);
    1643     return RT_BOOL(pVmcb->ctrl.u64InterceptCtrl & fIntercept);
    1644 }
    1645 
    1646 /**
    1647  * Checks if the nested-guest VMCB has the specified CR read intercept active.
    1648  *
    1649  * @returns @c true if in intercept is set, @c false otherwise.
    1650  * @param   pVCpu   The cross context virtual CPU structure of the calling EMT.
    1651  * @param   pCtx    Pointer to the context.
    1652  * @param   uCr     The CR register number (0 to 15).
    1653  */
    1654 DECLINLINE(bool) CPUMIsGuestSvmReadCRxInterceptSet(PVMCPU pVCpu, PCCPUMCTX pCtx, uint8_t uCr)
    1655 {
    1656     Assert(uCr < 16);
    1657     if (pCtx->hwvirt.enmHwvirt != CPUMHWVIRT_SVM)
    1658         return false;
    1659     PCSVMVMCB pVmcb = pCtx->hwvirt.svm.CTX_SUFF(pVmcb); Assert(pVmcb);
    1660     if (HMHasGuestSvmVmcbCached(pVCpu))
    1661         return HMIsGuestSvmReadCRxInterceptSet(pVCpu, uCr);
    1662     return RT_BOOL(pVmcb->ctrl.u16InterceptRdCRx & (UINT16_C(1) << uCr));
    1663 }
    1664 
    1665 /**
    1666  * Checks if the nested-guest VMCB has the specified CR write intercept active.
    1667  *
    1668  * @returns @c true if in intercept is set, @c false otherwise.
    1669  * @param   pVCpu   The cross context virtual CPU structure of the calling EMT.
    1670  * @param   pCtx    Pointer to the context.
    1671  * @param   uCr     The CR register number (0 to 15).
    1672  */
    1673 DECLINLINE(bool) CPUMIsGuestSvmWriteCRxInterceptSet(PVMCPU pVCpu, PCCPUMCTX pCtx, uint8_t uCr)
    1674 {
    1675     Assert(uCr < 16);
    1676     if (pCtx->hwvirt.enmHwvirt != CPUMHWVIRT_SVM)
    1677         return false;
    1678     PCSVMVMCB pVmcb = pCtx->hwvirt.svm.CTX_SUFF(pVmcb); Assert(pVmcb);
    1679     if (HMHasGuestSvmVmcbCached(pVCpu))
    1680         return HMIsGuestSvmWriteCRxInterceptSet(pVCpu, uCr);
    1681     return RT_BOOL(pVmcb->ctrl.u16InterceptWrCRx & (UINT16_C(1) << uCr));
    1682 }
    1683 
    1684 /**
    1685  * Checks if the nested-guest VMCB has the specified DR read intercept active.
    1686  *
    1687  * @returns @c true if in intercept is set, @c false otherwise.
    1688  * @param   pVCpu   The cross context virtual CPU structure of the calling EMT.
    1689  * @param   pCtx    Pointer to the context.
    1690  * @param   uDr     The DR register number (0 to 15).
    1691  */
    1692 DECLINLINE(bool) CPUMIsGuestSvmReadDRxInterceptSet(PVMCPU pVCpu, PCCPUMCTX pCtx, uint8_t uDr)
    1693 {
    1694     Assert(uDr < 16);
    1695     if (pCtx->hwvirt.enmHwvirt != CPUMHWVIRT_SVM)
    1696         return false;
    1697     PCSVMVMCB pVmcb = pCtx->hwvirt.svm.CTX_SUFF(pVmcb); Assert(pVmcb);
    1698     if (HMHasGuestSvmVmcbCached(pVCpu))
    1699         return HMIsGuestSvmReadDRxInterceptSet(pVCpu, uDr);
    1700     return RT_BOOL(pVmcb->ctrl.u16InterceptRdDRx & (UINT16_C(1) << uDr));
    1701 }
    1702 
    1703 /**
    1704  * Checks if the nested-guest VMCB has the specified DR write intercept active.
    1705  *
    1706  * @returns @c true if in intercept is set, @c false otherwise.
    1707  * @param   pVCpu   The cross context virtual CPU structure of the calling EMT.
    1708  * @param   pCtx    Pointer to the context.
    1709  * @param   uDr     The DR register number (0 to 15).
    1710  */
    1711 DECLINLINE(bool) CPUMIsGuestSvmWriteDRxInterceptSet(PVMCPU pVCpu, PCCPUMCTX pCtx, uint8_t uDr)
    1712 {
    1713     Assert(uDr < 16);
    1714     if (pCtx->hwvirt.enmHwvirt != CPUMHWVIRT_SVM)
    1715         return false;
    1716     PCSVMVMCB pVmcb = pCtx->hwvirt.svm.CTX_SUFF(pVmcb); Assert(pVmcb);
    1717     if (HMHasGuestSvmVmcbCached(pVCpu))
    1718         return HMIsGuestSvmWriteDRxInterceptSet(pVCpu, uDr);
    1719     return RT_BOOL(pVmcb->ctrl.u16InterceptWrDRx & (UINT16_C(1) << uDr));
    1720 }
    1721 
    1722 /**
    1723  * Checks if the nested-guest VMCB has the specified exception intercept active.
    1724  *
    1725  * @returns @c true if in intercept is active, @c false otherwise.
    1726  * @param   pVCpu       The cross context virtual CPU structure of the calling EMT.
    1727  * @param   pCtx        Pointer to the context.
    1728  * @param   uVector     The exception / interrupt vector.
    1729  */
    1730 DECLINLINE(bool) CPUMIsGuestSvmXcptInterceptSet(PVMCPU pVCpu, PCCPUMCTX pCtx, uint8_t uVector)
    1731 {
    1732     Assert(uVector < 32);
    1733     if (pCtx->hwvirt.enmHwvirt != CPUMHWVIRT_SVM)
    1734         return false;
    1735     PCSVMVMCB pVmcb = pCtx->hwvirt.svm.CTX_SUFF(pVmcb); Assert(pVmcb);
    1736     if (HMHasGuestSvmVmcbCached(pVCpu))
    1737         return HMIsGuestSvmXcptInterceptSet(pVCpu, uVector);
    1738     return RT_BOOL(pVmcb->ctrl.u32InterceptXcpt & (UINT32_C(1) << uVector));
    1739 }
    1740 
    1741 /**
    1742  * Checks if the nested-guest VMCB has virtual-interrupt masking enabled.
    1743  *
    1744  * @returns @c true if virtual-interrupts are masked, @c false otherwise.
    1745  * @param   pVCpu       The cross context virtual CPU structure of the calling EMT.
    1746  * @param   pCtx        Pointer to the context.
    1747  *
    1748  * @remarks Should only be called when SVM feature is exposed to the guest.
    1749  */
    1750 DECLINLINE(bool) CPUMIsGuestSvmVirtIntrMasking(PVMCPU pVCpu, PCCPUMCTX pCtx)
    1751 {
    1752     if (pCtx->hwvirt.enmHwvirt != CPUMHWVIRT_SVM)
    1753         return false;
    1754     PCSVMVMCB pVmcb = pCtx->hwvirt.svm.CTX_SUFF(pVmcb); Assert(pVmcb);
    1755     if (HMHasGuestSvmVmcbCached(pVCpu))
    1756         return HMIsGuestSvmVirtIntrMasking(pVCpu);
    1757     return pVmcb->ctrl.IntCtrl.n.u1VIntrMasking;
    1758 }
    1759 
    1760 /**
    1761  * Checks if the nested-guest VMCB has nested-paging enabled.
    1762  *
    1763  * @returns @c true if nested-paging is enabled, @c false otherwise.
    1764  * @param   pVCpu       The cross context virtual CPU structure of the calling EMT.
    1765  * @param   pCtx        Pointer to the context.
    1766  *
    1767  * @remarks Should only be called when SVM feature is exposed to the guest.
    1768  */
    1769 DECLINLINE(bool) CPUMIsGuestSvmNestedPagingEnabled(PVMCPU pVCpu, PCCPUMCTX pCtx)
    1770 {
    1771     if (pCtx->hwvirt.enmHwvirt != CPUMHWVIRT_SVM)
    1772         return false;
    1773     PCSVMVMCB pVmcb = pCtx->hwvirt.svm.CTX_SUFF(pVmcb); Assert(pVmcb);
    1774     if (HMHasGuestSvmVmcbCached(pVCpu))
    1775         return HMIsGuestSvmNestedPagingEnabled(pVCpu);
    1776     return pVmcb->ctrl.NestedPagingCtrl.n.u1NestedPaging;
    1777 }
    1778 
    1779 /**
    1780  * Gets the nested-guest VMCB pause-filter count.
    1781  *
    1782  * @returns The pause-filter count.
    1783  * @param   pVCpu       The cross context virtual CPU structure of the calling EMT.
    1784  * @param   pCtx        Pointer to the context.
    1785  *
    1786  * @remarks Should only be called when SVM feature is exposed to the guest.
    1787  */
    1788 DECLINLINE(uint16_t) CPUMGetGuestSvmPauseFilterCount(PVMCPU pVCpu, PCCPUMCTX pCtx)
    1789 {
    1790     if (pCtx->hwvirt.enmHwvirt != CPUMHWVIRT_SVM)
    1791         return false;
    1792     PCSVMVMCB pVmcb = pCtx->hwvirt.svm.CTX_SUFF(pVmcb); Assert(pVmcb);
    1793     if (HMHasGuestSvmVmcbCached(pVCpu))
    1794         return HMGetGuestSvmPauseFilterCount(pVCpu);
    1795     return pVmcb->ctrl.u16PauseFilterCount;
    1796 }
    1797 
    1798 /**
    1799  * Updates the NextRIP (NRIP) field in the nested-guest VMCB.
    1800  *
    1801  * @param   pVCpu       The cross context virtual CPU structure of the calling EMT.
    1802  * @param   pCtx        Pointer to the context.
    1803  * @param   cbInstr     The length of the current instruction in bytes.
    1804  *
    1805  * @remarks Should only be called when SVM feature is exposed to the guest.
    1806  */
    1807 DECLINLINE(void) CPUMGuestSvmUpdateNRip(PVMCPU pVCpu, PCCPUMCTX pCtx, uint8_t cbInstr)
    1808 {
    1809     RT_NOREF(pVCpu);
    1810     Assert(pCtx->hwvirt.enmHwvirt == CPUMHWVIRT_SVM);
    1811     PSVMVMCB pVmcb = pCtx->hwvirt.svm.CTX_SUFF(pVmcb);
    1812     Assert(pVmcb);
    1813     pVmcb->ctrl.u64NextRIP = pCtx->rip + cbInstr;
    1814 }
    1815 
    1816 #endif /* !IN_RC */
    1817 
    18181624/**
    18191625 * Checks if we are executing inside an SVM nested hardware-virtualized guest.
    … …  
    18751681#endif
    18761682}
     1683
     1684# ifndef IN_RC
     1685
     1686/**
     1687 * Checks if the nested-guest VMCB has the specified ctrl/instruction intercept
     1688 * active.
     1689 *
     1690 * @returns @c true if in intercept is set, @c false otherwise.
     1691 * @param   pVCpu       The cross context virtual CPU structure of the calling EMT.
     1692 * @param   pCtx        Pointer to the context.
     1693 * @param   fIntercept  The SVM control/instruction intercept, see
     1694 *                      SVM_CTRL_INTERCEPT_*.
     1695 */
     1696DECLINLINE(bool) CPUMIsGuestSvmCtrlInterceptSet(PVMCPU pVCpu, PCPUMCTX pCtx, uint64_t fIntercept)
     1697{
     1698    if (pCtx->hwvirt.enmHwvirt != CPUMHWVIRT_SVM)
     1699        return false;
     1700    PCSVMVMCB pVmcb = pCtx->hwvirt.svm.CTX_SUFF(pVmcb); Assert(pVmcb);
     1701    if (HMHasGuestSvmVmcbCached(pVCpu))
     1702        return HMIsGuestSvmCtrlInterceptSet(pVCpu, fIntercept);
     1703    return RT_BOOL(pVmcb->ctrl.u64InterceptCtrl & fIntercept);
     1704}
     1705
     1706/**
     1707 * Checks if the nested-guest VMCB has the specified CR read intercept active.
     1708 *
     1709 * @returns @c true if in intercept is set, @c false otherwise.
     1710 * @param   pVCpu   The cross context virtual CPU structure of the calling EMT.
     1711 * @param   pCtx    Pointer to the context.
     1712 * @param   uCr     The CR register number (0 to 15).
     1713 */
     1714DECLINLINE(bool) CPUMIsGuestSvmReadCRxInterceptSet(PVMCPU pVCpu, PCCPUMCTX pCtx, uint8_t uCr)
     1715{
     1716    Assert(uCr < 16);
     1717    if (pCtx->hwvirt.enmHwvirt != CPUMHWVIRT_SVM)
     1718        return false;
     1719    PCSVMVMCB pVmcb = pCtx->hwvirt.svm.CTX_SUFF(pVmcb); Assert(pVmcb);
     1720    if (HMHasGuestSvmVmcbCached(pVCpu))
     1721        return HMIsGuestSvmReadCRxInterceptSet(pVCpu, uCr);
     1722    return RT_BOOL(pVmcb->ctrl.u16InterceptRdCRx & (UINT16_C(1) << uCr));
     1723}
     1724
     1725/**
     1726 * Checks if the nested-guest VMCB has the specified CR write intercept active.
     1727 *
     1728 * @returns @c true if in intercept is set, @c false otherwise.
     1729 * @param   pVCpu   The cross context virtual CPU structure of the calling EMT.
     1730 * @param   pCtx    Pointer to the context.
     1731 * @param   uCr     The CR register number (0 to 15).
     1732 */
     1733DECLINLINE(bool) CPUMIsGuestSvmWriteCRxInterceptSet(PVMCPU pVCpu, PCCPUMCTX pCtx, uint8_t uCr)
     1734{
     1735    Assert(uCr < 16);
     1736    if (pCtx->hwvirt.enmHwvirt != CPUMHWVIRT_SVM)
     1737        return false;
     1738    PCSVMVMCB pVmcb = pCtx->hwvirt.svm.CTX_SUFF(pVmcb); Assert(pVmcb);
     1739    if (HMHasGuestSvmVmcbCached(pVCpu))
     1740        return HMIsGuestSvmWriteCRxInterceptSet(pVCpu, uCr);
     1741    return RT_BOOL(pVmcb->ctrl.u16InterceptWrCRx & (UINT16_C(1) << uCr));
     1742}
     1743
     1744/**
     1745 * Checks if the nested-guest VMCB has the specified DR read intercept active.
     1746 *
     1747 * @returns @c true if in intercept is set, @c false otherwise.
     1748 * @param   pVCpu   The cross context virtual CPU structure of the calling EMT.
     1749 * @param   pCtx    Pointer to the context.
     1750 * @param   uDr     The DR register number (0 to 15).
     1751 */
     1752DECLINLINE(bool) CPUMIsGuestSvmReadDRxInterceptSet(PVMCPU pVCpu, PCCPUMCTX pCtx, uint8_t uDr)
     1753{
     1754    Assert(uDr < 16);
     1755    if (pCtx->hwvirt.enmHwvirt != CPUMHWVIRT_SVM)
     1756        return false;
     1757    PCSVMVMCB pVmcb = pCtx->hwvirt.svm.CTX_SUFF(pVmcb); Assert(pVmcb);
     1758    if (HMHasGuestSvmVmcbCached(pVCpu))
     1759        return HMIsGuestSvmReadDRxInterceptSet(pVCpu, uDr);
     1760    return RT_BOOL(pVmcb->ctrl.u16InterceptRdDRx & (UINT16_C(1) << uDr));
     1761}
     1762
     1763/**
     1764 * Checks if the nested-guest VMCB has the specified DR write intercept active.
     1765 *
     1766 * @returns @c true if in intercept is set, @c false otherwise.
     1767 * @param   pVCpu   The cross context virtual CPU structure of the calling EMT.
     1768 * @param   pCtx    Pointer to the context.
     1769 * @param   uDr     The DR register number (0 to 15).
     1770 */
     1771DECLINLINE(bool) CPUMIsGuestSvmWriteDRxInterceptSet(PVMCPU pVCpu, PCCPUMCTX pCtx, uint8_t uDr)
     1772{
     1773    Assert(uDr < 16);
     1774    if (pCtx->hwvirt.enmHwvirt != CPUMHWVIRT_SVM)
     1775        return false;
     1776    PCSVMVMCB pVmcb = pCtx->hwvirt.svm.CTX_SUFF(pVmcb); Assert(pVmcb);
     1777    if (HMHasGuestSvmVmcbCached(pVCpu))
     1778        return HMIsGuestSvmWriteDRxInterceptSet(pVCpu, uDr);
     1779    return RT_BOOL(pVmcb->ctrl.u16InterceptWrDRx & (UINT16_C(1) << uDr));
     1780}
     1781
     1782/**
     1783 * Checks if the nested-guest VMCB has the specified exception intercept active.
     1784 *
     1785 * @returns @c true if in intercept is active, @c false otherwise.
     1786 * @param   pVCpu       The cross context virtual CPU structure of the calling EMT.
     1787 * @param   pCtx        Pointer to the context.
     1788 * @param   uVector     The exception / interrupt vector.
     1789 */
     1790DECLINLINE(bool) CPUMIsGuestSvmXcptInterceptSet(PVMCPU pVCpu, PCCPUMCTX pCtx, uint8_t uVector)
     1791{
     1792    Assert(uVector < 32);
     1793    if (pCtx->hwvirt.enmHwvirt != CPUMHWVIRT_SVM)
     1794        return false;
     1795    PCSVMVMCB pVmcb = pCtx->hwvirt.svm.CTX_SUFF(pVmcb); Assert(pVmcb);
     1796    if (HMHasGuestSvmVmcbCached(pVCpu))
     1797        return HMIsGuestSvmXcptInterceptSet(pVCpu, uVector);
     1798    return RT_BOOL(pVmcb->ctrl.u32InterceptXcpt & (UINT32_C(1) << uVector));
     1799}
     1800
     1801/**
     1802 * Checks if the nested-guest VMCB has virtual-interrupt masking enabled.
     1803 *
     1804 * @returns @c true if virtual-interrupts are masked, @c false otherwise.
     1805 * @param   pVCpu       The cross context virtual CPU structure of the calling EMT.
     1806 * @param   pCtx        Pointer to the context.
     1807 *
     1808 * @remarks Should only be called when SVM feature is exposed to the guest.
     1809 */
     1810DECLINLINE(bool) CPUMIsGuestSvmVirtIntrMasking(PVMCPU pVCpu, PCCPUMCTX pCtx)
     1811{
     1812    if (pCtx->hwvirt.enmHwvirt != CPUMHWVIRT_SVM)
     1813        return false;
     1814    PCSVMVMCB pVmcb = pCtx->hwvirt.svm.CTX_SUFF(pVmcb); Assert(pVmcb);
     1815    if (HMHasGuestSvmVmcbCached(pVCpu))
     1816        return HMIsGuestSvmVirtIntrMasking(pVCpu);
     1817    return pVmcb->ctrl.IntCtrl.n.u1VIntrMasking;
     1818}
     1819
     1820/**
     1821 * Checks if the nested-guest VMCB has nested-paging enabled.
     1822 *
     1823 * @returns @c true if nested-paging is enabled, @c false otherwise.
     1824 * @param   pVCpu       The cross context virtual CPU structure of the calling EMT.
     1825 * @param   pCtx        Pointer to the context.
     1826 *
     1827 * @remarks Should only be called when SVM feature is exposed to the guest.
     1828 */
     1829DECLINLINE(bool) CPUMIsGuestSvmNestedPagingEnabled(PVMCPU pVCpu, PCCPUMCTX pCtx)
     1830{
     1831    if (pCtx->hwvirt.enmHwvirt != CPUMHWVIRT_SVM)
     1832        return false;
     1833    PCSVMVMCB pVmcb = pCtx->hwvirt.svm.CTX_SUFF(pVmcb); Assert(pVmcb);
     1834    if (HMHasGuestSvmVmcbCached(pVCpu))
     1835        return HMIsGuestSvmNestedPagingEnabled(pVCpu);
     1836    return pVmcb->ctrl.NestedPagingCtrl.n.u1NestedPaging;
     1837}
     1838
     1839/**
     1840 * Gets the nested-guest VMCB pause-filter count.
     1841 *
     1842 * @returns The pause-filter count.
     1843 * @param   pVCpu       The cross context virtual CPU structure of the calling EMT.
     1844 * @param   pCtx        Pointer to the context.
     1845 *
     1846 * @remarks Should only be called when SVM feature is exposed to the guest.
     1847 */
     1848DECLINLINE(uint16_t) CPUMGetGuestSvmPauseFilterCount(PVMCPU pVCpu, PCCPUMCTX pCtx)
     1849{
     1850    if (pCtx->hwvirt.enmHwvirt != CPUMHWVIRT_SVM)
     1851        return false;
     1852    PCSVMVMCB pVmcb = pCtx->hwvirt.svm.CTX_SUFF(pVmcb); Assert(pVmcb);
     1853    if (HMHasGuestSvmVmcbCached(pVCpu))
     1854        return HMGetGuestSvmPauseFilterCount(pVCpu);
     1855    return pVmcb->ctrl.u16PauseFilterCount;
     1856}
     1857
     1858/**
     1859 * Updates the NextRIP (NRIP) field in the nested-guest VMCB.
     1860 *
     1861 * @param   pVCpu       The cross context virtual CPU structure of the calling EMT.
     1862 * @param   pCtx        Pointer to the context.
     1863 * @param   cbInstr     The length of the current instruction in bytes.
     1864 *
     1865 * @remarks Should only be called when SVM feature is exposed to the guest.
     1866 */
     1867DECLINLINE(void) CPUMGuestSvmUpdateNRip(PVMCPU pVCpu, PCCPUMCTX pCtx, uint8_t cbInstr)
     1868{
     1869    RT_NOREF(pVCpu);
     1870    Assert(pCtx->hwvirt.enmHwvirt == CPUMHWVIRT_SVM);
     1871    PSVMVMCB pVmcb = pCtx->hwvirt.svm.CTX_SUFF(pVmcb);
     1872    Assert(pVmcb);
     1873    pVmcb->ctrl.u64NextRIP = pCtx->rip + cbInstr;
     1874}
     1875
     1876/**
     1877 * Checks whether the given Pin-based VM-execution controls are set.
     1878 *
     1879 * @returns @c true if set, @c false otherwise.
     1880 * @param   pVCpu       The cross context virtual CPU structure of the calling EMT.
     1881 * @param   pCtx        Pointer to the context.
     1882 * @param   uPinCtl     The Pin-based VM-execution controls to check.
     1883 */
     1884DECLINLINE(bool) CPUMIsGuestVmxPinCtlsSet(PVMCPU pVCpu, PCCPUMCTX pCtx, uint32_t uPinCtl)
     1885{
     1886    RT_NOREF(pVCpu);
     1887    if (pCtx->hwvirt.enmHwvirt != CPUMHWVIRT_VMX)
     1888        return false;
     1889    Assert(pCtx->hwvirt.vmx.fInVmxNonRootMode);
     1890    Assert(pCtx->hwvirt.vmx.CTX_SUFF(pVmcs));
     1891    return RT_BOOL(pCtx->hwvirt.vmx.CTX_SUFF(pVmcs)->u32PinCtls & uPinCtl);
     1892}
     1893
     1894/**
     1895 * Checks whether the given Processor-based VM-execution controls are set.
     1896 *
     1897 * @returns @c true if set, @c false otherwise.
     1898 * @param   pVCpu       The cross context virtual CPU structure of the calling EMT.
     1899 * @param   pCtx        Pointer to the context.
     1900 * @param   uPinCtl     The Processor-based VM-execution controls to check.
     1901 */
     1902DECLINLINE(bool) CPUMIsGuestVmxProcCtlsSet(PVMCPU pVCpu, PCCPUMCTX pCtx, uint32_t uProcCtls)
     1903{
     1904    RT_NOREF(pVCpu);
     1905    if (pCtx->hwvirt.enmHwvirt != CPUMHWVIRT_VMX)
     1906        return false;
     1907    Assert(pCtx->hwvirt.vmx.fInVmxNonRootMode);
     1908    Assert(pCtx->hwvirt.vmx.CTX_SUFF(pVmcs));
     1909    return RT_BOOL(pCtx->hwvirt.vmx.CTX_SUFF(pVmcs)->u32ProcCtls & uProcCtls);
     1910}
     1911
     1912/**
     1913 * Checks whether the given Secondary Processor-based VM-execution controls are set.
     1914 *
     1915 * @returns @c true if set, @c false otherwise.
     1916 * @param   pVCpu       The cross context virtual CPU structure of the calling EMT.
     1917 * @param   pCtx        Pointer to the context.
     1918 * @param   uPinCtl     The Secondary Processor-based VM-execution controls to
     1919 *                      check.
     1920 */
     1921DECLINLINE(bool) CPUMIsGuestVmxProcCtls2Set(PVMCPU pVCpu, PCCPUMCTX pCtx, uint32_t uProcCtls2)
     1922{
     1923    RT_NOREF(pVCpu);
     1924    if (pCtx->hwvirt.enmHwvirt != CPUMHWVIRT_VMX)
     1925        return false;
     1926    Assert(pCtx->hwvirt.vmx.fInVmxNonRootMode);
     1927    Assert(pCtx->hwvirt.vmx.CTX_SUFF(pVmcs));
     1928    return RT_BOOL(pCtx->hwvirt.vmx.CTX_SUFF(pVmcs)->u32ProcCtls2 & uProcCtls2);
     1929}
     1930
     1931# endif /* !IN_RC */
    18771932
    18781933#endif /* IPRT_WITHOUT_NAMED_UNIONS_AND_STRUCTS */
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