- Timestamp:
- Oct 1, 2018 10:08:21 AM (6 years ago)
- Location:
- trunk
- Files:
-
- 4 edited
-
include/VBox/vmm/hm.h (modified) (1 diff)
-
include/VBox/vmm/hm_vmx.h (modified) (1 diff)
-
src/VBox/VMM/VMMAll/HMVMXAll.cpp (modified) (1 diff)
-
src/VBox/VMM/VMMR0/HMVMXR0.cpp (modified) (6 diffs)
Legend:
- Unmodified
- Added
- Removed
-
trunk/include/VBox/vmm/hm.h
r74389 r74545 150 150 VMM_INT_DECL(int) HMVmxEntryIntInfoInjectTrpmEvent(PVMCPU pVCpu, uint32_t uEntryIntInfo, uint32_t uErrCode, 151 151 uint32_t cbInstr, RTGCUINTPTR GCPtrFaultAddress); 152 VMM_INT_DECL(int) HMVmxGetMsrPermission(void *pvMsrBitmap, uint32_t idMsr, PVMXMSREXITREAD penmRead, 153 PVMXMSREXITWRITE penmWrite); 152 154 /** @} */ 153 155 -
trunk/include/VBox/vmm/hm_vmx.h
r74542 r74545 1051 1051 /** @} */ 1052 1052 1053 /** 1054 * VMX MSR-bitmap read permissions. 1055 */ 1056 typedef enum VMXMSREXITREAD 1057 { 1058 /** Reading this MSR causes a VM-exit. */ 1059 VMXMSREXIT_INTERCEPT_READ = 1, 1060 /** Reading this MSR doesn't cause a VM-exit. */ 1061 VMXMSREXIT_PASSTHRU_READ 1062 } VMXMSREXITREAD; 1063 /** Pointer to MSR-bitmap read permissions. */ 1064 typedef VMXMSREXITREAD* PVMXMSREXITREAD; 1065 1066 /** 1067 * VMX MSR-bitmap write permissions. 1068 */ 1069 typedef enum VMXMSREXITWRITE 1070 { 1071 /** Writing to this MSR causes a VM-exit. */ 1072 VMXMSREXIT_INTERCEPT_WRITE = 3, 1073 /** Writing to this MSR does not cause a VM-exit. */ 1074 VMXMSREXIT_PASSTHRU_WRITE 1075 } VMXMSREXITWRITE; 1076 /** Pointer to MSR-bitmap write permissions. */ 1077 typedef VMXMSREXITWRITE* PVMXMSREXITWRITE; 1053 1078 1054 1079 /** -
trunk/src/VBox/VMM/VMMAll/HMVMXAll.cpp
r74542 r74545 878 878 } 879 879 880 881 /** 882 * Gets the permission bits for the specified MSR in the specified MSR bitmap. 883 * 884 * @returns VBox status code. 885 * @param pvMsrBitmap Pointer to the MSR bitmap. 886 * @param idMsr The MSR. 887 * @param penmRead Where to store the read permissions. Optional, can be 888 * NULL. 889 * @param penmWrite Where to store the write permissions. Optional, can be 890 * NULL. 891 */ 892 VMM_INT_DECL(int) HMVmxGetMsrPermission(void *pvMsrBitmap, uint32_t idMsr, PVMXMSREXITREAD penmRead, 893 PVMXMSREXITWRITE penmWrite) 894 { 895 AssertPtrReturn(pvMsrBitmap, VERR_INVALID_PARAMETER); 896 897 int32_t iBit; 898 uint8_t *pbMsrBitmap = (uint8_t *)pvMsrBitmap; 899 900 /* 901 * MSR Layout: 902 * Byte index MSR range Interpreted as 903 * 0x000 - 0x3ff 0x00000000 - 0x00001fff Low MSR read bits. 904 * 0x400 - 0x7ff 0xc0000000 - 0xc0001fff High MSR read bits. 905 * 0x800 - 0xbff 0x00000000 - 0x00001fff Low MSR write bits. 906 * 0xc00 - 0xfff 0xc0000000 - 0xc0001fff High MSR write bits. 907 * 908 * A bit corresponding to an MSR within the above range causes a VM-exit 909 * if the bit is 1 on executions of RDMSR/WRMSR. 910 * 911 * If an MSR falls out of the MSR range, it always cause a VM-exit. 912 * 913 * See Intel spec. 24.6.9 "MSR-Bitmap Address". 914 */ 915 if (idMsr <= 0x00001fff) 916 iBit = idMsr; 917 else if ( idMsr >= 0xc0000000 918 && idMsr <= 0xc0001fff) 919 { 920 iBit = (idMsr - 0xc0000000); 921 pbMsrBitmap += 0x400; 922 } 923 else 924 { 925 if (penmRead) 926 *penmRead = VMXMSREXIT_INTERCEPT_READ; 927 if (penmWrite) 928 *penmWrite = VMXMSREXIT_INTERCEPT_WRITE; 929 Log(("HMVmxGetMsrPermission: Warning! Out of range MSR %#RX32\n", idMsr)); 930 return VINF_SUCCESS; 931 } 932 933 /* Validate the MSR bit position. */ 934 Assert(iBit <= 0x1fff); 935 936 /* Get the MSR read permissions. */ 937 if (penmRead) 938 { 939 if (ASMBitTest(pbMsrBitmap, iBit)) 940 *penmRead = VMXMSREXIT_INTERCEPT_READ; 941 else 942 *penmRead = VMXMSREXIT_PASSTHRU_READ; 943 } 944 945 /* Get the MSR write permissions. */ 946 if (penmWrite) 947 { 948 if (ASMBitTest(pbMsrBitmap + 0x800, iBit)) 949 *penmWrite = VMXMSREXIT_INTERCEPT_WRITE; 950 else 951 *penmWrite = VMXMSREXIT_PASSTHRU_WRITE; 952 } 953 954 return VINF_SUCCESS; 955 } 956 -
trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp
r74489 r74545 310 310 /** Pointer to VMX transient state. */ 311 311 typedef VMXTRANSIENT *PVMXTRANSIENT; 312 313 /**314 * MSR-bitmap read permissions.315 */316 typedef enum VMXMSREXITREAD317 {318 /** Reading this MSR causes a VM-exit. */319 VMXMSREXIT_INTERCEPT_READ = 0xb,320 /** Reading this MSR does not cause a VM-exit. */321 VMXMSREXIT_PASSTHRU_READ322 } VMXMSREXITREAD;323 /** Pointer to MSR-bitmap read permissions. */324 typedef VMXMSREXITREAD* PVMXMSREXITREAD;325 326 /**327 * MSR-bitmap write permissions.328 */329 typedef enum VMXMSREXITWRITE330 {331 /** Writing to this MSR causes a VM-exit. */332 VMXMSREXIT_INTERCEPT_WRITE = 0xd,333 /** Writing to this MSR does not cause a VM-exit. */334 VMXMSREXIT_PASSTHRU_WRITE335 } VMXMSREXITWRITE;336 /** Pointer to MSR-bitmap write permissions. */337 typedef VMXMSREXITWRITE* PVMXMSREXITWRITE;338 312 339 313 /** … … 1202 1176 1203 1177 /* 1204 * Layout: 1205 * 0x000 - 0x3ff - Low MSR read bits 1206 * 0x400 - 0x7ff - High MSR read bits 1207 * 0x800 - 0xbff - Low MSR write bits 1208 * 0xc00 - 0xfff - High MSR write bits 1178 * MSR Layout: 1179 * Byte index MSR range Interpreted as 1180 * 0x000 - 0x3ff 0x00000000 - 0x00001fff Low MSR read bits. 1181 * 0x400 - 0x7ff 0xc0000000 - 0xc0001fff High MSR read bits. 1182 * 0x800 - 0xbff 0x00000000 - 0x00001fff Low MSR write bits. 1183 * 0xc00 - 0xfff 0xc0000000 - 0xc0001fff High MSR write bits. 1184 * 1185 * A bit corresponding to an MSR within the above range causes a VM-exit 1186 * if the bit is 1 on executions of RDMSR/WRMSR. 1187 * 1188 * If an MSR falls out of the MSR range, it always cause a VM-exit. 1189 * 1190 * See Intel spec. 24.6.9 "MSR-Bitmap Address". 1209 1191 */ 1210 1192 if (uMsr <= 0x00001fff) … … 1229 1211 ASMBitClear(pbMsrBitmap + 0x800, iBit); 1230 1212 } 1231 1232 1233 #ifdef VBOX_STRICT1234 /**1235 * Gets the permission bits for the specified MSR in the MSR bitmap.1236 *1237 * @returns VBox status code.1238 * @retval VINF_SUCCESS if the specified MSR is found.1239 * @retval VERR_NOT_FOUND if the specified MSR is not found.1240 * @retval VERR_NOT_SUPPORTED if VT-x doesn't allow the MSR.1241 *1242 * @param pVCpu The cross context virtual CPU structure.1243 * @param uMsr The MSR.1244 * @param penmRead Where to store the read permissions.1245 * @param penmWrite Where to store the write permissions.1246 */1247 static int hmR0VmxGetMsrPermission(PVMCPU pVCpu, uint32_t uMsr, PVMXMSREXITREAD penmRead, PVMXMSREXITWRITE penmWrite)1248 {1249 AssertPtrReturn(penmRead, VERR_INVALID_PARAMETER);1250 AssertPtrReturn(penmWrite, VERR_INVALID_PARAMETER);1251 int32_t iBit;1252 uint8_t *pbMsrBitmap = (uint8_t *)pVCpu->hm.s.vmx.pvMsrBitmap;1253 1254 /* See hmR0VmxSetMsrPermission() for the layout. */1255 if (uMsr <= 0x00001fff)1256 iBit = uMsr;1257 else if ( uMsr >= 0xc00000001258 && uMsr <= 0xc0001fff)1259 {1260 iBit = (uMsr - 0xc0000000);1261 pbMsrBitmap += 0x400;1262 }1263 else1264 AssertMsgFailedReturn(("hmR0VmxGetMsrPermission: Invalid MSR %#RX32\n", uMsr), VERR_NOT_SUPPORTED);1265 1266 Assert(iBit <= 0x1fff);1267 if (ASMBitTest(pbMsrBitmap, iBit))1268 *penmRead = VMXMSREXIT_INTERCEPT_READ;1269 else1270 *penmRead = VMXMSREXIT_PASSTHRU_READ;1271 1272 if (ASMBitTest(pbMsrBitmap + 0x800, iBit))1273 *penmWrite = VMXMSREXIT_INTERCEPT_WRITE;1274 else1275 *penmWrite = VMXMSREXIT_PASSTHRU_WRITE;1276 return VINF_SUCCESS;1277 }1278 #endif /* VBOX_STRICT */1279 1213 1280 1214 … … 1782 1716 VMXMSREXITREAD enmRead; 1783 1717 VMXMSREXITWRITE enmWrite; 1784 rc = hmR0VmxGetMsrPermission(pVCpu, pGuestMsr->u32Msr, &enmRead, &enmWrite);1785 AssertMsgReturnVoid(rc == VINF_SUCCESS, (" hmR0VmxGetMsrPermission! failed. rc=%Rrc\n", rc));1718 rc = HMVmxGetMsrPermission(pVCpu->hm.s.vmx.pvMsrBitmap, pGuestMsr->u32Msr, &enmRead, &enmWrite); 1719 AssertMsgReturnVoid(rc == VINF_SUCCESS, ("HMVmxGetMsrPermission! failed. rc=%Rrc\n", rc)); 1786 1720 if (pGuestMsr->u32Msr == MSR_K6_EFER) 1787 1721 { … … 12002 11936 VMXMSREXITREAD enmRead; 12003 11937 VMXMSREXITWRITE enmWrite; 12004 int rc2 = hmR0VmxGetMsrPermission(pVCpu, idMsr, &enmRead, &enmWrite);11938 int rc2 = HMVmxGetMsrPermission(pVCpu->hm.s.vmx.pvMsrBitmap, idMsr, &enmRead, &enmWrite); 12005 11939 AssertRCReturn(rc2, rc2); 12006 11940 if (enmRead == VMXMSREXIT_PASSTHRU_READ) … … 12134 12068 VMXMSREXITREAD enmRead; 12135 12069 VMXMSREXITWRITE enmWrite; 12136 int rc2 = hmR0VmxGetMsrPermission(pVCpu, idMsr, &enmRead, &enmWrite);12070 int rc2 = HMVmxGetMsrPermission(pVCpu->hm.s.vmx.pvMsrBitmap, idMsr, &enmRead, &enmWrite); 12137 12071 AssertRCReturn(rc2, rc2); 12138 12072 if (enmWrite == VMXMSREXIT_PASSTHRU_WRITE)
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