VirtualBox

Changeset 74607 in vbox for trunk/src


Ignore:
Timestamp:
Oct 4, 2018 10:11:44 AM (6 years ago)
Author:
vboxsync
Message:

VMM/IEM: Nested VMX: bugref:9180 VM-exit bits; Mov to CR0 intercept.

Location:
trunk/src/VBox/VMM/VMMAll
Files:
2 edited

Legend:

Unmodified
Added
Removed

  • trunk/src/VBox/VMM/VMMAll/IEMAllCImpl.cpp.h

    r74605 r74607  
    57195719 *
    57205720 * @param   iCrReg          The CRx register to write (valid).
    5721  * @param   iGReg           The general register to load the DRx value from.
     5721 * @param   iGReg           The general register to load the CRx value from.
    57225722 */
    57235723IEM_CIMPL_DEF_2(iemCImpl_mov_Cd_Rd, uint8_t, iCrReg, uint8_t, iGReg)
    … …  
    57355735    else
    57365736        uNewCrX = iemGRegFetchU32(pVCpu, iGReg);
     5737
     5738#ifdef VBOX_WITH_NESTED_HWVIRT_VMX
     5739    if (IEM_VMX_IS_NON_ROOT_MODE(pVCpu))
     5740    {
     5741        if (iCrReg == 0)
     5742        {
     5743            IEM_CTX_ASSERT(pVCpu, CPUMCTX_EXTRN_CR0);
     5744            VBOXSTRICTRC rcStrict = iemVmxVmexitInstrMovCr0Write(pVCpu, pVCpu->cpum.GstCtx.cr0, &uNewCrX, iGReg, cbInstr);
     5745            if (rcStrict != VINF_VMX_INTERCEPT_NOT_ACTIVE)
     5746                return rcStrict;
     5747        }
     5748    }
     5749#endif
     5750
    57375751    return IEM_CIMPL_CALL_4(iemCImpl_load_CrX, iCrReg, uNewCrX, IEMACCESSCRX_MOV_CRX, iGReg);
    57385752}

  • trunk/src/VBox/VMM/VMMAll/IEMAllCImplVmxInstr.cpp.h

    r74605 r74607  
    13001300 *
    13011301 * @param   pVCpu       The cross context virtual CPU structure.
    1302  * @param   cbInstr     The VM-exit instruction length (in bytes).
     1302 * @param   cbInstr     The VM-exit instruction length in bytes.
    13031303 */
    13041304DECL_FORCE_INLINE(void) iemVmxVmcsSetExitInstrLen(PVMCPU pVCpu, uint32_t cbInstr)
    … …  
    26452645 * @param   pVCpu           The cross context virtual CPU structure.
    26462646 * @param   uExitReason     The VM-exit reason.
    2647  * @param   cbInstr         The instruction length (in bytes).
     2647 * @param   cbInstr         The instruction length in bytes.
    26482648 */
    26492649IEM_STATIC VBOXSTRICTRC iemVmxVmexitInstr(PVMCPU pVCpu, uint32_t uExitReason, uint8_t cbInstr)
    … …  
    26912691 * @param   uExitReason     The VM-exit reason.
    26922692 * @param   uInstrid        The instruction identity (VMXINSTRID_XXX).
    2693  * @param   cbInstr         The instruction length (in bytes).
     2693 * @param   cbInstr         The instruction length in bytes.
    26942694 *
    26952695 * @remarks Do not use this for INS/OUTS instruction.
    … …  
    27492749 * @param   pVCpu           The cross context virtual CPU structure.
    27502750 * @param   GCPtrPage       The guest-linear address of the page being invalidated.
    2751  * @param   cbInstr         The instruction length (in bytes).
     2751 * @param   cbInstr         The instruction length in bytes.
    27522752 */
    27532753IEM_STATIC VBOXSTRICTRC iemVmxVmexitInstrInvlpg(PVMCPU pVCpu, RTGCPTR GCPtrPage, uint8_t cbInstr)
    … …  
    27762776 *                          of a memory operand. For register operand, pass
    27772777 *                          NIL_RTGCPTR.
    2778  * @param   cbInstr         The instruction length (in bytes).
     2778 * @param   cbInstr         The instruction length in bytes.
    27792779 */
    27802780IEM_STATIC VBOXSTRICTRC iemVmxVmexitInstrLmsw(PVMCPU pVCpu, uint32_t uGuestCr0, uint16_t *pu16NewMsw, RTGCPTR GCPtrEffDst,
    … …  
    28642864 *
    28652865 * @param   pVCpu           The cross context virtual CPU structure.
    2866  * @param   cbInstr         The instruction length (in bytes).
     2866 * @param   cbInstr         The instruction length in bytes.
    28672867 */
    28682868IEM_STATIC VBOXSTRICTRC iemVmxVmexitInstrClts(PVMCPU pVCpu, uint8_t cbInstr)
    … …  
    29052905     * and may modify CR0.TS (subject to CR0 fixed bits in VMX operation).
    29062906     */
     2907    return VINF_VMX_INTERCEPT_NOT_ACTIVE;
     2908}
     2909
     2910
     2911/**
     2912 * VMX VM-exit handler for VM-exits due to 'Mov CR0, GReg' (CR0 write).
     2913 *
     2914 * @returns Strict VBox status code.
     2915 * @param   pVCpu           The cross context virtual CPU structure.
     2916 * @param   puNewCr0        Pointer to the new CR0 value. Will be updated if no
     2917 *                          VM-exit is triggered.
     2918 * @param   iGReg           The general register to load the CR0 value from.
     2919 * @param   cbInstr         The instruction length in bytes.
     2920 */
     2921IEM_STATIC VBOXSTRICTRC iemVmxVmexitInstrMovCr0Write(PVMCPU pVCpu, uint64_t uGuestCr0, uint64_t *puNewCr0, uint8_t iGReg,
     2922                                                     uint8_t cbInstr)
     2923{
     2924    PCVMXVVMCS pVmcs = pVCpu->cpum.GstCtx.hwvirt.vmx.CTX_SUFF(pVmcs);
     2925    Assert(pVmcs);
     2926    Assert(puNewCr0);
     2927
     2928    uint32_t const fGstHostMask = pVmcs->u64Cr0Mask.u;
     2929    uint32_t const fReadShadow  = pVmcs->u64Cr0ReadShadow.u;
     2930
     2931    /*
     2932     * For any CR0 bit owned by the host (in the CR0 guest/host mask), if the
     2933     * corresponding bits differ between the source operand and the read-shadow,
     2934     * we must cause a VM-exit.
     2935     *
     2936     * See Intel spec. 25.1.3 "Instructions That Cause VM Exits Conditionally".
     2937     */
     2938    if ((fReadShadow & fGstHostMask) != (*puNewCr0 & fGstHostMask))
     2939    {
     2940        Log2(("mov_Cr_Rd: Guest intercept -> VM-exit\n"));
     2941
     2942        VMXVEXITINFO ExitInfo;
     2943        RT_ZERO(ExitInfo);
     2944        ExitInfo.uReason = VMX_EXIT_MOV_CRX;
     2945        ExitInfo.cbInstr = cbInstr;
     2946
     2947        ExitInfo.u64Qual = RT_BF_MAKE(VMX_BF_EXIT_QUAL_CRX_REGISTER, 0) /* CR0 */
     2948                         | RT_BF_MAKE(VMX_BF_EXIT_QUAL_CRX_ACCESS,   VMX_EXIT_QUAL_CRX_ACCESS_WRITE)
     2949                         | RT_BF_MAKE(VMX_BF_EXIT_QUAL_CRX_GENREG,   iGReg);
     2950        return iemVmxVmexitInstrWithInfo(pVCpu, &ExitInfo);
     2951    }
     2952
     2953    /*
     2954     * If Mov-to-CR0 did not cause a VM-exit, any bits owned by the host must not
     2955     * be modified the instruction.
     2956     *
     2957     * See Intel Spec. 25.3 "Changes To Instruction Behavior In VMX Non-root Operation".
     2958     */
     2959    *puNewCr0 = (uGuestCr0 & fGstHostMask) | (*puNewCr0 & ~fGstHostMask);
     2960
    29072961    return VINF_VMX_INTERCEPT_NOT_ACTIVE;
    29082962}
    … …  
    48624916 * @returns Strict VBox status code.
    48634917 * @param   pVCpu           The cross context virtual CPU structure.
    4864  * @param   cbInstr         The instruction length.
     4918 * @param   cbInstr         The instruction length in bytes.
    48654919 * @param   uInstrId        The instruction identity (VMXINSTRID_VMLAUNCH or
    48664920 *                          VMXINSTRID_VMRESUME).
    … …  
    51395193 * @returns Strict VBox status code.
    51405194 * @param   pVCpu           The cross context virtual CPU structure.
    5141  * @param   cbInstr         The instruction length.
     5195 * @param   cbInstr         The instruction length in bytes.
    51425196 * @param   pu64Dst         Where to write the VMCS value (only updated when
    51435197 *                          VINF_SUCCESS is returned).
    … …  
    52455299 * @returns Strict VBox status code.
    52465300 * @param   pVCpu           The cross context virtual CPU structure.
    5247  * @param   cbInstr         The instruction length.
     5301 * @param   cbInstr         The instruction length in bytes.
    52485302 * @param   pu64Dst         Where to store the VMCS field's value.
    52495303 * @param   u64FieldEnc     The VMCS field encoding.
    … …  
    52715325 * @returns Strict VBox status code.
    52725326 * @param   pVCpu           The cross context virtual CPU structure.
    5273  * @param   cbInstr         The instruction length.
     5327 * @param   cbInstr         The instruction length in bytes.
    52745328 * @param   pu32Dst         Where to store the VMCS field's value.
    52755329 * @param   u32FieldEnc     The VMCS field encoding.
    … …  
    52995353 * @returns Strict VBox status code.
    53005354 * @param   pVCpu           The cross context virtual CPU structure.
    5301  * @param   cbInstr         The instruction length.
     5355 * @param   cbInstr         The instruction length in bytes.
    53025356 * @param   iEffSeg         The effective segment register to use with @a u64Val.
    53035357 *                          Pass UINT8_MAX if it is a register access.
    … …  
    53525406 * @returns Strict VBox status code.
    53535407 * @param   pVCpu           The cross context virtual CPU structure.
    5354  * @param   cbInstr         The instruction length.
     5408 * @param   cbInstr         The instruction length in bytes.
    53555409 * @param   iEffSeg         The effective segment register to use with @a u64Val.
    53565410 *                          Pass UINT8_MAX if it is a register access.
    … …  
    55025556 * @returns Strict VBox status code.
    55035557 * @param   pVCpu           The cross context virtual CPU structure.
    5504  * @param   cbInstr         The instruction length.
     5558 * @param   cbInstr         The instruction length in bytes.
    55055559 * @param   iEffSeg         The effective segment register to use with @a GCPtrVmcs.
    55065560 * @param   GCPtrVmcs       The linear address of the VMCS pointer.
    … …  
    56165670 * @returns Strict VBox status code.
    56175671 * @param   pVCpu           The cross context virtual CPU structure.
    5618  * @param   cbInstr         The instruction length.
     5672 * @param   cbInstr         The instruction length in bytes.
    56195673 * @param   iEffSeg         The effective segment register to use with @a GCPtrVmcs.
    56205674 * @param   GCPtrVmcs       The linear address of where to store the current VMCS
    … …  
    56685722 * @returns Strict VBox status code.
    56695723 * @param   pVCpu           The cross context virtual CPU structure.
    5670  * @param   cbInstr         The instruction length.
     5724 * @param   cbInstr         The instruction length in bytes.
    56715725 * @param   GCPtrVmcs       The linear address of the current VMCS pointer.
    56725726 * @param   pExitInfo       Pointer to the VM-exit information struct. Optional, can
    … …  
    58035857 * @returns Strict VBox status code.
    58045858 * @param   pVCpu           The cross context virtual CPU structure.
    5805  * @param   cbInstr         The instruction length.
     5859 * @param   cbInstr         The instruction length in bytes.
    58065860 * @param   iEffSeg         The effective segment register to use with @a
    58075861 *                          GCPtrVmxon.
Note: See TracChangeset for help on using the changeset viewer.

© 2024 Oracle Support Privacy / Do Not Sell My Info Terms of Use Trademark Policy Automated Access Etiquette