VirtualBox

Changeset 74678 in vbox for trunk/src


Ignore:
Timestamp:
Oct 8, 2018 12:56:58 PM (6 years ago)
Author:
vboxsync
Message:

VMM/IEM: Nested VMX: bugref:9180 Use RT_UOFFSETOF rather than RT_OFFSETOF here.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/src/VBox/VMM/VMMAll/IEMAllCImplVmxInstr.cpp.h

    r74669 r74678  
    6969    /* VMX_VMCS_ENC_WIDTH_16BIT | VMX_VMCS_ENC_TYPE_CONTROL: */
    7070    {
    71         /*     0 */ RT_OFFSETOF(VMXVVMCS, u16Vpid),
    72         /*     1 */ RT_OFFSETOF(VMXVVMCS, u16PostIntNotifyVector),
    73         /*     2 */ RT_OFFSETOF(VMXVVMCS, u16EptpIndex),
     71        /*     0 */ RT_UOFFSETOF(VMXVVMCS, u16Vpid),
     72        /*     1 */ RT_UOFFSETOF(VMXVVMCS, u16PostIntNotifyVector),
     73        /*     2 */ RT_UOFFSETOF(VMXVVMCS, u16EptpIndex),
    7474        /*  3-10 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
    7575        /* 11-18 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
     
    8585    /* VMX_VMCS_ENC_WIDTH_16BIT | VMX_VMCS_ENC_TYPE_GUEST_STATE: */
    8686    {
    87         /*     0 */ RT_OFFSETOF(VMXVVMCS, GuestEs),
    88         /*     1 */ RT_OFFSETOF(VMXVVMCS, GuestCs),
    89         /*     2 */ RT_OFFSETOF(VMXVVMCS, GuestSs),
    90         /*     3 */ RT_OFFSETOF(VMXVVMCS, GuestDs),
    91         /*     4 */ RT_OFFSETOF(VMXVVMCS, GuestFs),
    92         /*     5 */ RT_OFFSETOF(VMXVVMCS, GuestGs),
    93         /*     6 */ RT_OFFSETOF(VMXVVMCS, GuestLdtr),
    94         /*     7 */ RT_OFFSETOF(VMXVVMCS, GuestTr),
    95         /*     8 */ RT_OFFSETOF(VMXVVMCS, u16GuestIntStatus),
    96         /*     9 */ RT_OFFSETOF(VMXVVMCS, u16PmlIndex),
     87        /*     0 */ RT_UOFFSETOF(VMXVVMCS, GuestEs),
     88        /*     1 */ RT_UOFFSETOF(VMXVVMCS, GuestCs),
     89        /*     2 */ RT_UOFFSETOF(VMXVVMCS, GuestSs),
     90        /*     3 */ RT_UOFFSETOF(VMXVVMCS, GuestDs),
     91        /*     4 */ RT_UOFFSETOF(VMXVVMCS, GuestFs),
     92        /*     5 */ RT_UOFFSETOF(VMXVVMCS, GuestGs),
     93        /*     6 */ RT_UOFFSETOF(VMXVVMCS, GuestLdtr),
     94        /*     7 */ RT_UOFFSETOF(VMXVVMCS, GuestTr),
     95        /*     8 */ RT_UOFFSETOF(VMXVVMCS, u16GuestIntStatus),
     96        /*     9 */ RT_UOFFSETOF(VMXVVMCS, u16PmlIndex),
    9797        /* 10-17 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
    9898        /* 18-25 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX
     
    100100    /* VMX_VMCS_ENC_WIDTH_16BIT | VMX_VMCS_ENC_TYPE_HOST_STATE: */
    101101    {
    102         /*     0 */ RT_OFFSETOF(VMXVVMCS, HostEs),
    103         /*     1 */ RT_OFFSETOF(VMXVVMCS, HostCs),
    104         /*     2 */ RT_OFFSETOF(VMXVVMCS, HostSs),
    105         /*     3 */ RT_OFFSETOF(VMXVVMCS, HostDs),
    106         /*     4 */ RT_OFFSETOF(VMXVVMCS, HostFs),
    107         /*     5 */ RT_OFFSETOF(VMXVVMCS, HostGs),
    108         /*     6 */ RT_OFFSETOF(VMXVVMCS, HostTr),
     102        /*     0 */ RT_UOFFSETOF(VMXVVMCS, HostEs),
     103        /*     1 */ RT_UOFFSETOF(VMXVVMCS, HostCs),
     104        /*     2 */ RT_UOFFSETOF(VMXVVMCS, HostSs),
     105        /*     3 */ RT_UOFFSETOF(VMXVVMCS, HostDs),
     106        /*     4 */ RT_UOFFSETOF(VMXVVMCS, HostFs),
     107        /*     5 */ RT_UOFFSETOF(VMXVVMCS, HostGs),
     108        /*     6 */ RT_UOFFSETOF(VMXVVMCS, HostTr),
    109109        /*  7-14 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
    110110        /* 15-22 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
     
    113113    /* VMX_VMCS_ENC_WIDTH_64BIT | VMX_VMCS_ENC_TYPE_CONTROL: */
    114114    {
    115         /*     0 */ RT_OFFSETOF(VMXVVMCS, u64AddrIoBitmapA),
    116         /*     1 */ RT_OFFSETOF(VMXVVMCS, u64AddrIoBitmapB),
    117         /*     2 */ RT_OFFSETOF(VMXVVMCS, u64AddrMsrBitmap),
    118         /*     3 */ RT_OFFSETOF(VMXVVMCS, u64AddrExitMsrStore),
    119         /*     4 */ RT_OFFSETOF(VMXVVMCS, u64AddrExitMsrLoad),
    120         /*     5 */ RT_OFFSETOF(VMXVVMCS, u64AddrEntryMsrLoad),
    121         /*     6 */ RT_OFFSETOF(VMXVVMCS, u64ExecVmcsPtr),
    122         /*     7 */ RT_OFFSETOF(VMXVVMCS, u64AddrPml),
    123         /*     8 */ RT_OFFSETOF(VMXVVMCS, u64TscOffset),
    124         /*     9 */ RT_OFFSETOF(VMXVVMCS, u64AddrVirtApic),
    125         /*    10 */ RT_OFFSETOF(VMXVVMCS, u64AddrApicAccess),
    126         /*    11 */ RT_OFFSETOF(VMXVVMCS, u64AddrPostedIntDesc),
    127         /*    12 */ RT_OFFSETOF(VMXVVMCS, u64VmFuncCtls),
    128         /*    13 */ RT_OFFSETOF(VMXVVMCS, u64EptpPtr),
    129         /*    14 */ RT_OFFSETOF(VMXVVMCS, u64EoiExitBitmap0),
    130         /*    15 */ RT_OFFSETOF(VMXVVMCS, u64EoiExitBitmap1),
    131         /*    16 */ RT_OFFSETOF(VMXVVMCS, u64EoiExitBitmap2),
    132         /*    17 */ RT_OFFSETOF(VMXVVMCS, u64EoiExitBitmap3),
    133         /*    18 */ RT_OFFSETOF(VMXVVMCS, u64AddrEptpList),
    134         /*    19 */ RT_OFFSETOF(VMXVVMCS, u64AddrVmreadBitmap),
    135         /*    20 */ RT_OFFSETOF(VMXVVMCS, u64AddrVmwriteBitmap),
    136         /*    21 */ RT_OFFSETOF(VMXVVMCS, u64AddrXcptVeInfo),
    137         /*    22 */ RT_OFFSETOF(VMXVVMCS, u64AddrXssBitmap),
    138         /*    23 */ RT_OFFSETOF(VMXVVMCS, u64AddrEnclsBitmap),
     115        /*     0 */ RT_UOFFSETOF(VMXVVMCS, u64AddrIoBitmapA),
     116        /*     1 */ RT_UOFFSETOF(VMXVVMCS, u64AddrIoBitmapB),
     117        /*     2 */ RT_UOFFSETOF(VMXVVMCS, u64AddrMsrBitmap),
     118        /*     3 */ RT_UOFFSETOF(VMXVVMCS, u64AddrExitMsrStore),
     119        /*     4 */ RT_UOFFSETOF(VMXVVMCS, u64AddrExitMsrLoad),
     120        /*     5 */ RT_UOFFSETOF(VMXVVMCS, u64AddrEntryMsrLoad),
     121        /*     6 */ RT_UOFFSETOF(VMXVVMCS, u64ExecVmcsPtr),
     122        /*     7 */ RT_UOFFSETOF(VMXVVMCS, u64AddrPml),
     123        /*     8 */ RT_UOFFSETOF(VMXVVMCS, u64TscOffset),
     124        /*     9 */ RT_UOFFSETOF(VMXVVMCS, u64AddrVirtApic),
     125        /*    10 */ RT_UOFFSETOF(VMXVVMCS, u64AddrApicAccess),
     126        /*    11 */ RT_UOFFSETOF(VMXVVMCS, u64AddrPostedIntDesc),
     127        /*    12 */ RT_UOFFSETOF(VMXVVMCS, u64VmFuncCtls),
     128        /*    13 */ RT_UOFFSETOF(VMXVVMCS, u64EptpPtr),
     129        /*    14 */ RT_UOFFSETOF(VMXVVMCS, u64EoiExitBitmap0),
     130        /*    15 */ RT_UOFFSETOF(VMXVVMCS, u64EoiExitBitmap1),
     131        /*    16 */ RT_UOFFSETOF(VMXVVMCS, u64EoiExitBitmap2),
     132        /*    17 */ RT_UOFFSETOF(VMXVVMCS, u64EoiExitBitmap3),
     133        /*    18 */ RT_UOFFSETOF(VMXVVMCS, u64AddrEptpList),
     134        /*    19 */ RT_UOFFSETOF(VMXVVMCS, u64AddrVmreadBitmap),
     135        /*    20 */ RT_UOFFSETOF(VMXVVMCS, u64AddrVmwriteBitmap),
     136        /*    21 */ RT_UOFFSETOF(VMXVVMCS, u64AddrXcptVeInfo),
     137        /*    22 */ RT_UOFFSETOF(VMXVVMCS, u64AddrXssBitmap),
     138        /*    23 */ RT_UOFFSETOF(VMXVVMCS, u64AddrEnclsBitmap),
    139139        /*    24 */ UINT16_MAX,
    140         /*    25 */ RT_OFFSETOF(VMXVVMCS, u64TscMultiplier)
     140        /*    25 */ RT_UOFFSETOF(VMXVVMCS, u64TscMultiplier)
    141141    },
    142142    /* VMX_VMCS_ENC_WIDTH_64BIT | VMX_VMCS_ENC_TYPE_VMEXIT_INFO: */
    143143    {
    144         /*     0 */ RT_OFFSETOF(VMXVVMCS, u64RoGuestPhysAddr),
     144        /*     0 */ RT_UOFFSETOF(VMXVVMCS, u64RoGuestPhysAddr),
    145145        /*   1-8 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
    146146        /*  9-16 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
     
    150150    /* VMX_VMCS_ENC_WIDTH_64BIT | VMX_VMCS_ENC_TYPE_GUEST_STATE: */
    151151    {
    152         /*     0 */ RT_OFFSETOF(VMXVVMCS, u64VmcsLinkPtr),
    153         /*     1 */ RT_OFFSETOF(VMXVVMCS, u64GuestDebugCtlMsr),
    154         /*     2 */ RT_OFFSETOF(VMXVVMCS, u64GuestPatMsr),
    155         /*     3 */ RT_OFFSETOF(VMXVVMCS, u64GuestEferMsr),
    156         /*     4 */ RT_OFFSETOF(VMXVVMCS, u64GuestPerfGlobalCtlMsr),
    157         /*     5 */ RT_OFFSETOF(VMXVVMCS, u64GuestPdpte0),
    158         /*     6 */ RT_OFFSETOF(VMXVVMCS, u64GuestPdpte1),
    159         /*     7 */ RT_OFFSETOF(VMXVVMCS, u64GuestPdpte2),
    160         /*     8 */ RT_OFFSETOF(VMXVVMCS, u64GuestPdpte3),
    161         /*     9 */ RT_OFFSETOF(VMXVVMCS, u64GuestBndcfgsMsr),
     152        /*     0 */ RT_UOFFSETOF(VMXVVMCS, u64VmcsLinkPtr),
     153        /*     1 */ RT_UOFFSETOF(VMXVVMCS, u64GuestDebugCtlMsr),
     154        /*     2 */ RT_UOFFSETOF(VMXVVMCS, u64GuestPatMsr),
     155        /*     3 */ RT_UOFFSETOF(VMXVVMCS, u64GuestEferMsr),
     156        /*     4 */ RT_UOFFSETOF(VMXVVMCS, u64GuestPerfGlobalCtlMsr),
     157        /*     5 */ RT_UOFFSETOF(VMXVVMCS, u64GuestPdpte0),
     158        /*     6 */ RT_UOFFSETOF(VMXVVMCS, u64GuestPdpte1),
     159        /*     7 */ RT_UOFFSETOF(VMXVVMCS, u64GuestPdpte2),
     160        /*     8 */ RT_UOFFSETOF(VMXVVMCS, u64GuestPdpte3),
     161        /*     9 */ RT_UOFFSETOF(VMXVVMCS, u64GuestBndcfgsMsr),
    162162        /* 10-17 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
    163163        /* 18-25 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX
     
    165165    /* VMX_VMCS_ENC_WIDTH_64BIT | VMX_VMCS_ENC_TYPE_HOST_STATE: */
    166166    {
    167         /*     0 */ RT_OFFSETOF(VMXVVMCS, u64HostPatMsr),
    168         /*     1 */ RT_OFFSETOF(VMXVVMCS, u64HostEferMsr),
    169         /*     2 */ RT_OFFSETOF(VMXVVMCS, u64HostPerfGlobalCtlMsr),
     167        /*     0 */ RT_UOFFSETOF(VMXVVMCS, u64HostPatMsr),
     168        /*     1 */ RT_UOFFSETOF(VMXVVMCS, u64HostEferMsr),
     169        /*     2 */ RT_UOFFSETOF(VMXVVMCS, u64HostPerfGlobalCtlMsr),
    170170        /*  3-10 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
    171171        /* 11-18 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
     
    174174    /* VMX_VMCS_ENC_WIDTH_32BIT | VMX_VMCS_ENC_TYPE_CONTROL: */
    175175    {
    176         /*     0 */ RT_OFFSETOF(VMXVVMCS, u32PinCtls),
    177         /*     1 */ RT_OFFSETOF(VMXVVMCS, u32ProcCtls),
    178         /*     2 */ RT_OFFSETOF(VMXVVMCS, u32XcptBitmap),
    179         /*     3 */ RT_OFFSETOF(VMXVVMCS, u32XcptPFMask),
    180         /*     4 */ RT_OFFSETOF(VMXVVMCS, u32XcptPFMatch),
    181         /*     5 */ RT_OFFSETOF(VMXVVMCS, u32Cr3TargetCount),
    182         /*     6 */ RT_OFFSETOF(VMXVVMCS, u32ExitCtls),
    183         /*     7 */ RT_OFFSETOF(VMXVVMCS, u32ExitMsrStoreCount),
    184         /*     8 */ RT_OFFSETOF(VMXVVMCS, u32ExitMsrLoadCount),
    185         /*     9 */ RT_OFFSETOF(VMXVVMCS, u32EntryCtls),
    186         /*    10 */ RT_OFFSETOF(VMXVVMCS, u32EntryMsrLoadCount),
    187         /*    11 */ RT_OFFSETOF(VMXVVMCS, u32EntryIntInfo),
    188         /*    12 */ RT_OFFSETOF(VMXVVMCS, u32EntryXcptErrCode),
    189         /*    13 */ RT_OFFSETOF(VMXVVMCS, u32EntryInstrLen),
    190         /*    14 */ RT_OFFSETOF(VMXVVMCS, u32TprThreshold),
    191         /*    15 */ RT_OFFSETOF(VMXVVMCS, u32ProcCtls2),
    192         /*    16 */ RT_OFFSETOF(VMXVVMCS, u32PleGap),
    193         /*    17 */ RT_OFFSETOF(VMXVVMCS, u32PleWindow),
     176        /*     0 */ RT_UOFFSETOF(VMXVVMCS, u32PinCtls),
     177        /*     1 */ RT_UOFFSETOF(VMXVVMCS, u32ProcCtls),
     178        /*     2 */ RT_UOFFSETOF(VMXVVMCS, u32XcptBitmap),
     179        /*     3 */ RT_UOFFSETOF(VMXVVMCS, u32XcptPFMask),
     180        /*     4 */ RT_UOFFSETOF(VMXVVMCS, u32XcptPFMatch),
     181        /*     5 */ RT_UOFFSETOF(VMXVVMCS, u32Cr3TargetCount),
     182        /*     6 */ RT_UOFFSETOF(VMXVVMCS, u32ExitCtls),
     183        /*     7 */ RT_UOFFSETOF(VMXVVMCS, u32ExitMsrStoreCount),
     184        /*     8 */ RT_UOFFSETOF(VMXVVMCS, u32ExitMsrLoadCount),
     185        /*     9 */ RT_UOFFSETOF(VMXVVMCS, u32EntryCtls),
     186        /*    10 */ RT_UOFFSETOF(VMXVVMCS, u32EntryMsrLoadCount),
     187        /*    11 */ RT_UOFFSETOF(VMXVVMCS, u32EntryIntInfo),
     188        /*    12 */ RT_UOFFSETOF(VMXVVMCS, u32EntryXcptErrCode),
     189        /*    13 */ RT_UOFFSETOF(VMXVVMCS, u32EntryInstrLen),
     190        /*    14 */ RT_UOFFSETOF(VMXVVMCS, u32TprThreshold),
     191        /*    15 */ RT_UOFFSETOF(VMXVVMCS, u32ProcCtls2),
     192        /*    16 */ RT_UOFFSETOF(VMXVVMCS, u32PleGap),
     193        /*    17 */ RT_UOFFSETOF(VMXVVMCS, u32PleWindow),
    194194        /* 18-25 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX
    195195    },
    196196    /* VMX_VMCS_ENC_WIDTH_32BIT | VMX_VMCS_ENC_TYPE_VMEXIT_INFO: */
    197197    {
    198         /*     0 */ RT_OFFSETOF(VMXVVMCS, u32RoVmInstrError),
    199         /*     1 */ RT_OFFSETOF(VMXVVMCS, u32RoExitReason),
    200         /*     2 */ RT_OFFSETOF(VMXVVMCS, u32RoExitIntInfo),
    201         /*     3 */ RT_OFFSETOF(VMXVVMCS, u32RoExitErrCode),
    202         /*     4 */ RT_OFFSETOF(VMXVVMCS, u32RoIdtVectoringInfo),
    203         /*     5 */ RT_OFFSETOF(VMXVVMCS, u32RoIdtVectoringErrCode),
    204         /*     6 */ RT_OFFSETOF(VMXVVMCS, u32RoExitInstrLen),
    205         /*     7 */ RT_OFFSETOF(VMXVVMCS, u32RoExitInstrInfo),
     198        /*     0 */ RT_UOFFSETOF(VMXVVMCS, u32RoVmInstrError),
     199        /*     1 */ RT_UOFFSETOF(VMXVVMCS, u32RoExitReason),
     200        /*     2 */ RT_UOFFSETOF(VMXVVMCS, u32RoExitIntInfo),
     201        /*     3 */ RT_UOFFSETOF(VMXVVMCS, u32RoExitErrCode),
     202        /*     4 */ RT_UOFFSETOF(VMXVVMCS, u32RoIdtVectoringInfo),
     203        /*     5 */ RT_UOFFSETOF(VMXVVMCS, u32RoIdtVectoringErrCode),
     204        /*     6 */ RT_UOFFSETOF(VMXVVMCS, u32RoExitInstrLen),
     205        /*     7 */ RT_UOFFSETOF(VMXVVMCS, u32RoExitInstrInfo),
    206206        /*  8-15 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
    207207        /* 16-23 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
     
    210210    /* VMX_VMCS_ENC_WIDTH_32BIT | VMX_VMCS_ENC_TYPE_GUEST_STATE: */
    211211    {
    212         /*     0 */ RT_OFFSETOF(VMXVVMCS, u32GuestEsLimit),
    213         /*     1 */ RT_OFFSETOF(VMXVVMCS, u32GuestCsLimit),
    214         /*     2 */ RT_OFFSETOF(VMXVVMCS, u32GuestSsLimit),
    215         /*     3 */ RT_OFFSETOF(VMXVVMCS, u32GuestDsLimit),
    216         /*     4 */ RT_OFFSETOF(VMXVVMCS, u32GuestEsLimit),
    217         /*     5 */ RT_OFFSETOF(VMXVVMCS, u32GuestFsLimit),
    218         /*     6 */ RT_OFFSETOF(VMXVVMCS, u32GuestGsLimit),
    219         /*     7 */ RT_OFFSETOF(VMXVVMCS, u32GuestLdtrLimit),
    220         /*     8 */ RT_OFFSETOF(VMXVVMCS, u32GuestTrLimit),
    221         /*     9 */ RT_OFFSETOF(VMXVVMCS, u32GuestGdtrLimit),
    222         /*    10 */ RT_OFFSETOF(VMXVVMCS, u32GuestIdtrLimit),
    223         /*    11 */ RT_OFFSETOF(VMXVVMCS, u32GuestEsAttr),
    224         /*    12 */ RT_OFFSETOF(VMXVVMCS, u32GuestCsAttr),
    225         /*    13 */ RT_OFFSETOF(VMXVVMCS, u32GuestSsAttr),
    226         /*    14 */ RT_OFFSETOF(VMXVVMCS, u32GuestDsAttr),
    227         /*    15 */ RT_OFFSETOF(VMXVVMCS, u32GuestFsAttr),
    228         /*    16 */ RT_OFFSETOF(VMXVVMCS, u32GuestGsAttr),
    229         /*    17 */ RT_OFFSETOF(VMXVVMCS, u32GuestLdtrAttr),
    230         /*    18 */ RT_OFFSETOF(VMXVVMCS, u32GuestTrAttr),
    231         /*    19 */ RT_OFFSETOF(VMXVVMCS, u32GuestIntrState),
    232         /*    20 */ RT_OFFSETOF(VMXVVMCS, u32GuestActivityState),
    233         /*    21 */ RT_OFFSETOF(VMXVVMCS, u32GuestSmBase),
    234         /*    22 */ RT_OFFSETOF(VMXVVMCS, u32GuestSysenterCS),
    235         /*    23 */ RT_OFFSETOF(VMXVVMCS, u32PreemptTimer),
     212        /*     0 */ RT_UOFFSETOF(VMXVVMCS, u32GuestEsLimit),
     213        /*     1 */ RT_UOFFSETOF(VMXVVMCS, u32GuestCsLimit),
     214        /*     2 */ RT_UOFFSETOF(VMXVVMCS, u32GuestSsLimit),
     215        /*     3 */ RT_UOFFSETOF(VMXVVMCS, u32GuestDsLimit),
     216        /*     4 */ RT_UOFFSETOF(VMXVVMCS, u32GuestEsLimit),
     217        /*     5 */ RT_UOFFSETOF(VMXVVMCS, u32GuestFsLimit),
     218        /*     6 */ RT_UOFFSETOF(VMXVVMCS, u32GuestGsLimit),
     219        /*     7 */ RT_UOFFSETOF(VMXVVMCS, u32GuestLdtrLimit),
     220        /*     8 */ RT_UOFFSETOF(VMXVVMCS, u32GuestTrLimit),
     221        /*     9 */ RT_UOFFSETOF(VMXVVMCS, u32GuestGdtrLimit),
     222        /*    10 */ RT_UOFFSETOF(VMXVVMCS, u32GuestIdtrLimit),
     223        /*    11 */ RT_UOFFSETOF(VMXVVMCS, u32GuestEsAttr),
     224        /*    12 */ RT_UOFFSETOF(VMXVVMCS, u32GuestCsAttr),
     225        /*    13 */ RT_UOFFSETOF(VMXVVMCS, u32GuestSsAttr),
     226        /*    14 */ RT_UOFFSETOF(VMXVVMCS, u32GuestDsAttr),
     227        /*    15 */ RT_UOFFSETOF(VMXVVMCS, u32GuestFsAttr),
     228        /*    16 */ RT_UOFFSETOF(VMXVVMCS, u32GuestGsAttr),
     229        /*    17 */ RT_UOFFSETOF(VMXVVMCS, u32GuestLdtrAttr),
     230        /*    18 */ RT_UOFFSETOF(VMXVVMCS, u32GuestTrAttr),
     231        /*    19 */ RT_UOFFSETOF(VMXVVMCS, u32GuestIntrState),
     232        /*    20 */ RT_UOFFSETOF(VMXVVMCS, u32GuestActivityState),
     233        /*    21 */ RT_UOFFSETOF(VMXVVMCS, u32GuestSmBase),
     234        /*    22 */ RT_UOFFSETOF(VMXVVMCS, u32GuestSysenterCS),
     235        /*    23 */ RT_UOFFSETOF(VMXVVMCS, u32PreemptTimer),
    236236        /* 24-25 */ UINT16_MAX, UINT16_MAX
    237237    },
    238238    /* VMX_VMCS_ENC_WIDTH_32BIT | VMX_VMCS_ENC_TYPE_HOST_STATE: */
    239239    {
    240         /*     0 */ RT_OFFSETOF(VMXVVMCS, u32HostSysenterCs),
     240        /*     0 */ RT_UOFFSETOF(VMXVVMCS, u32HostSysenterCs),
    241241        /*   1-8 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
    242242        /*  9-16 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
     
    246246    /* VMX_VMCS_ENC_WIDTH_NATURAL | VMX_VMCS_ENC_TYPE_CONTROL: */
    247247    {
    248         /*     0 */ RT_OFFSETOF(VMXVVMCS, u64Cr0Mask),
    249         /*     1 */ RT_OFFSETOF(VMXVVMCS, u64Cr4Mask),
    250         /*     2 */ RT_OFFSETOF(VMXVVMCS, u64Cr0ReadShadow),
    251         /*     3 */ RT_OFFSETOF(VMXVVMCS, u64Cr4ReadShadow),
    252         /*     4 */ RT_OFFSETOF(VMXVVMCS, u64Cr3Target0),
    253         /*     5 */ RT_OFFSETOF(VMXVVMCS, u64Cr3Target1),
    254         /*     6 */ RT_OFFSETOF(VMXVVMCS, u64Cr3Target2),
    255         /*     7 */ RT_OFFSETOF(VMXVVMCS, u64Cr3Target3),
     248        /*     0 */ RT_UOFFSETOF(VMXVVMCS, u64Cr0Mask),
     249        /*     1 */ RT_UOFFSETOF(VMXVVMCS, u64Cr4Mask),
     250        /*     2 */ RT_UOFFSETOF(VMXVVMCS, u64Cr0ReadShadow),
     251        /*     3 */ RT_UOFFSETOF(VMXVVMCS, u64Cr4ReadShadow),
     252        /*     4 */ RT_UOFFSETOF(VMXVVMCS, u64Cr3Target0),
     253        /*     5 */ RT_UOFFSETOF(VMXVVMCS, u64Cr3Target1),
     254        /*     6 */ RT_UOFFSETOF(VMXVVMCS, u64Cr3Target2),
     255        /*     7 */ RT_UOFFSETOF(VMXVVMCS, u64Cr3Target3),
    256256        /*  8-15 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
    257257        /* 16-23 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
     
    260260    /* VMX_VMCS_ENC_WIDTH_NATURAL | VMX_VMCS_ENC_TYPE_VMEXIT_INFO: */
    261261    {
    262         /*     0 */ RT_OFFSETOF(VMXVVMCS, u64RoExitQual),
    263         /*     1 */ RT_OFFSETOF(VMXVVMCS, u64RoIoRcx),
    264         /*     2 */ RT_OFFSETOF(VMXVVMCS, u64RoIoRsi),
    265         /*     3 */ RT_OFFSETOF(VMXVVMCS, u64RoIoRdi),
    266         /*     4 */ RT_OFFSETOF(VMXVVMCS, u64RoIoRip),
    267         /*     5 */ RT_OFFSETOF(VMXVVMCS, u64RoGuestLinearAddr),
     262        /*     0 */ RT_UOFFSETOF(VMXVVMCS, u64RoExitQual),
     263        /*     1 */ RT_UOFFSETOF(VMXVVMCS, u64RoIoRcx),
     264        /*     2 */ RT_UOFFSETOF(VMXVVMCS, u64RoIoRsi),
     265        /*     3 */ RT_UOFFSETOF(VMXVVMCS, u64RoIoRdi),
     266        /*     4 */ RT_UOFFSETOF(VMXVVMCS, u64RoIoRip),
     267        /*     5 */ RT_UOFFSETOF(VMXVVMCS, u64RoGuestLinearAddr),
    268268        /*  6-13 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
    269269        /* 14-21 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
     
    272272    /* VMX_VMCS_ENC_WIDTH_NATURAL | VMX_VMCS_ENC_TYPE_GUEST_STATE: */
    273273    {
    274         /*     0 */ RT_OFFSETOF(VMXVVMCS, u64GuestCr0),
    275         /*     1 */ RT_OFFSETOF(VMXVVMCS, u64GuestCr3),
    276         /*     2 */ RT_OFFSETOF(VMXVVMCS, u64GuestCr4),
    277         /*     3 */ RT_OFFSETOF(VMXVVMCS, u64GuestEsBase),
    278         /*     4 */ RT_OFFSETOF(VMXVVMCS, u64GuestCsBase),
    279         /*     5 */ RT_OFFSETOF(VMXVVMCS, u64GuestSsBase),
    280         /*     6 */ RT_OFFSETOF(VMXVVMCS, u64GuestDsBase),
    281         /*     7 */ RT_OFFSETOF(VMXVVMCS, u64GuestFsBase),
    282         /*     8 */ RT_OFFSETOF(VMXVVMCS, u64GuestGsBase),
    283         /*     9 */ RT_OFFSETOF(VMXVVMCS, u64GuestLdtrBase),
    284         /*    10 */ RT_OFFSETOF(VMXVVMCS, u64GuestTrBase),
    285         /*    11 */ RT_OFFSETOF(VMXVVMCS, u64GuestGdtrBase),
    286         /*    12 */ RT_OFFSETOF(VMXVVMCS, u64GuestIdtrBase),
    287         /*    13 */ RT_OFFSETOF(VMXVVMCS, u64GuestDr7),
    288         /*    14 */ RT_OFFSETOF(VMXVVMCS, u64GuestRsp),
    289         /*    15 */ RT_OFFSETOF(VMXVVMCS, u64GuestRip),
    290         /*    16 */ RT_OFFSETOF(VMXVVMCS, u64GuestRFlags),
    291         /*    17 */ RT_OFFSETOF(VMXVVMCS, u64GuestPendingDbgXcpt),
    292         /*    18 */ RT_OFFSETOF(VMXVVMCS, u64GuestSysenterEsp),
    293         /*    19 */ RT_OFFSETOF(VMXVVMCS, u64GuestSysenterEip),
     274        /*     0 */ RT_UOFFSETOF(VMXVVMCS, u64GuestCr0),
     275        /*     1 */ RT_UOFFSETOF(VMXVVMCS, u64GuestCr3),
     276        /*     2 */ RT_UOFFSETOF(VMXVVMCS, u64GuestCr4),
     277        /*     3 */ RT_UOFFSETOF(VMXVVMCS, u64GuestEsBase),
     278        /*     4 */ RT_UOFFSETOF(VMXVVMCS, u64GuestCsBase),
     279        /*     5 */ RT_UOFFSETOF(VMXVVMCS, u64GuestSsBase),
     280        /*     6 */ RT_UOFFSETOF(VMXVVMCS, u64GuestDsBase),
     281        /*     7 */ RT_UOFFSETOF(VMXVVMCS, u64GuestFsBase),
     282        /*     8 */ RT_UOFFSETOF(VMXVVMCS, u64GuestGsBase),
     283        /*     9 */ RT_UOFFSETOF(VMXVVMCS, u64GuestLdtrBase),
     284        /*    10 */ RT_UOFFSETOF(VMXVVMCS, u64GuestTrBase),
     285        /*    11 */ RT_UOFFSETOF(VMXVVMCS, u64GuestGdtrBase),
     286        /*    12 */ RT_UOFFSETOF(VMXVVMCS, u64GuestIdtrBase),
     287        /*    13 */ RT_UOFFSETOF(VMXVVMCS, u64GuestDr7),
     288        /*    14 */ RT_UOFFSETOF(VMXVVMCS, u64GuestRsp),
     289        /*    15 */ RT_UOFFSETOF(VMXVVMCS, u64GuestRip),
     290        /*    16 */ RT_UOFFSETOF(VMXVVMCS, u64GuestRFlags),
     291        /*    17 */ RT_UOFFSETOF(VMXVVMCS, u64GuestPendingDbgXcpt),
     292        /*    18 */ RT_UOFFSETOF(VMXVVMCS, u64GuestSysenterEsp),
     293        /*    19 */ RT_UOFFSETOF(VMXVVMCS, u64GuestSysenterEip),
    294294        /* 20-25 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX
    295295    },
    296296    /* VMX_VMCS_ENC_WIDTH_NATURAL | VMX_VMCS_ENC_TYPE_HOST_STATE: */
    297297    {
    298         /*     0 */ RT_OFFSETOF(VMXVVMCS, u64HostCr0),
    299         /*     1 */ RT_OFFSETOF(VMXVVMCS, u64HostCr3),
    300         /*     2 */ RT_OFFSETOF(VMXVVMCS, u64HostCr4),
    301         /*     3 */ RT_OFFSETOF(VMXVVMCS, u64HostFsBase),
    302         /*     4 */ RT_OFFSETOF(VMXVVMCS, u64HostGsBase),
    303         /*     5 */ RT_OFFSETOF(VMXVVMCS, u64HostTrBase),
    304         /*     6 */ RT_OFFSETOF(VMXVVMCS, u64HostGdtrBase),
    305         /*     7 */ RT_OFFSETOF(VMXVVMCS, u64HostIdtrBase),
    306         /*     8 */ RT_OFFSETOF(VMXVVMCS, u64HostSysenterEsp),
    307         /*     9 */ RT_OFFSETOF(VMXVVMCS, u64HostSysenterEip),
    308         /*    10 */ RT_OFFSETOF(VMXVVMCS, u64HostRsp),
    309         /*    11 */ RT_OFFSETOF(VMXVVMCS, u64HostRip),
     298        /*     0 */ RT_UOFFSETOF(VMXVVMCS, u64HostCr0),
     299        /*     1 */ RT_UOFFSETOF(VMXVVMCS, u64HostCr3),
     300        /*     2 */ RT_UOFFSETOF(VMXVVMCS, u64HostCr4),
     301        /*     3 */ RT_UOFFSETOF(VMXVVMCS, u64HostFsBase),
     302        /*     4 */ RT_UOFFSETOF(VMXVVMCS, u64HostGsBase),
     303        /*     5 */ RT_UOFFSETOF(VMXVVMCS, u64HostTrBase),
     304        /*     6 */ RT_UOFFSETOF(VMXVVMCS, u64HostGdtrBase),
     305        /*     7 */ RT_UOFFSETOF(VMXVVMCS, u64HostIdtrBase),
     306        /*     8 */ RT_UOFFSETOF(VMXVVMCS, u64HostSysenterEsp),
     307        /*     9 */ RT_UOFFSETOF(VMXVVMCS, u64HostSysenterEip),
     308        /*    10 */ RT_UOFFSETOF(VMXVVMCS, u64HostRsp),
     309        /*    11 */ RT_UOFFSETOF(VMXVVMCS, u64HostRip),
    310310        /* 12-19 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
    311311        /* 20-25 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX
     
    22292229    {
    22302230        RTGCPHYS const GCPhysVmcs  = IEM_VMX_GET_CURRENT_VMCS(pVCpu);
    2231         uint32_t const offVmxAbort = RT_OFFSETOF(VMXVVMCS, u32VmxAbortId);
     2231        uint32_t const offVmxAbort = RT_UOFFSETOF(VMXVVMCS, u32VmxAbortId);
    22322232        PGMPhysSimpleWriteGCPhys(pVCpu->CTX_SUFF(pVM), GCPhysVmcs + offVmxAbort, &enmAbort, sizeof(enmAbort));
    22332233    }
     
    61096109    else
    61106110    {
    6111         rcStrict = PGMPhysSimpleWriteGCPhys(pVCpu->CTX_SUFF(pVM), GCPtrVmcs + RT_OFFSETOF(VMXVVMCS, fVmcsState),
     6111        rcStrict = PGMPhysSimpleWriteGCPhys(pVCpu->CTX_SUFF(pVM), GCPtrVmcs + RT_UOFFSETOF(VMXVVMCS, fVmcsState),
    61126112                                            (const void *)&fVmcsStateClear, sizeof(fVmcsStateClear));
    61136113    }
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