Changeset 7496 in vbox
- Timestamp:
- Mar 19, 2008 10:22:50 AM (17 years ago)
- Location:
- trunk/src/VBox/VMM
- Files:
-
- 8 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/HWACCM.cpp
r7476 r7496 90 90 if (VBOX_FAILURE(rc)) 91 91 return rc; 92 93 /* Allocate one page for the VM control structure (VMCS). */94 pVM->hwaccm.s.vmx.pVMCS = SUPContAlloc(1, &pVM->hwaccm.s.vmx.pVMCSPhys);95 if (pVM->hwaccm.s.vmx.pVMCS == 0)96 {97 AssertMsgFailed(("SUPContAlloc failed!!\n"));98 return VERR_NO_MEMORY;99 }100 memset(pVM->hwaccm.s.vmx.pVMCS, 0, PAGE_SIZE);101 102 /* Allocate one page for the TSS we need for real mode emulation. */103 pVM->hwaccm.s.vmx.pRealModeTSS = (PVBOXTSS)SUPContAlloc(1, &pVM->hwaccm.s.vmx.pRealModeTSSPhys);104 if (pVM->hwaccm.s.vmx.pRealModeTSS == 0)105 {106 AssertMsgFailed(("SUPContAlloc failed!!\n"));107 return VERR_NO_MEMORY;108 }109 /* We initialize it properly later as we can reuse it for SVM */110 memset(pVM->hwaccm.s.vmx.pRealModeTSS, 0, PAGE_SIZE);111 112 /* Reuse those three pages for AMD SVM. (one is active; never both) */113 pVM->hwaccm.s.svm.pVMCB = pVM->hwaccm.s.vmx.pVMCS;114 pVM->hwaccm.s.svm.pVMCBPhys = pVM->hwaccm.s.vmx.pVMCSPhys;115 pVM->hwaccm.s.svm.pVMCBHost = pVM->hwaccm.s.vmx.pRealModeTSS;116 pVM->hwaccm.s.svm.pVMCBHostPhys = pVM->hwaccm.s.vmx.pRealModeTSSPhys;117 118 /* Allocate 12 KB for the IO bitmap (doesn't seem to be a way to convince SVM not to use it) */119 pVM->hwaccm.s.svm.pIOBitmap = SUPContAlloc(3, &pVM->hwaccm.s.svm.pIOBitmapPhys);120 if (pVM->hwaccm.s.svm.pIOBitmap == 0)121 {122 AssertMsgFailed(("SUPContAlloc failed!!\n"));123 return VERR_NO_MEMORY;124 }125 /* Set all bits to intercept all IO accesses. */126 memset(pVM->hwaccm.s.svm.pIOBitmap, 0xff, PAGE_SIZE*3);127 128 /* Allocate 8 KB for the MSR bitmap (doesn't seem to be a way to convince SVM not to use it) */129 pVM->hwaccm.s.svm.pMSRBitmap = SUPContAlloc(2, &pVM->hwaccm.s.svm.pMSRBitmapPhys);130 if (pVM->hwaccm.s.svm.pMSRBitmap == 0)131 {132 AssertMsgFailed(("SUPContAlloc failed!!\n"));133 return VERR_NO_MEMORY;134 }135 /* Set all bits to intercept all MSR accesses. */136 memset(pVM->hwaccm.s.svm.pMSRBitmap, 0xff, PAGE_SIZE*2);137 92 138 93 /* Misc initialisation. */ … … 431 386 pVM->hwaccm.s.fInitialized = true; 432 387 433 /* The I/O bitmap starts right after the virtual interrupt redirection bitmap. Outside the TSS on purpose; the CPU will not check it434 * for I/O operations. */435 pVM->hwaccm.s.vmx.pRealModeTSS->offIoBitmap = sizeof(*pVM->hwaccm.s.vmx.pRealModeTSS);436 /* Bit set to 0 means redirection enabled. */437 memset(pVM->hwaccm.s.vmx.pRealModeTSS->IntRedirBitmap, 0x0, sizeof(pVM->hwaccm.s.vmx.pRealModeTSS->IntRedirBitmap));438 439 388 rc = SUPCallVMMR0Ex(pVM->pVMR0, VMMR0_DO_HWACC_SETUP_VM, 0, NULL); 440 389 AssertRC(rc); … … 545 494 pVM->hwaccm.s.pStatExitReason = 0; 546 495 } 547 548 if (pVM->hwaccm.s.vmx.pVMCS)549 {550 SUPContFree(pVM->hwaccm.s.vmx.pVMCS, 1);551 pVM->hwaccm.s.vmx.pVMCS = 0;552 }553 if (pVM->hwaccm.s.vmx.pRealModeTSS)554 {555 SUPContFree(pVM->hwaccm.s.vmx.pRealModeTSS, 1);556 pVM->hwaccm.s.vmx.pRealModeTSS = 0;557 }558 if (pVM->hwaccm.s.svm.pIOBitmap)559 {560 SUPContFree(pVM->hwaccm.s.svm.pIOBitmap, 3);561 pVM->hwaccm.s.svm.pIOBitmap = 0;562 }563 if (pVM->hwaccm.s.svm.pMSRBitmap)564 {565 SUPContFree(pVM->hwaccm.s.svm.pMSRBitmap, 2);566 pVM->hwaccm.s.svm.pMSRBitmap = 0;567 }568 496 return 0; 569 497 } -
trunk/src/VBox/VMM/HWACCMInternal.h
r7471 r7496 26 26 #include <VBox/hwaccm.h> 27 27 #include <VBox/pgm.h> 28 #include <iprt/memobj.h> 28 29 29 30 __BEGIN_DECLS … … 149 150 bool fResumeVM; 150 151 152 /** R0 memory object for the VM control structure (VMCS). */ 153 RTR0MEMOBJ pMemObjVMCS; 151 154 /** Physical address of the VM control structure (VMCS). */ 152 155 RTHCPHYS pVMCSPhys; 153 156 /** Virtual address of the VM control structure (VMCS). */ 154 void *pVMCS; 155 157 R0PTRTYPE(void *) pVMCS; 158 159 /** R0 memory object for the TSS page used for real mode emulation. */ 160 RTR0MEMOBJ pMemObjRealModeTSS; 156 161 /** Physical address of the TSS page used for real mode emulation. */ 157 162 RTHCPHYS pRealModeTSSPhys; 158 163 /** Virtual address of the TSS page used for real mode emulation. */ 159 PVBOXTSSpRealModeTSS;164 R0PTRTYPE(PVBOXTSS) pRealModeTSS; 160 165 161 166 /** Host CR4 value (set by ring-0 VMX init) */ … … 202 207 bool fResumeVM; 203 208 209 /** R0 memory object for the VM control block (VMCB). */ 210 RTR0MEMOBJ pMemObjVMCB; 204 211 /** Physical address of the VM control block (VMCB). */ 205 212 RTHCPHYS pVMCBPhys; 206 213 /** Virtual address of the VM control block (VMCB). */ 207 void *pVMCB; 208 214 R0PTRTYPE(void *) pVMCB; 215 216 /** R0 memory object for the host VM control block (VMCB). */ 217 RTR0MEMOBJ pMemObjVMCBHost; 209 218 /** Physical address of the host VM control block (VMCB). */ 210 219 RTHCPHYS pVMCBHostPhys; 211 220 /** Virtual address of the host VM control block (VMCB). */ 212 void *pVMCBHost; 213 221 R0PTRTYPE(void *) pVMCBHost; 222 223 /** R0 memory object for the IO bitmap (12kb). */ 224 RTR0MEMOBJ pMemObjIOBitmap; 214 225 /** Physical address of the IO bitmap (12kb). */ 215 226 RTHCPHYS pIOBitmapPhys; 216 227 /** Virtual address of the IO bitmap. */ 217 void *pIOBitmap; 218 228 R0PTRTYPE(void *) pIOBitmap; 229 230 /** R0 memory object for the MSR bitmap (8kb). */ 231 RTR0MEMOBJ pMemObjMSRBitmap; 219 232 /** Physical address of the MSR bitmap (8kb). */ 220 233 RTHCPHYS pMSRBitmapPhys; 221 234 /** Virtual address of the MSR bitmap. */ 222 void *pMSRBitmap;235 R0PTRTYPE(void *) pMSRBitmap; 223 236 224 237 /** SVM revision. */ -
trunk/src/VBox/VMM/VMMR0/HWACCMR0.cpp
r7495 r7496 586 586 HWACCMR0DECL(int) HWACCMR0InitVM(PVM pVM) 587 587 { 588 LogComFlow(("HWACCMR0Init: %p\n", pVM)); 589 590 pVM->hwaccm.s.vmx.fSupported = HWACCMR0Globals.vmx.fSupported; 591 pVM->hwaccm.s.svm.fSupported = HWACCMR0Globals.svm.fSupported; 588 int rc = VINF_SUCCESS; 589 590 AssertReturn(pVM, VERR_INVALID_PARAMETER); 591 592 #ifdef LOG_ENABLED 593 SUPR0Printf("HWACCMR0InitVM: %p\n", pVM); 594 #endif 595 596 pVM->hwaccm.s.vmx.fSupported = HWACCMR0Globals.vmx.fSupported; 597 pVM->hwaccm.s.svm.fSupported = HWACCMR0Globals.svm.fSupported; 592 598 593 599 pVM->hwaccm.s.vmx.msr.feature_ctrl = HWACCMR0Globals.vmx.msr.feature_ctrl; … … 609 615 pVM->hwaccm.s.cpuid.u32AMDFeatureEDX = HWACCMR0Globals.cpuid.u32AMDFeatureEDX; 610 616 pVM->hwaccm.s.lLastError = HWACCMR0Globals.lLastError; 611 return VINF_SUCCESS; 612 } 613 614 615 616 /** 617 * Sets up a VT-x or AMD-V session 617 618 /* Init a VT-x or AMD-V VM. */ 619 if (pVM->hwaccm.s.vmx.fSupported) 620 rc = VMXR0InitVM(pVM); 621 else 622 if (pVM->hwaccm.s.svm.fSupported) 623 rc = SVMR0InitVM(pVM); 624 625 return rc; 626 } 627 628 629 /** 630 * Does Ring-0 per VM HWACCM termination. 618 631 * 619 632 * @returns VBox status code. 620 633 * @param pVM The VM to operate on. 621 634 */ 635 HWACCMR0DECL(int) HWACCMR0TermVM(PVM pVM) 636 { 637 int rc = VINF_SUCCESS; 638 639 AssertReturn(pVM, VERR_INVALID_PARAMETER); 640 641 #ifdef LOG_ENABLED 642 SUPR0Printf("HWACCMR0TermVM: %p\n", pVM); 643 #endif 644 645 /* Terminate a VT-x or AMD-V VM. */ 646 if (pVM->hwaccm.s.vmx.fSupported) 647 rc = VMXR0TermVM(pVM); 648 else 649 if (pVM->hwaccm.s.svm.fSupported) 650 rc = SVMR0TermVM(pVM); 651 652 return rc; 653 } 654 655 656 /** 657 * Sets up a VT-x or AMD-V session 658 * 659 * @returns VBox status code. 660 * @param pVM The VM to operate on. 661 */ 622 662 HWACCMR0DECL(int) HWACCMR0SetupVM(PVM pVM) 623 663 { 624 664 int rc = VINF_SUCCESS; 625 665 626 if (pVM == NULL) 627 return VERR_INVALID_PARAMETER; 628 629 /* Setup Intel VMX. */ 666 AssertReturn(pVM, VERR_INVALID_PARAMETER); 667 668 #ifdef LOG_ENABLED 669 SUPR0Printf("HWACCMR0SetupVM: %p\n", pVM); 670 #endif 671 672 /* Setup VT-x or AMD-V. */ 630 673 if (pVM->hwaccm.s.vmx.fSupported) 631 674 rc = VMXR0SetupVM(pVM); 632 675 else 676 if (pVM->hwaccm.s.svm.fSupported) 633 677 rc = SVMR0SetupVM(pVM); 634 678 -
trunk/src/VBox/VMM/VMMR0/HWSVMR0.cpp
r7471 r7496 92 92 93 93 /** 94 * Sets up SVM for the specified VM 94 * Does Ring-0 per VM AMD-V init. 95 * 96 * @returns VBox status code. 97 * @param pVM The VM to operate on. 98 */ 99 HWACCMR0DECL(int) SVMR0InitVM(PVM pVM) 100 { 101 int rc; 102 103 /* Allocate one page for the VM control block (VMCB). */ 104 rc = RTR0MemObjAllocCont(&pVM->hwaccm.s.svm.pMemObjVMCB, 1 << PAGE_SHIFT, true /* executable R0 mapping */); 105 if (RT_FAILURE(rc)) 106 return rc; 107 108 pVM->hwaccm.s.svm.pVMCB = RTR0MemObjAddress(pVM->hwaccm.s.svm.pMemObjVMCB); 109 pVM->hwaccm.s.svm.pVMCBPhys = RTR0MemObjGetPagePhysAddr(pVM->hwaccm.s.svm.pMemObjVMCB, 0); 110 ASMMemZero32(pVM->hwaccm.s.svm.pVMCB, PAGE_SIZE); 111 112 /* Allocate one page for the host context */ 113 rc = RTR0MemObjAllocCont(&pVM->hwaccm.s.svm.pMemObjVMCBHost, 1 << PAGE_SHIFT, true /* executable R0 mapping */); 114 if (RT_FAILURE(rc)) 115 return rc; 116 117 pVM->hwaccm.s.svm.pVMCBHost = RTR0MemObjAddress(pVM->hwaccm.s.svm.pMemObjVMCBHost); 118 pVM->hwaccm.s.svm.pVMCBHostPhys = RTR0MemObjGetPagePhysAddr(pVM->hwaccm.s.svm.pMemObjVMCBHost, 0); 119 ASMMemZero32(pVM->hwaccm.s.svm.pVMCBHost, PAGE_SIZE); 120 121 /* Allocate 12 KB for the IO bitmap (doesn't seem to be a way to convince SVM not to use it) */ 122 rc = RTR0MemObjAllocCont(&pVM->hwaccm.s.svm.pMemObjIOBitmap, 3 << PAGE_SHIFT, true /* executable R0 mapping */); 123 if (RT_FAILURE(rc)) 124 return rc; 125 126 pVM->hwaccm.s.svm.pIOBitmap = RTR0MemObjAddress(pVM->hwaccm.s.svm.pMemObjIOBitmap); 127 pVM->hwaccm.s.svm.pIOBitmapPhys = RTR0MemObjGetPagePhysAddr(pVM->hwaccm.s.svm.pMemObjIOBitmap, 0); 128 /* Set all bits to intercept all IO accesses. */ 129 ASMMemFill32(pVM->hwaccm.s.svm.pIOBitmap, PAGE_SIZE*3, 0xffffffff); 130 131 /* Allocate 8 KB for the MSR bitmap (doesn't seem to be a way to convince SVM not to use it) */ 132 rc = RTR0MemObjAllocCont(&pVM->hwaccm.s.svm.pMemObjMSRBitmap, 2 << PAGE_SHIFT, true /* executable R0 mapping */); 133 if (RT_FAILURE(rc)) 134 return rc; 135 136 pVM->hwaccm.s.svm.pMSRBitmap = RTR0MemObjAddress(pVM->hwaccm.s.svm.pMemObjMSRBitmap); 137 pVM->hwaccm.s.svm.pMSRBitmapPhys = RTR0MemObjGetPagePhysAddr(pVM->hwaccm.s.svm.pMemObjMSRBitmap, 0); 138 /* Set all bits to intercept all MSR accesses. */ 139 ASMMemFill32(pVM->hwaccm.s.svm.pMSRBitmap, PAGE_SIZE*2, 0xffffffff); 140 141 return VINF_SUCCESS; 142 } 143 144 /** 145 * Does Ring-0 per VM AMD-V termination. 146 * 147 * @returns VBox status code. 148 * @param pVM The VM to operate on. 149 */ 150 HWACCMR0DECL(int) SVMR0TermVM(PVM pVM) 151 { 152 if (pVM->hwaccm.s.svm.pMemObjVMCB) 153 { 154 RTR0MemObjFree(pVM->hwaccm.s.svm.pMemObjVMCB, false); 155 pVM->hwaccm.s.svm.pVMCB = 0; 156 pVM->hwaccm.s.svm.pVMCBPhys = 0; 157 pVM->hwaccm.s.svm.pMemObjVMCB = 0; 158 } 159 if (pVM->hwaccm.s.svm.pMemObjVMCBHost) 160 { 161 RTR0MemObjFree(pVM->hwaccm.s.svm.pMemObjVMCBHost, false); 162 pVM->hwaccm.s.svm.pVMCBHost = 0; 163 pVM->hwaccm.s.svm.pVMCBHostPhys = 0; 164 pVM->hwaccm.s.svm.pMemObjVMCBHost = 0; 165 } 166 if (pVM->hwaccm.s.svm.pMemObjIOBitmap) 167 { 168 RTR0MemObjFree(pVM->hwaccm.s.svm.pMemObjIOBitmap, false); 169 pVM->hwaccm.s.svm.pIOBitmap = 0; 170 pVM->hwaccm.s.svm.pIOBitmapPhys = 0; 171 pVM->hwaccm.s.svm.pMemObjIOBitmap = 0; 172 } 173 if (pVM->hwaccm.s.svm.pMemObjMSRBitmap) 174 { 175 RTR0MemObjFree(pVM->hwaccm.s.svm.pMemObjMSRBitmap, false); 176 pVM->hwaccm.s.svm.pMSRBitmap = 0; 177 pVM->hwaccm.s.svm.pMSRBitmapPhys = 0; 178 pVM->hwaccm.s.svm.pMemObjMSRBitmap = 0; 179 } 180 return VINF_SUCCESS; 181 } 182 183 /** 184 * Sets up AMD-V for the specified VM 95 185 * 96 186 * @returns VBox status code. … … 102 192 SVM_VMCB *pVMCB; 103 193 104 if (pVM == NULL) 105 return VERR_INVALID_PARAMETER; 106 107 /* Setup AMD SVM. */ 194 AssertReturn(pVM, VERR_INVALID_PARAMETER); 195 108 196 Assert(pVM->hwaccm.s.svm.fSupported); 109 197 … … 1469 1557 HWACCMR0DECL(int) SVMR0Enter(PVM pVM) 1470 1558 { 1471 uint64_t val;1472 1473 1559 Assert(pVM->hwaccm.s.svm.fSupported); 1474 1560 -
trunk/src/VBox/VMM/VMMR0/HWSVMR0.h
r7471 r7496 76 76 77 77 /** 78 * Does Ring-0 per VM AMD-V init. 79 * 80 * @returns VBox status code. 81 * @param pVM The VM to operate on. 82 */ 83 HWACCMR0DECL(int) SVMR0InitVM(PVM pVM); 84 85 /** 86 * Does Ring-0 per VM AMD-V termination. 87 * 88 * @returns VBox status code. 89 * @param pVM The VM to operate on. 90 */ 91 HWACCMR0DECL(int) SVMR0TermVM(PVM pVM); 92 93 /** 78 94 * Sets up AMD-V for the specified VM 79 95 * -
trunk/src/VBox/VMM/VMMR0/HWVMXR0.cpp
r7495 r7496 34 34 #include <iprt/assert.h> 35 35 #include <iprt/asm.h> 36 #include <iprt/string.h> 36 37 #include "HWVMXR0.h" 37 38 … … 122 123 123 124 /** 125 * Does Ring-0 per VM VT-x init. 126 * 127 * @returns VBox status code. 128 * @param pVM The VM to operate on. 129 */ 130 HWACCMR0DECL(int) VMXR0InitVM(PVM pVM) 131 { 132 int rc; 133 134 #ifdef LOG_ENABLED 135 SUPR0Printf("VMXR0InitVM %x\n", pVM); 136 #endif 137 138 /* Allocate one page for the VM control structure (VMCS). */ 139 rc = RTR0MemObjAllocCont(&pVM->hwaccm.s.vmx.pMemObjVMCS, 1 << PAGE_SHIFT, true /* executable R0 mapping */); 140 AssertRC(rc); 141 if (RT_FAILURE(rc)) 142 return rc; 143 144 pVM->hwaccm.s.vmx.pVMCS = RTR0MemObjAddress(pVM->hwaccm.s.vmx.pMemObjVMCS); 145 pVM->hwaccm.s.vmx.pVMCSPhys = RTR0MemObjGetPagePhysAddr(pVM->hwaccm.s.vmx.pMemObjVMCS, 0); 146 ASMMemZero32(pVM->hwaccm.s.vmx.pVMCS, PAGE_SIZE); 147 148 /* Allocate one page for the TSS we need for real mode emulation. */ 149 rc = RTR0MemObjAllocCont(&pVM->hwaccm.s.vmx.pMemObjRealModeTSS, 1 << PAGE_SHIFT, true /* executable R0 mapping */); 150 AssertRC(rc); 151 if (RT_FAILURE(rc)) 152 return rc; 153 154 pVM->hwaccm.s.vmx.pRealModeTSS = (PVBOXTSS)RTR0MemObjAddress(pVM->hwaccm.s.vmx.pMemObjRealModeTSS); 155 pVM->hwaccm.s.vmx.pRealModeTSSPhys = RTR0MemObjGetPagePhysAddr(pVM->hwaccm.s.vmx.pMemObjRealModeTSS, 0); 156 157 /* The I/O bitmap starts right after the virtual interrupt redirection bitmap. Outside the TSS on purpose; the CPU will not check it 158 * for I/O operations. */ 159 ASMMemZero32(pVM->hwaccm.s.vmx.pRealModeTSS, PAGE_SIZE); 160 pVM->hwaccm.s.vmx.pRealModeTSS->offIoBitmap = sizeof(*pVM->hwaccm.s.vmx.pRealModeTSS); 161 /* Bit set to 0 means redirection enabled. */ 162 memset(pVM->hwaccm.s.vmx.pRealModeTSS->IntRedirBitmap, 0x0, sizeof(pVM->hwaccm.s.vmx.pRealModeTSS->IntRedirBitmap)); 163 164 #ifdef LOG_ENABLED 165 SUPR0Printf("VMXR0InitVM %x VMCS=%x (%x) RealModeTSS=%x (%x)\n", pVM, pVM->hwaccm.s.vmx.pVMCS, (uint32_t)pVM->hwaccm.s.vmx.pVMCSPhys, pVM->hwaccm.s.vmx.pRealModeTSS, (uint32_t)pVM->hwaccm.s.vmx.pRealModeTSSPhys); 166 #endif 167 return VINF_SUCCESS; 168 } 169 170 /** 171 * Does Ring-0 per VM VT-x termination. 172 * 173 * @returns VBox status code. 174 * @param pVM The VM to operate on. 175 */ 176 HWACCMR0DECL(int) VMXR0TermVM(PVM pVM) 177 { 178 if (pVM->hwaccm.s.vmx.pMemObjVMCS) 179 { 180 RTR0MemObjFree(pVM->hwaccm.s.vmx.pMemObjVMCS, false); 181 pVM->hwaccm.s.vmx.pMemObjVMCS = 0; 182 pVM->hwaccm.s.vmx.pVMCS = 0; 183 pVM->hwaccm.s.vmx.pVMCSPhys = 0; 184 } 185 if (pVM->hwaccm.s.vmx.pMemObjRealModeTSS) 186 { 187 RTR0MemObjFree(pVM->hwaccm.s.vmx.pMemObjRealModeTSS, false); 188 pVM->hwaccm.s.vmx.pMemObjRealModeTSS = 0; 189 pVM->hwaccm.s.vmx.pRealModeTSS = 0; 190 pVM->hwaccm.s.vmx.pRealModeTSSPhys = 0; 191 } 192 return VINF_SUCCESS; 193 } 194 195 /** 124 196 * Sets up VT-x for the specified VM 125 197 * … … 132 204 uint32_t val; 133 205 134 if (pVM == NULL)135 return VERR_INVALID_PARAMETER;206 AssertReturn(pVM, VERR_INVALID_PARAMETER); 207 Assert(pVM->hwaccm.s.vmx.pVMCS); 136 208 137 209 /* Set revision dword at the beginning of the VMCS structure. */ -
trunk/src/VBox/VMM/VMMR0/HWVMXR0.h
r7471 r7496 77 77 78 78 /** 79 * Does Ring-0 per VM VT-x init. 80 * 81 * @returns VBox status code. 82 * @param pVM The VM to operate on. 83 */ 84 HWACCMR0DECL(int) VMXR0InitVM(PVM pVM); 85 86 /** 87 * Does Ring-0 per VM VT-x termination. 88 * 89 * @returns VBox status code. 90 * @param pVM The VM to operate on. 91 */ 92 HWACCMR0DECL(int) VMXR0TermVM(PVM pVM); 93 94 /** 79 95 * Sets up VT-x for the specified VM 80 96 * -
trunk/src/VBox/VMM/VMMR0/VMMR0.cpp
r7471 r7496 251 251 static int VMMR0Term(PVM pVM) 252 252 { 253 HWACCMR0TermVM(pVM); 254 253 255 /* 254 256 * Deregister the logger.
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