VirtualBox

Changeset 75100 in vbox


Ignore:
Timestamp:
Oct 26, 2018 2:41:41 PM (6 years ago)
Author:
vboxsync
Message:

BusLogic: Added option to emulate an ISA device without any PCI bits.

File:
1 edited

Legend:

Unmodified
Added
Removed

  • trunk/src/VBox/Devices/Storage/DevBusLogic.cpp

    r73097 r75100  
    316316/** @}  */
    317317
     318/**
     319 * Emulated device types.
     320 */
     321enum BL_DEVICE_TYPE
     322{
     323    DEV_BT_958D     = 0,    /* BusLogic BT-958D, PCI. */
     324    DEV_BT_545C     = 1,    /* BusLogic BT-545C, ISA. */
     325    DEV_AHA_1540C   = 2     /* Adaptec AHA-1540C, ISA. */
     326};
     327
    318328/** Pointer to a task state structure. */
    319329typedef struct BUSLOGICREQ *PBUSLOGICREQ;
    … …  
    387397    /** ISA I/O port base (encoded in FW-compatible format). */
    388398    uint8_t                         uISABaseCode;
    389     uint8_t                         Alignment00;
     399    /** ISA IRQ, non-zero if in ISA mode. */
     400    uint8_t                         uIsaIrq;
    390401
    391402    /** ISA I/O port base (disabled if zero). */
    … …  
    393404    /** Default ISA I/O port base in FW-compatible format. */
    394405    uint8_t                         uDefaultISABaseCode;
     406
     407    /** Emulated device type. */
     408    uint8_t                         uDevType;
    395409
    396410    /** Number of mailboxes the guest set up. */
    … …  
    983997 *
    984998 * @returns nothing.
    985  * @param   pThis    The LsiLogic controller instance.
     999 * @param   pThis    The BusLogic controller instance.
    9861000 * @param   GCPhys   The guest physical address of the memory buffer.
    9871001 * @param   pSgBuf   The pointer to the host R3 S/G buffer.
    … …  
    10411055    pBusLogic->regInterrupt |= BL_INTR_INTV;
    10421056    if (pBusLogic->fIRQEnabled && !fSuppressIrq)
    1043         PDMDevHlpPCISetIrq(pBusLogic->CTX_SUFF(pDevIns), 0, 1);
     1057        if (!pBusLogic->uIsaIrq)
     1058            PDMDevHlpPCISetIrq(pBusLogic->CTX_SUFF(pDevIns), 0, 1);
     1059        else
     1060            PDMDevHlpISASetIrq(pBusLogic->CTX_SUFF(pDevIns), pBusLogic->uIsaIrq, 1);
    10441061}
    10451062
    … …  
    10561073    pBusLogic->regInterrupt = 0;
    10571074    pBusLogic->regStatus &= ~BL_STAT_CMDINV;
    1058     PDMDevHlpPCISetIrq(pBusLogic->CTX_SUFF(pDevIns), 0, 0);
     1075    if (!pBusLogic->uIsaIrq)
     1076        PDMDevHlpPCISetIrq(pBusLogic->CTX_SUFF(pDevIns), 0, 0);
     1077    else
     1078        PDMDevHlpISASetIrq(pBusLogic->CTX_SUFF(pDevIns), pBusLogic->uIsaIrq, 0);
    10591079    /* If there's another pending interrupt, report it now. */
    10601080    if (pBusLogic->uPendingIntr)
    … …  
    11751195}
    11761196
     1197/**
     1198 * Memory write helper to handle PCI/ISA differences.
     1199 *
     1200 * @returns nothing.
     1201 * @param   pThis       Pointer to the BusLogic device instance
     1202 * @param   GCPhys      Guest physical memory address
     1203 * @param   pvBuf       Host side buffer address
     1204 * @param   cbWrite     Number of bytes to write
     1205 */
     1206static void blPhysWrite(PBUSLOGIC pThis, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
     1207{
     1208    if (!pThis->uIsaIrq)
     1209        PDMDevHlpPCIPhysWrite(pThis->CTX_SUFF(pDevIns), GCPhys, pvBuf, cbWrite);
     1210    else
     1211        PDMDevHlpPhysWrite(pThis->CTX_SUFF(pDevIns), GCPhys, pvBuf, cbWrite);
     1212}
     1213
    11771214#if defined(IN_RING3)
    11781215
    … …  
    12001237    }
    12011238}
     1239
    12021240
    12031241/**
    … …  
    12391277        pCCBGuest->c.uDeviceStatus      = uDeviceStatus;
    12401278        /* Rewrite CCB up to the CDB; perhaps more than necessary. */
    1241         PDMDevHlpPCIPhysWrite(pBusLogic->CTX_SUFF(pDevIns), GCPhysAddrCCB,
    1242                               pCCBGuest, RT_UOFFSETOF(CCBC, abCDB));
     1279        blPhysWrite(pBusLogic, GCPhysAddrCCB, pCCBGuest, RT_UOFFSETOF(CCBC, abCDB));
    12431280    }
    12441281
    … …  
    12581295        U32_TO_ADDR(Mbx24.aPhysAddrCCB, MbxIn.u32PhysAddrCCB);
    12591296        Log(("24-bit mailbox: completion code=%u, CCB at %RGp\n", Mbx24.uCmdState, (RTGCPHYS)ADDR_TO_U32(Mbx24.aPhysAddrCCB)));
    1260         PDMDevHlpPCIPhysWrite(pBusLogic->CTX_SUFF(pDevIns), GCPhysAddrMailboxIncoming, &Mbx24, sizeof(Mailbox24));
     1297        blPhysWrite(pBusLogic, GCPhysAddrMailboxIncoming, &Mbx24, sizeof(Mailbox24));
    12611298    }
    12621299    else
    12631300    {
    12641301        Log(("32-bit mailbox: completion code=%u, CCB at %RGp\n", MbxIn.u.in.uCompletionCode, GCPhysAddrCCB));
    1265         PDMDevHlpPCIPhysWrite(pBusLogic->CTX_SUFF(pDevIns), GCPhysAddrMailboxIncoming,
    1266                               &MbxIn, sizeof(Mailbox32));
     1302        blPhysWrite(pBusLogic, GCPhysAddrMailboxIncoming, &MbxIn, sizeof(Mailbox32));
    12671303    }
    12681304
    … …  
    15071543
    15081544        AssertPtr(pvSeg);
    1509         PDMDevHlpPCIPhysWrite(pThis->CTX_SUFF(pDevIns), GCPhys, pvSeg, cbSeg);
     1545        blPhysWrite(pThis, GCPhys, pvSeg, cbSeg);
    15101546        GCPhys += cbSeg;
    15111547        cbCopy -= cbSeg;
    … …  
    16351671 *
    16361672 * @returns Amount of bytes copied to the guest.
    1637  * @param   pThis          The LsiLogic controller device instance.
     1673 * @param   pThis          The BusLogic controller device instance.
    16381674 * @param   pReq           Request structure.
    16391675 * @param   pSgBuf         The S/G buffer to copy from.
    … …  
    16521688 *
    16531689 * @returns Amount of bytes copied from the guest.
    1654  * @param   pThis          The LsiLogic controller device instance.
     1690 * @param   pThis          The BusLogic controller device instance.
    16551691 * @param   pReq           Request structure.
    16561692 * @param   pSgBuf         The S/G buffer to copy into.
    … …  
    16951731    if (fCopy && cbSenseBuffer)
    16961732    {
    1697         PPDMDEVINS  pDevIns = pReq->pTargetDevice->CTX_SUFF(pBusLogic)->CTX_SUFF(pDevIns);
     1733        PBUSLOGIC   pThis = pReq->pTargetDevice->CTX_SUFF(pBusLogic);
    16981734        RTGCPHYS    GCPhysAddrSenseBuffer;
    16991735
    … …  
    17111747
    17121748        Log3(("%s: sense buffer: %.*Rhxs\n", __FUNCTION__, cbSenseBuffer, pReq->pbSenseBuffer));
    1713         PDMDevHlpPCIPhysWrite(pDevIns, GCPhysAddrSenseBuffer, pReq->pbSenseBuffer, cbSenseBuffer);
     1749        blPhysWrite(pThis, GCPhysAddrSenseBuffer, pReq->pbSenseBuffer, cbSenseBuffer);
    17141750    }
    17151751
    … …  
    18901926        case BUSLOGICCOMMAND_INQUIRE_CONFIGURATION:
    18911927        {
    1892             uint8_t uPciIrq = PCIDevGetInterruptLine(&pBusLogic->dev);
     1928            uint8_t uIrq;
     1929
     1930            if (pBusLogic->uIsaIrq)
     1931                uIrq = pBusLogic->uIsaIrq;
     1932            else
     1933                uIrq = PCIDevGetInterruptLine(&pBusLogic->dev);
    18931934
    18941935            pBusLogic->cbReplyParametersLeft = sizeof(ReplyInquireConfiguration);
    … …  
    18971938
    18981939            pReply->uHostAdapterId = 7; /* The controller has always 7 as ID. */
    1899             pReply->fDmaChannel6  = 1;  /* DMA channel 6 is a good default. */
     1940            pReply->fDmaChannel5  = 1;  /* DMA channel 6 is a good default. */
     1941
    19001942            /* The PCI IRQ is not necessarily representable in this structure.
    19011943             * If that is the case, the guest likely won't function correctly,
    1902              * therefore we log a warning.
     1944             * therefore we log a warning. Note that for ISA configurations, we
     1945             * can only allow IRQs that can be supported; for PCI, the HBA
     1946             * has no control over IRQ assignment.
    19031947             */
    1904             switch (uPciIrq)
     1948            switch (uIrq)
    19051949            {
    19061950                case 9:     pReply->fIrqChannel9  = 1; break;
    … …  
    19111955                case 15:    pReply->fIrqChannel15 = 1; break;
    19121956                default:
    1913                     LogRel(("Warning: PCI IRQ %d cannot be represented as ISA!\n", uPciIrq));
     1957                    LogRel(("Warning: PCI IRQ %d cannot be represented as ISA!\n", uIrq));
    19141958                    break;
    19151959            }
    … …  
    21772221            GCPhysFifoBuf = (RTGCPHYS)ADDR_TO_U32(addr);
    21782222            Log(("Read busmaster FIFO at: %04X\n", ADDR_TO_U32(addr)));
    2179             PDMDevHlpPCIPhysWrite(pBusLogic->CTX_SUFF(pDevIns), GCPhysFifoBuf,
    2180                                   &pBusLogic->LocalRam.u8View[64], 64);
     2223            blPhysWrite(pBusLogic, GCPhysFifoBuf, &pBusLogic->LocalRam.u8View[64], 64);
    21812224            break;
    21822225        }
    … …  
    21982241
    21992242    Log(("uOperationCode=%#x, cbReplyParametersLeft=%d\n", pBusLogic->uOperationCode, pBusLogic->cbReplyParametersLeft));
     2243
     2244    /* Fail command if too much parameter data requested. */
     2245    if ((pBusLogic->cbCommandParametersLeft + pBusLogic->iParameter) > sizeof(pBusLogic->aCommandBuffer))
     2246    {
     2247        Log(("Invalid command parameter length (%u)\n", pBusLogic->cbCommandParametersLeft));
     2248        pBusLogic->cbReplyParametersLeft   = 0;
     2249        pBusLogic->cbCommandParametersLeft = 0;
     2250        pBusLogic->regStatus |= BL_STAT_CMDINV;
     2251    }
    22002252
    22012253    /* Set the data in ready bit in the status register in case the command has a reply. */
    … …  
    32733325    uint8_t uActionCode = BUSLOGIC_MAILBOX_OUTGOING_ACTION_FREE;
    32743326    unsigned uCodeOffs = pBusLogic->fMbxIs24Bit ? RT_OFFSETOF(Mailbox24, uCmdState) : RT_OFFSETOF(Mailbox32, u.out.uActionCode);
    3275     PDMDevHlpPCIPhysWrite(pBusLogic->CTX_SUFF(pDevIns), GCPhysAddrMailboxCurrent + uCodeOffs, &uActionCode, sizeof(uActionCode));
     3327    blPhysWrite(pBusLogic, GCPhysAddrMailboxCurrent + uCodeOffs, &uActionCode, sizeof(uActionCode));
    32763328
    32773329    if (MailboxGuest.u.out.uActionCode == BUSLOGIC_MAILBOX_OUTGOING_ACTION_START_COMMAND)
    … …  
    36983750static DECLCALLBACK(void) buslogicR3Info(PPDMDEVINS pDevIns, PCDBGFINFOHLP pHlp, const char *pszArgs)
    36993751{
     3752    static const char *apszModels[] = { "BusLogic BT-958D", "BusLogic BT-545C", "Adaptec AHA-1540C" };
    37003753    PBUSLOGIC   pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
    37013754    unsigned    i;
    … …  
    37073760
    37083761    /* Show basic information. */
    3709     pHlp->pfnPrintf(pHlp,
    3710                     "%s#%d: PCI I/O=%RTiop ISA I/O=%RTiop MMIO=%RGp IRQ=%u GC=%RTbool R0=%RTbool\n",
     3762    pHlp->pfnPrintf(pHlp, "%s#%d: %s ",
    37113763                    pDevIns->pReg->szName,
    37123764                    pDevIns->iInstance,
    3713                     pThis->IOPortBase, pThis->IOISABase, pThis->MMIOBase,
    3714                     PCIDevGetInterruptLine(&pThis->dev),
     3765                    pThis->uDevType >= RT_ELEMENTS(apszModels) ? "Uknown model" : apszModels[pThis->uDevType]);
     3766    if (pThis->uIsaIrq)
     3767        pHlp->pfnPrintf(pHlp, "ISA I/O=%RTiop IRQ=%u ",
     3768                        pThis->IOISABase,
     3769                        pThis->uIsaIrq);
     3770    else
     3771        pHlp->pfnPrintf(pHlp, "PCI I/O=%RTiop ISA I/O=%RTiop MMIO=%RGp IRQ=%u ",
     3772                        pThis->IOPortBase, pThis->IOISABase, pThis->MMIOBase,
     3773                        PCIDevGetInterruptLine(&pThis->dev));
     3774    pHlp->pfnPrintf(pHlp, "GC=%RTbool R0=%RTbool\n",
    37153775                    !!pThis->fGCEnabled, !!pThis->fR0Enabled);
    37163776
    … …  
    40664126    int        rc = VINF_SUCCESS;
    40674127    bool       fBootable = true;
    4068     char       achISACompat[16];
     4128    char       achCfgStr[16];
    40694129    PDMDEV_CHECK_VERSIONS_RETURN(pDevIns);
    40704130
    … …  
    40994159                              "R0Enabled\0"
    41004160                              "Bootable\0"
     4161                              "AdapterType\0"
    41014162                              "ISACompat\0"))
    41024163        return PDMDEV_SET_ERROR(pDevIns, VERR_PDM_DEVINS_UNKNOWN_CFG_VALUES,
    … …  
    41204181    Log(("%s: fBootable=%RTbool\n", __FUNCTION__, fBootable));
    41214182
     4183    /* Figure out the emulated device type. */
     4184    rc = CFGMR3QueryStringDef(pCfg, "AdapterType", achCfgStr, sizeof(achCfgStr), "BT-958D");
     4185    if (RT_FAILURE(rc))
     4186        return PDMDEV_SET_ERROR(pDevIns, rc,
     4187                                N_("BusLogic configuration error: failed to read AdapterType as string"));
     4188    Log(("%s: AdapterType=%s\n", __FUNCTION__, achCfgStr));
     4189
     4190    /* Grok the AdapterType setting. */
     4191    if (!strcmp(achCfgStr, "BT-958D"))          /* Default PCI device, 32-bit and 24-bit addressing. */
     4192    {
     4193        pThis->uDevType = DEV_BT_958D;
     4194        pThis->uDefaultISABaseCode = ISA_BASE_DISABLED;
     4195    }
     4196    else if (!strcmp(achCfgStr, "BT-545C"))     /* ISA device, 24-bit addressing only. */
     4197    {
     4198        pThis->uDevType = DEV_BT_545C;
     4199        pThis->uIsaIrq = 11;
     4200    }
     4201#if 0   /* Maybe someday. */
     4202    else if (!strcmp(achCfgStr, "AHA-1540C"))   /* Competitor ISA device. */
     4203    {
     4204        pThis->uDevType = DEV_AHA_1540C;
     4205        pThis->uIsaIrq = 11;
     4206    }
     4207#endif
     4208    else
     4209        return PDMDEV_SET_ERROR(pDevIns, VERR_PDM_DEVINS_UNKNOWN_CFG_VALUES,
     4210                                N_("BusLogic configuration error: invalid AdapterType setting"));
     4211
    41224212    /* Only the first instance defaults to having the ISA compatibility ports enabled. */
    41234213    if (iInstance == 0)
    4124         rc = CFGMR3QueryStringDef(pCfg, "ISACompat", achISACompat, sizeof(achISACompat), "Alternate");
     4214        rc = CFGMR3QueryStringDef(pCfg, "ISACompat", achCfgStr, sizeof(achCfgStr), "Alternate");
    41254215    else
    4126         rc = CFGMR3QueryStringDef(pCfg, "ISACompat", achISACompat, sizeof(achISACompat), "Disabled");
     4216        rc = CFGMR3QueryStringDef(pCfg, "ISACompat", achCfgStr, sizeof(achCfgStr), "Disabled");
    41274217    if (RT_FAILURE(rc))
    41284218        return PDMDEV_SET_ERROR(pDevIns, rc,
    41294219                                N_("BusLogic configuration error: failed to read ISACompat as string"));
    4130     Log(("%s: ISACompat=%s\n", __FUNCTION__, achISACompat));
     4220    Log(("%s: ISACompat=%s\n", __FUNCTION__, achCfgStr));
    41314221
    41324222    /* Grok the ISACompat setting. */
    4133     if (!strcmp(achISACompat, "Disabled"))
     4223    if (!strcmp(achCfgStr, "Disabled"))
    41344224        pThis->uDefaultISABaseCode = ISA_BASE_DISABLED;
    4135     else if (!strcmp(achISACompat, "Primary"))
     4225    else if (!strcmp(achCfgStr, "Primary"))
    41364226        pThis->uDefaultISABaseCode = 0;     /* I/O base at 330h. */
    4137     else if (!strcmp(achISACompat, "Alternate"))
     4227    else if (!strcmp(achCfgStr, "Alternate"))
    41384228        pThis->uDefaultISABaseCode = 1;     /* I/O base at 334h. */
    41394229    else
    … …  
    41424232
    41434233    /*
    4144      * Register the PCI device and its I/O regions.
     4234     * Register the PCI device and its I/O regions if applicable.
    41454235     */
    4146     rc = PDMDevHlpPCIRegister(pDevIns, &pThis->dev);
    4147     if (RT_FAILURE(rc))
    4148         return rc;
    4149 
    4150     rc = PDMDevHlpPCIIORegionRegister(pDevIns, 0, 32, PCI_ADDRESS_SPACE_IO, buslogicR3MmioMap);
    4151     if (RT_FAILURE(rc))
    4152         return rc;
    4153 
    4154     rc = PDMDevHlpPCIIORegionRegister(pDevIns, 1, 32, PCI_ADDRESS_SPACE_MEM, buslogicR3MmioMap);
    4155     if (RT_FAILURE(rc))
    4156         return rc;
     4236    if (!pThis->uIsaIrq)
     4237    {
     4238        rc = PDMDevHlpPCIRegister(pDevIns, &pThis->dev);
     4239        if (RT_FAILURE(rc))
     4240            return rc;
     4241
     4242        rc = PDMDevHlpPCIIORegionRegister(pDevIns, 0, 32, PCI_ADDRESS_SPACE_IO, buslogicR3MmioMap);
     4243        if (RT_FAILURE(rc))
     4244            return rc;
     4245
     4246        rc = PDMDevHlpPCIIORegionRegister(pDevIns, 1, 32, PCI_ADDRESS_SPACE_MEM, buslogicR3MmioMap);
     4247        if (RT_FAILURE(rc))
     4248            return rc;
     4249    }
    41574250
    41584251    if (fBootable)
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