Changeset 75997 in vbox

Timestamp:

Dec 6, 2018 6:45:19 AM (6 years ago)

Author:

vboxsync

Message:

VMM/EM: Nested VMX: bugref:9180 Include APIC-write FF in the high-priority post-execution FF mask. Add VMCPU_FF_INTERRUPT_NESTED_GUEST among the flags we check to reschedule from a MWAIT keeping in mind when virtual posted-interrupts may be implemented.

Location:

trunk

Files:

• include/VBox/vmm/vm.h (modified) (2 diffs)
• src/VBox/VMM/VMMR3/EM.cpp (modified) (5 diffs)

trunk/include/VBox/vmm/vm.h

@@ -592 +592 @@
 #define VM_FF_HIGH_PRIORITY_POST_MASK           (  VM_FF_PGM_NO_MEMORY )
 /** High priority post-execution actions. */
-#define VMCPU_FF_HIGH_PRIORITY_POST_MASK        (  VMCPU_FF_PDM_CRITSECT  | VM_WHEN_RAW_MODE(VMCPU_FF_CSAM_PENDING_ACTION, 0) \
-                                                 | VMCPU_FF_HM_UPDATE_CR3 | VMCPU_FF_HM_UPDATE_PAE_PDPES \
-                                                 | VMCPU_FF_IEM           | VMCPU_FF_IOM )
+#define VMCPU_FF_HIGH_PRIORITY_POST_MASK        (  VMCPU_FF_PDM_CRITSECT   | VM_WHEN_RAW_MODE(VMCPU_FF_CSAM_PENDING_ACTION, 0) \
+                                                 | VMCPU_FF_HM_UPDATE_CR3  | VMCPU_FF_HM_UPDATE_PAE_PDPES \
+                                                 | VMCPU_FF_VMX_APIC_WRITE | VMCPU_FF_IEM | VMCPU_FF_IOM )
 
 /** Normal priority VM post-execution actions. */
@@ -631 +631 @@
                                                  | VMCPU_FF_INTERRUPT_APIC | VMCPU_FF_UPDATE_APIC   | VMCPU_FF_INTERRUPT_PIC \
                                                  | VMCPU_FF_INTERRUPT_NMI  | VMCPU_FF_INTERRUPT_SMI | VMCPU_FF_PDM_CRITSECT \
-                                                 | VMCPU_FF_TIMER          | VMCPU_FF_REQUEST )
+                                                 | VMCPU_FF_TIMER          | VMCPU_FF_REQUEST       \
+                                                 | VMCPU_FF_INTERRUPT_NESTED_GUEST )
 /** VMCPU flags that cause the REP[|NE|E] STRINS loops to yield, interrupts
  *  disabled. */
 #define VMCPU_FF_YIELD_REPSTR_NOINT_MASK        (  VMCPU_FF_YIELD_REPSTR_MASK \
-                                                 & ~(VMCPU_FF_INTERRUPT_APIC | VMCPU_FF_UPDATE_APIC   | VMCPU_FF_INTERRUPT_PIC) )
+                                                 & ~(  VMCPU_FF_INTERRUPT_APIC | VMCPU_FF_UPDATE_APIC | VMCPU_FF_INTERRUPT_PIC \
+                                                     | VMCPU_FF_INTERRUPT_NESTED_GUEST) )
 
 /** VM Flags that cause the HM loops to go back to ring-3. */

trunk/src/VBox/VMM/VMMR3/EM.cpp

@@ -1695 +1695 @@
     }
 
+#ifdef VBOX_WITH_NESTED_HWVIRT_VMX
+        /*
+         * VMX Nested-guest APIC-write pending (can cause VM-exits).
+         * Takes priority over even SMI and INIT signals.
+         * See Intel spec. 29.4.3.2 "APIC-Write Emulation".
+         */
+        if (VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_VMX_APIC_WRITE))
+        {
+            rc = VBOXSTRICTRC_VAL(IEMExecVmxVmexitApicWrite(pVCpu));
+            Assert(rc != VINF_VMX_INTERCEPT_NOT_ACTIVE);
+        }
+#endif
+
 #ifdef VBOX_WITH_RAW_MODE
     if (VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_CSAM_PENDING_ACTION))
@@ -2111 +2124 @@
         }
 
-#ifdef VBOX_WITH_NESTED_HWVIRT_VMX
-        /*
-         * VMX Nested-guest APIC-write VM-exit.
-         * Takes priority over SMI, INIT signals.
-         * See Intel spec. 29.4.3.2 "APIC-Write Emulation".
-         */
-        if (VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_VMX_APIC_WRITE))
-        {
-            rc2 = VBOXSTRICTRC_VAL(IEMExecVmxVmexitApicWrite(pVCpu));
-            if (rc2 == VINF_VMX_INTERCEPT_NOT_ACTIVE)
-                rc2 = VINF_SUCCESS;
-            UPDATE_RC();
-        }
-#endif
-
         /** @todo SMIs. If we implement SMIs, this is where they will have to be
          *        delivered. */
@@ -2195 +2193 @@
             if (fGif)
             {
-                /* In VMX, virtual interrupt takes priority over physical interrupts. */
+                /*
+                 * With VMX, virtual interrupts takes priority over physical interrupts.
+                 * With SVM, physical interrupts takes priority over virtual interrupts.
+                 */
                 if (   VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_INTERRUPT_NESTED_GUEST)
                     && CPUMIsGuestInVmxNonRootMode(&pVCpu->cpum.GstCtx)
@@ -2203 +2204 @@
                     rc2 = VINF_NO_CHANGE;
                 }
-                /* In SVM, physical interrupts take priority over virtual interrupts. */
                 else if (   VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_INTERRUPT_APIC | VMCPU_FF_INTERRUPT_PIC)
                          && CPUMIsGuestPhysIntrEnabled(pVCpu))
@@ -2918 +2918 @@
 
                             if (VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_INTERRUPT_APIC | VMCPU_FF_INTERRUPT_PIC
+                                                         | VMCPU_FF_INTERRUPT_NESTED_GUEST
                                                          | VMCPU_FF_INTERRUPT_NMI  | VMCPU_FF_INTERRUPT_SMI | VMCPU_FF_UNHALT))
                             {