VirtualBox

Changeset 76198 in vbox for trunk/src/VBox/VMM


Ignore:
Timestamp:
Dec 13, 2018 7:17:44 AM (6 years ago)
Author:
vboxsync
Message:

VMM: Nested VMX: bugref:9180 Use Intel terminology of 'allowed-0' and 'allowed-1'.

Location:
trunk/src/VBox/VMM
Files:
3 edited

Legend:

Unmodified
Added
Removed

  • trunk/src/VBox/VMM/VMMAll/IEMAllCImplVmxInstr.cpp.h

    r76050 r76198  
    62276227    VMXCTLSMSR EntryCtls;
    62286228    EntryCtls.u = CPUMGetGuestIa32VmxEntryCtls(pVCpu);
    6229     if (~pVmcs->u32EntryCtls & EntryCtls.n.disallowed0)
     6229    if (~pVmcs->u32EntryCtls & EntryCtls.n.allowed0)
    62306230        IEM_VMX_VMENTRY_FAILED_RET(pVCpu, pszInstr, pszFailure, kVmxVDiag_Vmentry_EntryCtlsDisallowed0);
    62316231
    … …  
    63306330    VMXCTLSMSR ExitCtls;
    63316331    ExitCtls.u = CPUMGetGuestIa32VmxExitCtls(pVCpu);
    6332     if (~pVmcs->u32ExitCtls & ExitCtls.n.disallowed0)
     6332    if (~pVmcs->u32ExitCtls & ExitCtls.n.allowed0)
    63336333        IEM_VMX_VMENTRY_FAILED_RET(pVCpu, pszInstr, pszFailure, kVmxVDiag_Vmentry_ExitCtlsDisallowed0);
    63346334
    … …  
    63856385        VMXCTLSMSR PinCtls;
    63866386        PinCtls.u = CPUMGetGuestIa32VmxPinbasedCtls(pVCpu);
    6387         if (~pVmcs->u32PinCtls & PinCtls.n.disallowed0)
     6387        if (~pVmcs->u32PinCtls & PinCtls.n.allowed0)
    63886388            IEM_VMX_VMENTRY_FAILED_RET(pVCpu, pszInstr, pszFailure, kVmxVDiag_Vmentry_PinCtlsDisallowed0);
    63896389
    … …  
    63966396        VMXCTLSMSR ProcCtls;
    63976397        ProcCtls.u = CPUMGetGuestIa32VmxProcbasedCtls(pVCpu);
    6398         if (~pVmcs->u32ProcCtls & ProcCtls.n.disallowed0)
     6398        if (~pVmcs->u32ProcCtls & ProcCtls.n.allowed0)
    63996399            IEM_VMX_VMENTRY_FAILED_RET(pVCpu, pszInstr, pszFailure, kVmxVDiag_Vmentry_ProcCtlsDisallowed0);
    64006400
    … …  
    64086408        VMXCTLSMSR ProcCtls2;
    64096409        ProcCtls2.u = CPUMGetGuestIa32VmxProcbasedCtls2(pVCpu);
    6410         if (~pVmcs->u32ProcCtls2 & ProcCtls2.n.disallowed0)
     6410        if (~pVmcs->u32ProcCtls2 & ProcCtls2.n.allowed0)
    64116411            IEM_VMX_VMENTRY_FAILED_RET(pVCpu, pszInstr, pszFailure, kVmxVDiag_Vmentry_ProcCtls2Disallowed0);
    64126412

  • trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp

    r76136 r76198  
    22882288{
    22892289    PVM pVM = pVCpu->CTX_SUFF(pVM);
    2290     uint32_t       fVal = pVM->hm.s.vmx.Msrs.PinCtls.n.disallowed0;   /* Bits set here must always be set. */
     2290    uint32_t       fVal = pVM->hm.s.vmx.Msrs.PinCtls.n.allowed0;      /* Bits set here must always be set. */
    22912291    uint32_t const fZap = pVM->hm.s.vmx.Msrs.PinCtls.n.allowed1;      /* Bits cleared here must always be cleared. */
    22922292
    … …  
    23172317    {
    23182318        LogRelFunc(("Invalid pin-based VM-execution controls combo! Cpu=%#RX32 fVal=%#RX32 fZap=%#RX32\n",
    2319                     pVM->hm.s.vmx.Msrs.PinCtls.n.disallowed0, fVal, fZap));
     2319                    pVM->hm.s.vmx.Msrs.PinCtls.n.allowed0, fVal, fZap));
    23202320        pVCpu->hm.s.u32HMError = VMX_UFC_CTRL_PIN_EXEC;
    23212321        return VERR_HM_UNSUPPORTED_CPU_FEATURE_COMBO;
    … …  
    23432343{
    23442344    PVM pVM = pVCpu->CTX_SUFF(pVM);
    2345     uint32_t       fVal = pVM->hm.s.vmx.Msrs.ProcCtls2.n.disallowed0; /* Bits set here must be set in the VMCS. */
     2345    uint32_t       fVal = pVM->hm.s.vmx.Msrs.ProcCtls2.n.allowed0;    /* Bits set here must be set in the VMCS. */
    23462346    uint32_t const fZap = pVM->hm.s.vmx.Msrs.ProcCtls2.n.allowed1;    /* Bits cleared here must be cleared in the VMCS. */
    23472347
    … …  
    24142414    {
    24152415        LogRelFunc(("Invalid secondary processor-based VM-execution controls combo! cpu=%#RX32 fVal=%#RX32 fZap=%#RX32\n",
    2416                     pVM->hm.s.vmx.Msrs.ProcCtls2.n.disallowed0, fVal, fZap));
     2416                    pVM->hm.s.vmx.Msrs.ProcCtls2.n.allowed0, fVal, fZap));
    24172417        pVCpu->hm.s.u32HMError = VMX_UFC_CTRL_PROC_EXEC2;
    24182418        return VERR_HM_UNSUPPORTED_CPU_FEATURE_COMBO;
    … …  
    24402440{
    24412441    PVM pVM = pVCpu->CTX_SUFF(pVM);
    2442     uint32_t       fVal = pVM->hm.s.vmx.Msrs.ProcCtls.n.disallowed0;  /* Bits set here must be set in the VMCS. */
     2442    uint32_t       fVal = pVM->hm.s.vmx.Msrs.ProcCtls.n.allowed0;     /* Bits set here must be set in the VMCS. */
    24432443    uint32_t const fZap = pVM->hm.s.vmx.Msrs.ProcCtls.n.allowed1;     /* Bits cleared here must be cleared in the VMCS. */
    24442444
    … …  
    24532453    /* We toggle VMX_PROC_CTLS_MOV_DR_EXIT later, check if it's not -always- needed to be set or clear. */
    24542454    if (   !(pVM->hm.s.vmx.Msrs.ProcCtls.n.allowed1 & VMX_PROC_CTLS_MOV_DR_EXIT)
    2455         ||  (pVM->hm.s.vmx.Msrs.ProcCtls.n.disallowed0 & VMX_PROC_CTLS_MOV_DR_EXIT))
     2455        ||  (pVM->hm.s.vmx.Msrs.ProcCtls.n.allowed0 & VMX_PROC_CTLS_MOV_DR_EXIT))
    24562456    {
    24572457        LogRelFunc(("Unsupported VMX_PROC_CTLS_MOV_DR_EXIT combo!"));
    … …  
    25452545    {
    25462546        LogRelFunc(("Invalid processor-based VM-execution controls combo! cpu=%#RX32 fVal=%#RX32 fZap=%#RX32\n",
    2547                     pVM->hm.s.vmx.Msrs.ProcCtls.n.disallowed0, fVal, fZap));
     2547                    pVM->hm.s.vmx.Msrs.ProcCtls.n.allowed0, fVal, fZap));
    25482548        pVCpu->hm.s.u32HMError = VMX_UFC_CTRL_PROC_EXEC;
    25492549        return VERR_HM_UNSUPPORTED_CPU_FEATURE_COMBO;
    … …  
    32273227    {
    32283228        PVM pVM = pVCpu->CTX_SUFF(pVM);
    3229         uint32_t       fVal = pVM->hm.s.vmx.Msrs.EntryCtls.n.disallowed0; /* Bits set here must be set in the VMCS. */
     3229        uint32_t       fVal = pVM->hm.s.vmx.Msrs.EntryCtls.n.allowed0;    /* Bits set here must be set in the VMCS. */
    32303230        uint32_t const fZap = pVM->hm.s.vmx.Msrs.EntryCtls.n.allowed1;    /* Bits cleared here must be cleared in the VMCS. */
    32313231
    … …  
    32613261        if ((fVal & fZap) != fVal)
    32623262        {
    3263             Log4Func(("Invalid VM-entry controls combo! Cpu=%RX32 fVal=%RX32 fZap=%RX32\n",
    3264                       pVM->hm.s.vmx.Msrs.EntryCtls.n.disallowed0, fVal, fZap));
     3263            Log4Func(("Invalid VM-entry controls combo! Cpu=%#RX32 fVal=%#RX32 fZap=%#RX32\n",
     3264                      pVM->hm.s.vmx.Msrs.EntryCtls.n.allowed0, fVal, fZap));
    32653265            pVCpu->hm.s.u32HMError = VMX_UFC_CTRL_ENTRY;
    32663266            return VERR_HM_UNSUPPORTED_CPU_FEATURE_COMBO;
    … …  
    32943294    {
    32953295        PVM pVM = pVCpu->CTX_SUFF(pVM);
    3296         uint32_t       fVal = pVM->hm.s.vmx.Msrs.ExitCtls.n.disallowed0;  /* Bits set here must be set in the VMCS. */
     3296        uint32_t       fVal = pVM->hm.s.vmx.Msrs.ExitCtls.n.allowed0;     /* Bits set here must be set in the VMCS. */
    32973297        uint32_t const fZap = pVM->hm.s.vmx.Msrs.ExitCtls.n.allowed1;     /* Bits cleared here must be cleared in the VMCS. */
    32983298
    … …  
    33453345        if ((fVal & fZap) != fVal)
    33463346        {
    3347             LogRelFunc(("Invalid VM-exit controls combo! cpu=%RX32 fVal=%RX32 fZap=%RX32\n",
    3348                         pVM->hm.s.vmx.Msrs.ExitCtls.n.disallowed0, fVal, fZap));
     3347            LogRelFunc(("Invalid VM-exit controls combo! cpu=%#RX32 fVal=%#RX32 fZap=%R#X32\n",
     3348                        pVM->hm.s.vmx.Msrs.ExitCtls.n.allowed0, fVal, fZap));
    33493349            pVCpu->hm.s.u32HMError = VMX_UFC_CTRL_EXIT;
    33503350            return VERR_HM_UNSUPPORTED_CPU_FEATURE_COMBO;
    … …  
    94359435        pDbgState->fCpe1Extra   |= VMX_PROC_CTLS_USE_SECONDARY_CTLS;
    94369436    pDbgState->fCpe1Extra       &= pVM->hm.s.vmx.Msrs.ProcCtls.n.allowed1;
    9437     pDbgState->fCpe1Unwanted    &= ~pVM->hm.s.vmx.Msrs.ProcCtls.n.disallowed0;
     9437    pDbgState->fCpe1Unwanted    &= ~pVM->hm.s.vmx.Msrs.ProcCtls.n.allowed0;
    94389438    if (pVCpu->hm.s.fDebugWantRdTscExit != RT_BOOL(pDbgState->fCpe1Extra & VMX_PROC_CTLS_RDTSC_EXIT))
    94399439    {

  • trunk/src/VBox/VMM/VMMR3/HM.cpp

    r76137 r76198  
    333333 * Reports VT-x feature to the release log.
    334334 *
    335  * @param   allowed1        Mask of allowed feature bits.
    336  * @param   disallowed0     Mask of disallowed feature bits.
    337  * @param   strdesc         The description string to report.
    338  * @param   featflag        Mask of the feature to report.
    339  */
    340 #define HMVMX_REPORT_FEAT(allowed1, disallowed0, strdesc, featflag) \
     335 * @param   a_uAllowed1       Mask of allowed-1 feature bits.
     336 * @param   a_uAllowed0       Mask of allowed-0 feature bits.
     337 * @param   a_StrDesc         The description string to report.
     338 * @param   a_Featflag        Mask of the feature to report.
     339 */
     340#define HMVMX_REPORT_FEAT(a_uAllowed1, a_uAllowed0, a_StrDesc, a_Featflag) \
    341341    do { \
    342         if ((allowed1) & (featflag)) \
     342        if ((a_uAllowed1) & (a_Featflag)) \
    343343        { \
    344             if ((disallowed0) & (featflag)) \
    345                 LogRel(("HM:   " strdesc " (must be set)\n")); \
     344            if ((a_uAllowed0) & (a_Featflag)) \
     345                LogRel(("HM:   " a_StrDesc " (must be set)\n")); \
    346346            else \
    347                 LogRel(("HM:   " strdesc "\n")); \
     347                LogRel(("HM:   " a_StrDesc "\n")); \
    348348        } \
    349349        else \
    350             LogRel(("HM:   " strdesc " (must be cleared)\n")); \
     350            LogRel(("HM:   " a_StrDesc " (must be cleared)\n")); \
    351351    } while (0)
    352352
    … …  
    354354 * Reports an allowed VT-x feature to the release log.
    355355 *
    356  * @param   allowed1        Mask of allowed feature bits.
    357  * @param   strdesc         The description string to report.
    358  * @param   featflag        Mask of the feature to report.
    359  */
    360 #define HMVMX_REPORT_ALLOWED_FEAT(allowed1, strdesc, featflag) \
     356 * @param   a_uAllowed1     Mask of allowed-1 feature bits.
     357 * @param   a_StrDesc       The description string to report.
     358 * @param   a_FeatFlag      Mask of the feature to report.
     359 */
     360#define HMVMX_REPORT_ALLOWED_FEAT(a_uAllowed1, a_StrDesc, a_FeatFlag) \
    361361    do { \
    362         if ((allowed1) & (featflag)) \
    363             LogRel(("HM:   " strdesc "\n")); \
     362        if ((a_uAllowed1) & (a_FeatFlag)) \
     363            LogRel(("HM:   " a_StrDesc "\n")); \
    364364        else \
    365             LogRel(("HM:   " strdesc " not supported\n")); \
     365            LogRel(("HM:   " a_StrDesc " not supported\n")); \
    366366    } while (0)
    367367
    … …  
    369369 * Reports MSR feature capability.
    370370 *
    371  * @param   msrcaps         Mask of MSR feature bits.
    372  * @param   strdesc         The description string to report.
    373  * @param   cap             Mask of the feature to report.
    374  */
    375 #define HMVMX_REPORT_MSR_CAP(msrcaps, strdesc, cap) \
     371 * @param   a_MsrCaps           Mask of MSR feature bits.
     372 * @param   a_StrDesc           The description string to report.
     373 * @param   a_fCap              Mask of the feature to report.
     374 */
     375#define HMVMX_REPORT_MSR_CAP(a_MsrCaps, a_StrDesc, a_fCap) \
    376376    do { \
    377         if ((msrcaps) & (cap)) \
    378             LogRel(("HM:   " strdesc "\n")); \
     377        if ((a_MsrCaps) & (a_fCap)) \
     378            LogRel(("HM:   " a_StrDesc "\n")); \
    379379    } while (0)
    380380
    … …  
    14431443static void hmR3VmxReportPinBasedCtlsMsr(PCVMXCTLSMSR pVmxMsr)
    14441444{
    1445     uint64_t const val = pVmxMsr->n.allowed1;
    1446     uint64_t const zap = pVmxMsr->n.disallowed0;
     1445    uint64_t const fAllowed1 = pVmxMsr->n.allowed1;
     1446    uint64_t const fAllowed0 = pVmxMsr->n.allowed0;
    14471447    LogRel(("HM: MSR_IA32_VMX_PINBASED_CTLS        = %#RX64\n", pVmxMsr->u));
    1448     HMVMX_REPORT_FEAT(val, zap, "EXT_INT_EXIT",  VMX_PIN_CTLS_EXT_INT_EXIT);
    1449     HMVMX_REPORT_FEAT(val, zap, "NMI_EXIT",      VMX_PIN_CTLS_NMI_EXIT);
    1450     HMVMX_REPORT_FEAT(val, zap, "VIRTUAL_NMI",   VMX_PIN_CTLS_VIRT_NMI);
    1451     HMVMX_REPORT_FEAT(val, zap, "PREEMPT_TIMER", VMX_PIN_CTLS_PREEMPT_TIMER);
    1452     HMVMX_REPORT_FEAT(val, zap, "POSTED_INT",    VMX_PIN_CTLS_POSTED_INT);
     1448    HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "EXT_INT_EXIT",  VMX_PIN_CTLS_EXT_INT_EXIT);
     1449    HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "NMI_EXIT",      VMX_PIN_CTLS_NMI_EXIT);
     1450    HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "VIRTUAL_NMI",   VMX_PIN_CTLS_VIRT_NMI);
     1451    HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "PREEMPT_TIMER", VMX_PIN_CTLS_PREEMPT_TIMER);
     1452    HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "POSTED_INT",    VMX_PIN_CTLS_POSTED_INT);
    14531453}
    14541454
    … …  
    14611461static void hmR3VmxReportProcBasedCtlsMsr(PCVMXCTLSMSR pVmxMsr)
    14621462{
    1463     uint64_t const val = pVmxMsr->n.allowed1;
    1464     uint64_t const zap = pVmxMsr->n.disallowed0;
     1463    uint64_t const fAllowed1 = pVmxMsr->n.allowed1;
     1464    uint64_t const fAllowed0 = pVmxMsr->n.allowed0;
    14651465    LogRel(("HM: MSR_IA32_VMX_PROCBASED_CTLS       = %#RX64\n", pVmxMsr->u));
    1466     HMVMX_REPORT_FEAT(val, zap, "INT_WINDOW_EXIT",         VMX_PROC_CTLS_INT_WINDOW_EXIT);
    1467     HMVMX_REPORT_FEAT(val, zap, "USE_TSC_OFFSETTING",      VMX_PROC_CTLS_USE_TSC_OFFSETTING);
    1468     HMVMX_REPORT_FEAT(val, zap, "HLT_EXIT",                VMX_PROC_CTLS_HLT_EXIT);
    1469     HMVMX_REPORT_FEAT(val, zap, "INVLPG_EXIT",             VMX_PROC_CTLS_INVLPG_EXIT);
    1470     HMVMX_REPORT_FEAT(val, zap, "MWAIT_EXIT",              VMX_PROC_CTLS_MWAIT_EXIT);
    1471     HMVMX_REPORT_FEAT(val, zap, "RDPMC_EXIT",              VMX_PROC_CTLS_RDPMC_EXIT);
    1472     HMVMX_REPORT_FEAT(val, zap, "RDTSC_EXIT",              VMX_PROC_CTLS_RDTSC_EXIT);
    1473     HMVMX_REPORT_FEAT(val, zap, "CR3_LOAD_EXIT",           VMX_PROC_CTLS_CR3_LOAD_EXIT);
    1474     HMVMX_REPORT_FEAT(val, zap, "CR3_STORE_EXIT",          VMX_PROC_CTLS_CR3_STORE_EXIT);
    1475     HMVMX_REPORT_FEAT(val, zap, "CR8_LOAD_EXIT",           VMX_PROC_CTLS_CR8_LOAD_EXIT);
    1476     HMVMX_REPORT_FEAT(val, zap, "CR8_STORE_EXIT",          VMX_PROC_CTLS_CR8_STORE_EXIT);
    1477     HMVMX_REPORT_FEAT(val, zap, "USE_TPR_SHADOW",          VMX_PROC_CTLS_USE_TPR_SHADOW);
    1478     HMVMX_REPORT_FEAT(val, zap, "NMI_WINDOW_EXIT",         VMX_PROC_CTLS_NMI_WINDOW_EXIT);
    1479     HMVMX_REPORT_FEAT(val, zap, "MOV_DR_EXIT",             VMX_PROC_CTLS_MOV_DR_EXIT);
    1480     HMVMX_REPORT_FEAT(val, zap, "UNCOND_IO_EXIT",          VMX_PROC_CTLS_UNCOND_IO_EXIT);
    1481     HMVMX_REPORT_FEAT(val, zap, "USE_IO_BITMAPS",          VMX_PROC_CTLS_USE_IO_BITMAPS);
    1482     HMVMX_REPORT_FEAT(val, zap, "MONITOR_TRAP_FLAG",       VMX_PROC_CTLS_MONITOR_TRAP_FLAG);
    1483     HMVMX_REPORT_FEAT(val, zap, "USE_MSR_BITMAPS",         VMX_PROC_CTLS_USE_MSR_BITMAPS);
    1484     HMVMX_REPORT_FEAT(val, zap, "MONITOR_EXIT",            VMX_PROC_CTLS_MONITOR_EXIT);
    1485     HMVMX_REPORT_FEAT(val, zap, "PAUSE_EXIT",              VMX_PROC_CTLS_PAUSE_EXIT);
    1486     HMVMX_REPORT_FEAT(val, zap, "USE_SECONDARY_CTLS",      VMX_PROC_CTLS_USE_SECONDARY_CTLS);
     1466    HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "INT_WINDOW_EXIT",         VMX_PROC_CTLS_INT_WINDOW_EXIT);
     1467    HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "USE_TSC_OFFSETTING",      VMX_PROC_CTLS_USE_TSC_OFFSETTING);
     1468    HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "HLT_EXIT",                VMX_PROC_CTLS_HLT_EXIT);
     1469    HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "INVLPG_EXIT",             VMX_PROC_CTLS_INVLPG_EXIT);
     1470    HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "MWAIT_EXIT",              VMX_PROC_CTLS_MWAIT_EXIT);
     1471    HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "RDPMC_EXIT",              VMX_PROC_CTLS_RDPMC_EXIT);
     1472    HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "RDTSC_EXIT",              VMX_PROC_CTLS_RDTSC_EXIT);
     1473    HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "CR3_LOAD_EXIT",           VMX_PROC_CTLS_CR3_LOAD_EXIT);
     1474    HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "CR3_STORE_EXIT",          VMX_PROC_CTLS_CR3_STORE_EXIT);
     1475    HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "CR8_LOAD_EXIT",           VMX_PROC_CTLS_CR8_LOAD_EXIT);
     1476    HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "CR8_STORE_EXIT",          VMX_PROC_CTLS_CR8_STORE_EXIT);
     1477    HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "USE_TPR_SHADOW",          VMX_PROC_CTLS_USE_TPR_SHADOW);
     1478    HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "NMI_WINDOW_EXIT",         VMX_PROC_CTLS_NMI_WINDOW_EXIT);
     1479    HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "MOV_DR_EXIT",             VMX_PROC_CTLS_MOV_DR_EXIT);
     1480    HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "UNCOND_IO_EXIT",          VMX_PROC_CTLS_UNCOND_IO_EXIT);
     1481    HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "USE_IO_BITMAPS",          VMX_PROC_CTLS_USE_IO_BITMAPS);
     1482    HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "MONITOR_TRAP_FLAG",       VMX_PROC_CTLS_MONITOR_TRAP_FLAG);
     1483    HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "USE_MSR_BITMAPS",         VMX_PROC_CTLS_USE_MSR_BITMAPS);
     1484    HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "MONITOR_EXIT",            VMX_PROC_CTLS_MONITOR_EXIT);
     1485    HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "PAUSE_EXIT",              VMX_PROC_CTLS_PAUSE_EXIT);
     1486    HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "USE_SECONDARY_CTLS",      VMX_PROC_CTLS_USE_SECONDARY_CTLS);
    14871487}
    14881488
    … …  
    14951495static void hmR3VmxReportProcBasedCtls2Msr(PCVMXCTLSMSR pVmxMsr)
    14961496{
    1497     uint64_t const val = pVmxMsr->n.allowed1;
    1498     uint64_t const zap = pVmxMsr->n.disallowed0;
     1497    uint64_t const fAllowed1 = pVmxMsr->n.allowed1;
     1498    uint64_t const fAllowed0 = pVmxMsr->n.allowed0;
    14991499    LogRel(("HM: MSR_IA32_VMX_PROCBASED_CTLS2      = %#RX64\n", pVmxMsr->u));
    1500     HMVMX_REPORT_FEAT(val, zap, "VIRT_APIC_ACCESS",      VMX_PROC_CTLS2_VIRT_APIC_ACCESS);
    1501     HMVMX_REPORT_FEAT(val, zap, "EPT",                   VMX_PROC_CTLS2_EPT);
    1502     HMVMX_REPORT_FEAT(val, zap, "DESC_TABLE_EXIT",       VMX_PROC_CTLS2_DESC_TABLE_EXIT);
    1503     HMVMX_REPORT_FEAT(val, zap, "RDTSCP",                VMX_PROC_CTLS2_RDTSCP);
    1504     HMVMX_REPORT_FEAT(val, zap, "VIRT_X2APIC_MODE",      VMX_PROC_CTLS2_VIRT_X2APIC_MODE);
    1505     HMVMX_REPORT_FEAT(val, zap, "VPID",                  VMX_PROC_CTLS2_VPID);
    1506     HMVMX_REPORT_FEAT(val, zap, "WBINVD_EXIT",           VMX_PROC_CTLS2_WBINVD_EXIT);
    1507     HMVMX_REPORT_FEAT(val, zap, "UNRESTRICTED_GUEST",    VMX_PROC_CTLS2_UNRESTRICTED_GUEST);
    1508     HMVMX_REPORT_FEAT(val, zap, "APIC_REG_VIRT",         VMX_PROC_CTLS2_APIC_REG_VIRT);
    1509     HMVMX_REPORT_FEAT(val, zap, "VIRT_INT_DELIVERY",     VMX_PROC_CTLS2_VIRT_INT_DELIVERY);
    1510     HMVMX_REPORT_FEAT(val, zap, "PAUSE_LOOP_EXIT",       VMX_PROC_CTLS2_PAUSE_LOOP_EXIT);
    1511     HMVMX_REPORT_FEAT(val, zap, "RDRAND_EXIT",           VMX_PROC_CTLS2_RDRAND_EXIT);
    1512     HMVMX_REPORT_FEAT(val, zap, "INVPCID",               VMX_PROC_CTLS2_INVPCID);
    1513     HMVMX_REPORT_FEAT(val, zap, "VMFUNC",                VMX_PROC_CTLS2_VMFUNC);
    1514     HMVMX_REPORT_FEAT(val, zap, "VMCS_SHADOWING",        VMX_PROC_CTLS2_VMCS_SHADOWING);
    1515     HMVMX_REPORT_FEAT(val, zap, "ENCLS_EXIT",            VMX_PROC_CTLS2_ENCLS_EXIT);
    1516     HMVMX_REPORT_FEAT(val, zap, "RDSEED_EXIT",           VMX_PROC_CTLS2_RDSEED_EXIT);
    1517     HMVMX_REPORT_FEAT(val, zap, "PML",                   VMX_PROC_CTLS2_PML);
    1518     HMVMX_REPORT_FEAT(val, zap, "EPT_VE",                VMX_PROC_CTLS2_EPT_VE);
    1519     HMVMX_REPORT_FEAT(val, zap, "CONCEAL_FROM_PT",       VMX_PROC_CTLS2_CONCEAL_FROM_PT);
    1520     HMVMX_REPORT_FEAT(val, zap, "XSAVES_XRSTORS",        VMX_PROC_CTLS2_XSAVES_XRSTORS);
    1521     HMVMX_REPORT_FEAT(val, zap, "TSC_SCALING",           VMX_PROC_CTLS2_TSC_SCALING);
     1500    HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "VIRT_APIC_ACCESS",      VMX_PROC_CTLS2_VIRT_APIC_ACCESS);
     1501    HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "EPT",                   VMX_PROC_CTLS2_EPT);
     1502    HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "DESC_TABLE_EXIT",       VMX_PROC_CTLS2_DESC_TABLE_EXIT);
     1503    HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "RDTSCP",                VMX_PROC_CTLS2_RDTSCP);
     1504    HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "VIRT_X2APIC_MODE",      VMX_PROC_CTLS2_VIRT_X2APIC_MODE);
     1505    HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "VPID",                  VMX_PROC_CTLS2_VPID);
     1506    HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "WBINVD_EXIT",           VMX_PROC_CTLS2_WBINVD_EXIT);
     1507    HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "UNRESTRICTED_GUEST",    VMX_PROC_CTLS2_UNRESTRICTED_GUEST);
     1508    HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "APIC_REG_VIRT",         VMX_PROC_CTLS2_APIC_REG_VIRT);
     1509    HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "VIRT_INT_DELIVERY",     VMX_PROC_CTLS2_VIRT_INT_DELIVERY);
     1510    HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "PAUSE_LOOP_EXIT",       VMX_PROC_CTLS2_PAUSE_LOOP_EXIT);
     1511    HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "RDRAND_EXIT",           VMX_PROC_CTLS2_RDRAND_EXIT);
     1512    HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "INVPCID",               VMX_PROC_CTLS2_INVPCID);
     1513    HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "VMFUNC",                VMX_PROC_CTLS2_VMFUNC);
     1514    HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "VMCS_SHADOWING",        VMX_PROC_CTLS2_VMCS_SHADOWING);
     1515    HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "ENCLS_EXIT",            VMX_PROC_CTLS2_ENCLS_EXIT);
     1516    HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "RDSEED_EXIT",           VMX_PROC_CTLS2_RDSEED_EXIT);
     1517    HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "PML",                   VMX_PROC_CTLS2_PML);
     1518    HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "EPT_VE",                VMX_PROC_CTLS2_EPT_VE);
     1519    HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "CONCEAL_FROM_PT",       VMX_PROC_CTLS2_CONCEAL_FROM_PT);
     1520    HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "XSAVES_XRSTORS",        VMX_PROC_CTLS2_XSAVES_XRSTORS);
     1521    HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "TSC_SCALING",           VMX_PROC_CTLS2_TSC_SCALING);
    15221522}
    15231523
    … …  
    15301530static void hmR3VmxReportEntryCtlsMsr(PCVMXCTLSMSR pVmxMsr)
    15311531{
    1532     uint64_t const val = pVmxMsr->n.allowed1;
    1533     uint64_t const zap = pVmxMsr->n.disallowed0;
     1532    uint64_t const fAllowed1 = pVmxMsr->n.allowed1;
     1533    uint64_t const fAllowed0 = pVmxMsr->n.allowed0;
    15341534    LogRel(("HM: MSR_IA32_VMX_ENTRY_CTLS           = %#RX64\n", pVmxMsr->u));
    1535     HMVMX_REPORT_FEAT(val, zap, "LOAD_DEBUG",          VMX_ENTRY_CTLS_LOAD_DEBUG);
    1536     HMVMX_REPORT_FEAT(val, zap, "IA32E_MODE_GUEST",    VMX_ENTRY_CTLS_IA32E_MODE_GUEST);
    1537     HMVMX_REPORT_FEAT(val, zap, "ENTRY_TO_SMM",        VMX_ENTRY_CTLS_ENTRY_TO_SMM);
    1538     HMVMX_REPORT_FEAT(val, zap, "DEACTIVATE_DUAL_MON", VMX_ENTRY_CTLS_DEACTIVATE_DUAL_MON);
    1539     HMVMX_REPORT_FEAT(val, zap, "LOAD_PERF_MSR",       VMX_ENTRY_CTLS_LOAD_PERF_MSR);
    1540     HMVMX_REPORT_FEAT(val, zap, "LOAD_PAT_MSR",        VMX_ENTRY_CTLS_LOAD_PAT_MSR);
    1541     HMVMX_REPORT_FEAT(val, zap, "LOAD_EFER_MSR",       VMX_ENTRY_CTLS_LOAD_EFER_MSR);
     1535    HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "LOAD_DEBUG",          VMX_ENTRY_CTLS_LOAD_DEBUG);
     1536    HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "IA32E_MODE_GUEST",    VMX_ENTRY_CTLS_IA32E_MODE_GUEST);
     1537    HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "ENTRY_TO_SMM",        VMX_ENTRY_CTLS_ENTRY_TO_SMM);
     1538    HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "DEACTIVATE_DUAL_MON", VMX_ENTRY_CTLS_DEACTIVATE_DUAL_MON);
     1539    HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "LOAD_PERF_MSR",       VMX_ENTRY_CTLS_LOAD_PERF_MSR);
     1540    HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "LOAD_PAT_MSR",        VMX_ENTRY_CTLS_LOAD_PAT_MSR);
     1541    HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "LOAD_EFER_MSR",       VMX_ENTRY_CTLS_LOAD_EFER_MSR);
    15421542}
    15431543
    … …  
    15501550static void hmR3VmxReportExitCtlsMsr(PCVMXCTLSMSR pVmxMsr)
    15511551{
    1552     uint64_t const val = pVmxMsr->n.allowed1;
    1553     uint64_t const zap = pVmxMsr->n.disallowed0;
     1552    uint64_t const fAllowed1 = pVmxMsr->n.allowed1;
     1553    uint64_t const fAllowed0 = pVmxMsr->n.allowed0;
    15541554    LogRel(("HM: MSR_IA32_VMX_EXIT_CTLS            = %#RX64\n", pVmxMsr->u));
    1555     HMVMX_REPORT_FEAT(val, zap, "SAVE_DEBUG",             VMX_EXIT_CTLS_SAVE_DEBUG);
    1556     HMVMX_REPORT_FEAT(val, zap, "HOST_ADDR_SPACE_SIZE",   VMX_EXIT_CTLS_HOST_ADDR_SPACE_SIZE);
    1557     HMVMX_REPORT_FEAT(val, zap, "LOAD_PERF_MSR",          VMX_EXIT_CTLS_LOAD_PERF_MSR);
    1558     HMVMX_REPORT_FEAT(val, zap, "ACK_EXT_INT",            VMX_EXIT_CTLS_ACK_EXT_INT);
    1559     HMVMX_REPORT_FEAT(val, zap, "SAVE_PAT_MSR",           VMX_EXIT_CTLS_SAVE_PAT_MSR);
    1560     HMVMX_REPORT_FEAT(val, zap, "LOAD_PAT_MSR",           VMX_EXIT_CTLS_LOAD_PAT_MSR);
    1561     HMVMX_REPORT_FEAT(val, zap, "SAVE_EFER_MSR",          VMX_EXIT_CTLS_SAVE_EFER_MSR);
    1562     HMVMX_REPORT_FEAT(val, zap, "LOAD_EFER_MSR",          VMX_EXIT_CTLS_LOAD_EFER_MSR);
    1563     HMVMX_REPORT_FEAT(val, zap, "SAVE_PREEMPT_TIMER",     VMX_EXIT_CTLS_SAVE_PREEMPT_TIMER);
     1555    HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "SAVE_DEBUG",             VMX_EXIT_CTLS_SAVE_DEBUG);
     1556    HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "HOST_ADDR_SPACE_SIZE",   VMX_EXIT_CTLS_HOST_ADDR_SPACE_SIZE);
     1557    HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "LOAD_PERF_MSR",          VMX_EXIT_CTLS_LOAD_PERF_MSR);
     1558    HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "ACK_EXT_INT",            VMX_EXIT_CTLS_ACK_EXT_INT);
     1559    HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "SAVE_PAT_MSR",           VMX_EXIT_CTLS_SAVE_PAT_MSR);
     1560    HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "LOAD_PAT_MSR",           VMX_EXIT_CTLS_LOAD_PAT_MSR);
     1561    HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "SAVE_EFER_MSR",          VMX_EXIT_CTLS_SAVE_EFER_MSR);
     1562    HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "LOAD_EFER_MSR",          VMX_EXIT_CTLS_LOAD_EFER_MSR);
     1563    HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "SAVE_PREEMPT_TIMER",     VMX_EXIT_CTLS_SAVE_PREEMPT_TIMER);
    15641564}
    15651565
    … …  
    32083208    if (iStatusCode == VERR_VMX_UNABLE_TO_START_VM)
    32093209    {
    3210         LogRel(("HM: VERR_VMX_UNABLE_TO_START_VM: VM-entry allowed    %#RX32\n", pVM->hm.s.vmx.Msrs.EntryCtls.n.allowed1));
    3211         LogRel(("HM: VERR_VMX_UNABLE_TO_START_VM: VM-entry disallowed %#RX32\n", pVM->hm.s.vmx.Msrs.EntryCtls.n.disallowed0));
     3210        LogRel(("HM: VERR_VMX_UNABLE_TO_START_VM: VM-entry allowed-1  %#RX32\n", pVM->hm.s.vmx.Msrs.EntryCtls.n.allowed1));
     3211        LogRel(("HM: VERR_VMX_UNABLE_TO_START_VM: VM-entry allowed-0  %#RX32\n", pVM->hm.s.vmx.Msrs.EntryCtls.n.allowed0));
    32123212    }
    32133213    else if (iStatusCode == VERR_VMX_INVALID_VMXON_PTR)
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