Changeset 76550 in vbox

Timestamp:

Dec 31, 2018 4:15:57 AM (6 years ago)

Author:

vboxsync

Message:

VMM/CPUM: Nested VMX: bugref:9180 Fix reporting CR0, CR4 fixed-1 bits according to real hardware.

Location:

trunk/src/VBox/VMM/VMMR3

Files:

• CPUM.cpp (modified) (2 diffs)
• CPUMR3CpuId.cpp (modified) (1 diff)

trunk/src/VBox/VMM/VMMR3/CPUM.cpp

@@ -1422 +1422 @@
 
     /* CR0 Fixed-0. */
-    pGuestVmxMsrs->u64Cr0Fixed0 = pGuestFeatures->fVmxUnrestrictedGuest ? VMX_V_CR0_FIXED0_UX:  VMX_V_CR0_FIXED0;
+    pGuestVmxMsrs->u64Cr0Fixed0 = pGuestFeatures->fVmxUnrestrictedGuest ? VMX_V_CR0_FIXED0_UX: VMX_V_CR0_FIXED0;
 
     /* CR0 Fixed-1. */
     {
-        uint64_t const uHostMsr = fIsNstGstHwExecAllowed ? pHostVmxMsrs->u64Cr0Fixed1 : 0;
+        /*
+         * All CPUs I've looked at so far report CR0 fixed-1 bits as 0xffffffff.
+         * This is different from CR4 fixed-1 bits which are reported as per the
+         * CPU features and/or micro-architecture/generation. Why? Ask Intel.
+         */
+        uint64_t const uHostMsr = fIsNstGstHwExecAllowed ? pHostVmxMsrs->u64Cr0Fixed1 : 0xffffffff;
         pGuestVmxMsrs->u64Cr0Fixed1 = uHostMsr | VMX_V_CR0_FIXED0;   /* Make sure the CR0 MB1 bits are not clear. */
     }
@@ -1435 +1440 @@
     /* CR4 Fixed-1. */
     {
-        uint64_t const uHostMsr = fIsNstGstHwExecAllowed ? pHostVmxMsrs->u64Cr4Fixed1 : 0;
+        uint64_t const uHostMsr = fIsNstGstHwExecAllowed ? pHostVmxMsrs->u64Cr4Fixed1 : CPUMGetGuestCR4ValidMask(pVM);
         pGuestVmxMsrs->u64Cr4Fixed1 = uHostMsr | VMX_V_CR4_FIXED0;   /* Make sure the CR4 MB1 bits are not clear. */
     }

trunk/src/VBox/VMM/VMMR3/CPUMR3CpuId.cpp

@@ -4462 +4462 @@
          *
          * This needs to be done -after- exploding guest features and sanitizing CPUID leaves
-         * as constructing VMX capabilities MSRs rely on CPU feature bits such as long mode,
-         * unrestricted execution and possibly more in the future.
+         * as constructing VMX capabilities MSRs rely on CPU feature bits like long mode,
+         * unrestricted-guest execution, CR4 feature bits and possibly more in the future.
          */
         if (pVM->cpum.s.GuestFeatures.fVmx)