VirtualBox

Changeset 76637 in vbox for trunk


Ignore:
Timestamp:
Jan 4, 2019 3:46:42 PM (6 years ago)
Author:
vboxsync
Message:

VMM/HMVMXR0: Nested VMX: bugref:9180 When IEM-only execution is used, fallback to ring-3 for the time being to make debugging easier. When this eventually works we can enable ring-0 IEM-only execution.
Also added missing VMX instruction VM-exit handlers when not using the function table approach.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp

    r76553 r76637  
    1036310363        case VMX_EXIT_GETSEC:                  VMEXIT_CALL_RET(0, hmR0VmxExitGetsec(pVCpu, pVmxTransient));
    1036410364        case VMX_EXIT_RDPMC:                   VMEXIT_CALL_RET(0, hmR0VmxExitRdpmc(pVCpu, pVmxTransient));
     10365#ifdef VBOX_WITH_NESTED_HWVIRT_VMX
     10366        case VMX_EXIT_VMCLEAR:                 VMEXIT_CALL_RET(0, hmR0VmxExitVmclear(pVCpu, pVmxTransient));
     10367        case VMX_EXIT_VMLAUNCH:                VMEXIT_CALL_RET(0, hmR0VmxExitVmlaunch(pVCpu, pVmxTransient));
     10368        case VMX_EXIT_VMPTRLD:                 VMEXIT_CALL_RET(0, hmR0VmxExitVmptrld(pVCpu, pVmxTransient));
     10369        case VMX_EXIT_VMPTRST:                 VMEXIT_CALL_RET(0, hmR0VmxExitVmptrst(pVCpu, pVmxTransient));
     10370        case VMX_EXIT_VMREAD:                  VMEXIT_CALL_RET(0, hmR0VmxExitVmread(pVCpu, pVmxTransient));
     10371        case VMX_EXIT_VMRESUME:                VMEXIT_CALL_RET(0, hmR0VmxExitVmwrite(pVCpu, pVmxTransient));
     10372        case VMX_EXIT_VMWRITE:                 VMEXIT_CALL_RET(0, hmR0VmxExitVmresume(pVCpu, pVmxTransient));
     10373        case VMX_EXIT_VMXOFF:                  VMEXIT_CALL_RET(0, hmR0VmxExitVmxoff(pVCpu, pVmxTransient));
     10374        case VMX_EXIT_VMXON:                   VMEXIT_CALL_RET(0, hmR0VmxExitVmxon(pVCpu, pVmxTransient));
     10375#else
     10376        case VMX_EXIT_VMCLEAR:
     10377        case VMX_EXIT_VMLAUNCH:
     10378        case VMX_EXIT_VMPTRLD:
     10379        case VMX_EXIT_VMPTRST:
     10380        case VMX_EXIT_VMREAD:
     10381        case VMX_EXIT_VMRESUME:
     10382        case VMX_EXIT_VMWRITE:
     10383        case VMX_EXIT_VMXOFF:
     10384        case VMX_EXIT_VMXON:
     10385            return hmR0VmxExitSetPendingXcptUD(pVCpu, pVmxTransient);
     10386#endif
    1036510387
    1036610388        case VMX_EXIT_TRIPLE_FAULT:            return hmR0VmxExitTripleFault(pVCpu, pVmxTransient);
     
    1037410396        case VMX_EXIT_ERR_MACHINE_CHECK:       return hmR0VmxExitErrMachineCheck(pVCpu, pVmxTransient);
    1037510397
    10376         case VMX_EXIT_VMCLEAR:
    10377         case VMX_EXIT_VMLAUNCH:
    10378         case VMX_EXIT_VMPTRLD:
    10379         case VMX_EXIT_VMPTRST:
    10380         case VMX_EXIT_VMREAD:
    10381         case VMX_EXIT_VMRESUME:
    10382         case VMX_EXIT_VMWRITE:
    10383         case VMX_EXIT_VMXOFF:
    10384         case VMX_EXIT_VMXON:
    1038510398        case VMX_EXIT_INVEPT:
    1038610399        case VMX_EXIT_INVVPID:
     
    1342013433{
    1342113434    HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient);
    13422 
     13435#ifndef VBOX_WITH_NESTED_HWVIRT_ONLY_IN_IEM
    1342313436    int rc = hmR0VmxReadExitInstrLenVmcs(pVmxTransient);
    1342413437    rc    |= HMVMX_CPUMCTX_IMPORT_STATE(pVCpu, CPUMCTX_EXTRN_RSP | CPUMCTX_EXTRN_SREG_MASK
     
    1344713460    }
    1344813461    return rcStrict;
     13462#else
     13463    return VERR_EM_INTERPRETER;
     13464#endif
    1344913465}
    1345013466
     
    1345613472{
    1345713473    HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient);
    13458 
     13474#ifndef VBOX_WITH_NESTED_HWVIRT_ONLY_IN_IEM
    1345913475    int rc = hmR0VmxReadExitInstrLenVmcs(pVmxTransient);
    1346013476    rc    |= HMVMX_CPUMCTX_IMPORT_STATE(pVCpu, IEM_CPUMCTX_EXTRN_VMX_VMENTRY_MASK);
     
    1346813484    Assert(rcStrict != VINF_IEM_RAISED_XCPT);
    1346913485    return rcStrict;
     13486#else
     13487    return VERR_EM_INTERPRETER;
     13488#endif
    1347013489}
    1347113490
     
    1347713496{
    1347813497    HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient);
    13479 
     13498#ifndef VBOX_WITH_NESTED_HWVIRT_ONLY_IN_IEM
    1348013499    int rc = hmR0VmxReadExitInstrLenVmcs(pVmxTransient);
    1348113500    rc    |= HMVMX_CPUMCTX_IMPORT_STATE(pVCpu, CPUMCTX_EXTRN_RSP | CPUMCTX_EXTRN_SREG_MASK
     
    1350413523    }
    1350513524    return rcStrict;
     13525#else
     13526    return VERR_EM_INTERPRETER;
     13527#endif
    1350613528}
    1350713529
     
    1351313535{
    1351413536    HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient);
    13515 
     13537#ifndef VBOX_WITH_NESTED_HWVIRT_ONLY_IN_IEM
    1351613538    int rc = hmR0VmxReadExitInstrLenVmcs(pVmxTransient);
    1351713539    rc    |= HMVMX_CPUMCTX_IMPORT_STATE(pVCpu, CPUMCTX_EXTRN_RSP | CPUMCTX_EXTRN_SREG_MASK
     
    1354013562    }
    1354113563    return rcStrict;
     13564#else
     13565    return VERR_EM_INTERPRETER;
     13566#endif
    1354213567}
    1354313568
     
    1354913574{
    1355013575    HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient);
    13551 
     13576#ifndef VBOX_WITH_NESTED_HWVIRT_ONLY_IN_IEM
    1355213577    int rc = hmR0VmxReadExitInstrLenVmcs(pVmxTransient);
    1355313578    rc    |= HMVMX_CPUMCTX_IMPORT_STATE(pVCpu, CPUMCTX_EXTRN_RSP | CPUMCTX_EXTRN_SREG_MASK
     
    1357713602    }
    1357813603    return rcStrict;
     13604#else
     13605    return VERR_EM_INTERPRETER;
     13606#endif
    1357913607}
    1358013608
     
    1358613614{
    1358713615    HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient);
    13588 
     13616#ifndef VBOX_WITH_NESTED_HWVIRT_ONLY_IN_IEM
    1358913617    int rc = hmR0VmxReadExitInstrLenVmcs(pVmxTransient);
    1359013618    rc    |= HMVMX_CPUMCTX_IMPORT_STATE(pVCpu, IEM_CPUMCTX_EXTRN_VMX_VMENTRY_MASK);
     
    1359813626    Assert(rcStrict != VINF_IEM_RAISED_XCPT);
    1359913627    return rcStrict;
     13628#else
     13629    return VERR_EM_INTERPRETER;
     13630#endif
    1360013631}
    1360113632
     
    1360713638{
    1360813639    HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient);
    13609 
     13640#ifndef VBOX_WITH_NESTED_HWVIRT_ONLY_IN_IEM
    1361013641    int rc = hmR0VmxReadExitInstrLenVmcs(pVmxTransient);
    1361113642    rc    |= HMVMX_CPUMCTX_IMPORT_STATE(pVCpu, CPUMCTX_EXTRN_RSP | CPUMCTX_EXTRN_SREG_MASK
     
    1363513666    }
    1363613667    return rcStrict;
     13668#else
     13669    return VERR_EM_INTERPRETER;
     13670#endif
    1363713671}
    1363813672
     
    1364413678{
    1364513679    HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient);
    13646 
     13680#ifndef VBOX_WITH_NESTED_HWVIRT_ONLY_IN_IEM
    1364713681    int rc = hmR0VmxReadExitInstrLenVmcs(pVmxTransient);
    1364813682    rc    |= HMVMX_CPUMCTX_IMPORT_STATE(pVCpu, CPUMCTX_EXTRN_CR4 | IEM_CPUMCTX_EXTRN_EXEC_DECODED_NO_MEM_MASK);
     
    1366313697    }
    1366413698    return rcStrict;
     13699#else
     13700    return VERR_EM_INTERPRETER;
     13701#endif
    1366513702}
    1366613703
     
    1367213709{
    1367313710    HMVMX_VALIDATE_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient);
    13674 
     13711#ifndef VBOX_WITH_NESTED_HWVIRT_ONLY_IN_IEM
    1367513712    int rc = hmR0VmxReadExitInstrLenVmcs(pVmxTransient);
    1367613713    rc    |= HMVMX_CPUMCTX_IMPORT_STATE(pVCpu, CPUMCTX_EXTRN_RSP | CPUMCTX_EXTRN_SREG_MASK
     
    1369913736    }
    1370013737    return rcStrict;
     13738#else
     13739    return VERR_EM_INTERPRETER;
     13740#endif
    1370113741}
    1370213742
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