Changeset 76849 in vbox for trunk/src/VBox/Devices/Audio
- Timestamp:
- Jan 17, 2019 11:20:56 AM (6 years ago)
- File:
-
- 1 edited
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trunk/src/VBox/Devices/Audio/DevIchAc97.cpp
r76701 r76849 122 122 /** @} */ 123 123 124 /** @name Extended Audio Status and Control Register (EACS).124 /** @name Extended Audio ID Register (EAID). 125 125 * @{ */ 126 #define AC97_EACS_VRA 1 /**< Variable Rate Audio (4.2.1.1). */ 127 #define AC97_EACS_VRM 8 /**< Variable Rate Mic Audio (4.2.1.1). */ 126 #define AC97_EAID_VRA RT_BIT(0) /**< Variable Rate Audio. */ 127 #define AC97_EAID_VRM RT_BIT(3) /**< Variable Rate Mic Audio. */ 128 #define AC97_EAID_REV0 RT_BIT(10) /**< AC'97 revision compliance. */ 129 #define AC97_EAID_REV1 RT_BIT(11) /**< AC'97 revision compliance. */ 130 /** @} */ 131 132 /** @name Extended Audio Control and Status Register (EACS). 133 * @{ */ 134 #define AC97_EACS_VRA RT_BIT(0) /**< Variable Rate Audio (4.2.1.1). */ 135 #define AC97_EACS_VRM RT_BIT(3) /**< Variable Rate Mic Audio (4.2.1.1). */ 128 136 /** @} */ 129 137 … … 2503 2511 ichac97MixerSet(pThis, AC97_Powerdown_Ctrl_Stat , 0x000f); 2504 2512 2505 ichac97MixerSet(pThis, AC97_Extended_Audio_ID , 0x0809); 2506 ichac97MixerSet(pThis, AC97_Extended_Audio_Ctrl_Stat, 0x0009); 2513 /* Configure Extended Audio ID (EAID) + Control & Status (EACS) registers. */ 2514 uint16_t fEAID = AC97_EAID_REV1; /* Our hardware is AC'97 rev2.3 compliant. */ 2515 uint16_t fEACS = 0; 2516 #ifdef VBOX_WITH_AC97_VRA 2517 fEAID |= AC97_EAID_VRA; /* Variable Rate PCM Audio capable. */ 2518 fEACS |= AC97_EACS_VRA; /* Ditto. */ 2519 #endif 2520 #ifdef VBOX_WITH_AC97_VRM 2521 fEAID |= AC97_EAID_VRM; /* Variable Rate Mic-In Audio capable. */ 2522 fEACS |= AC97_EACS_VRM; /* Ditto. */ 2523 #endif 2524 2525 ichac97MixerSet(pThis, AC97_Extended_Audio_ID, fEAID); 2526 ichac97MixerSet(pThis, AC97_Extended_Audio_Ctrl_Stat, fEACS); 2507 2527 ichac97MixerSet(pThis, AC97_PCM_Front_DAC_Rate , 0xbb80); 2508 2528 ichac97MixerSet(pThis, AC97_PCM_Surround_DAC_Rate , 0xbb80); … … 3497 3517 } 3498 3518 else 3499 AssertMsgFailed(("Attempt to set front DAC rate to %RU32, but VRA is not set\n", u32Val));3519 LogRel2(("AC97: Setting Front DAC rate when VRA is not set is forbidden, ignoring\n")); 3500 3520 break; 3501 3521 case AC97_MIC_ADC_Rate: … … 3511 3531 } 3512 3532 else 3513 AssertMsgFailed(("Attempt to set MIC ADC rate to %RU32, but VRM is not set\n", u32Val));3533 LogRel2(("AC97: Setting MIC ADC rate when VRM is not set is forbidden, ignoring\n")); 3514 3534 break; 3515 3535 case AC97_PCM_LR_ADC_Rate: … … 3525 3545 } 3526 3546 else 3527 AssertMsgFailed(("Attempt to set LR ADC rate to %RU32, but VRA is not set\n", u32Val));3547 LogRel2(("AC97: Setting LR ADC rate when VRA is not set is forbidden, ignoring\n")); 3528 3548 break; 3529 3549 default: … … 4214 4234 return PDMDevHlpVMSetError(pDevIns, VERR_PDM_DEVINS_UNKNOWN_CFG_VALUES, RT_SRC_POS, 4215 4235 N_("AC'97 configuration error: The \"Codec\" value \"%s\" is unsupported"), szCodec); 4236 4237 LogRel(("AC97: Using codec '%s'\n", szCodec)); 4216 4238 4217 4239 /*
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