VirtualBox

Changeset 76853 in vbox for trunk/src/VBox/Devices


Ignore:
Timestamp:
Jan 17, 2019 11:42:06 AM (6 years ago)
Author:
vboxsync
svn:sync-xref-src-repo-rev:
128213
Message:

Audio/AC97: Cleaned up ichac97R3StreamRead().

File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/src/VBox/Devices/Audio/DevIchAc97.cpp

    r76852 r76853  
    11831183    /* pcbRead is optional. */
    11841184
    1185     int rc = VINF_SUCCESS;
    1186 
    1187     uint32_t cbReadTotal = 0;
    1188 
    11891185    PRTCIRCBUF pCircBuf = pSrcStream->State.pCircBuf;
    11901186    AssertPtr(pCircBuf);
     
    11931189    size_t cbSrc;
    11941190
    1195     while (cbToRead)
     1191    int rc = VINF_SUCCESS;
     1192
     1193    uint32_t cbReadTotal = 0;
     1194    uint32_t cbLeft      = RT_MIN(cbToRead, (uint32_t)RTCircBufUsed(pCircBuf));
     1195
     1196    while (cbLeft)
    11961197    {
    11971198        uint32_t cbWritten = 0;
    11981199
    1199         RTCircBufAcquireReadBlock(pCircBuf, cbToRead, &pvSrc, &cbSrc);
     1200        RTCircBufAcquireReadBlock(pCircBuf, cbLeft, &pvSrc, &cbSrc);
    12001201
    12011202        if (cbSrc)
     
    12051206
    12061207            rc = AudioMixerSinkWrite(pDstMixSink, AUDMIXOP_COPY, pvSrc, (uint32_t)cbSrc, &cbWritten);
    1207             if (RT_SUCCESS(rc))
    1208             {
    1209                 Assert(cbWritten <= cbSrc);
    1210 
    1211                 cbReadTotal += cbWritten;
    1212 
    1213                 Assert(cbToRead >= cbWritten);
    1214                 cbToRead    -= cbWritten;
    1215             }
     1208            AssertRC(rc);
     1209
     1210            Assert(cbSrc >= cbWritten);
     1211            Log3Func(("[SD%RU8] %RU32/%zu bytes read\n", pSrcStream->u8SD, cbWritten, cbSrc));
    12161212        }
    12171213
    12181214        RTCircBufReleaseReadBlock(pCircBuf, cbWritten);
    1219 
    1220         if (   !cbWritten
    1221             || !RTCircBufUsed(pCircBuf))
    1222                break;
    12231215
    12241216        if (RT_FAILURE(rc))
    12251217            break;
     1218
     1219        Assert(cbLeft  >= cbWritten);
     1220        cbLeft         -= cbWritten;
     1221
     1222        cbReadTotal    += cbWritten;
    12261223    }
    12271224
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