Changeset 77240 in vbox for trunk/src/VBox
- Timestamp:
- Feb 10, 2019 4:34:51 PM (6 years ago)
- Location:
- trunk/src/VBox/VMM
- Files:
-
- 4 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMAll/PGMAllPool.cpp
r76553 r77240 1493 1493 1494 1494 1495 # 1496 1497 # 1495 #ifdef PGMPOOL_WITH_OPTIMIZED_DIRTY_PT 1496 1497 # if defined(VBOX_STRICT) && !defined(IN_RING3) 1498 1498 1499 1499 /** … … 1513 1513 PVM pVM = pPool->CTX_SUFF(pVM); 1514 1514 1515 # ifdef VBOX_STRICT1515 # ifdef VBOX_STRICT 1516 1516 for (unsigned i = 0; i < RT_MIN(RT_ELEMENTS(pShwPT->a), pPage->iFirstPresent); i++) 1517 1517 AssertMsg(!PGMSHWPTEPAE_IS_P(pShwPT->a[i]), ("Unexpected PTE: idx=%d %RX64 (first=%d)\n", i, PGMSHWPTEPAE_GET_LOG(pShwPT->a[i]), pPage->iFirstPresent)); 1518 # endif1518 # endif 1519 1519 for (unsigned i = pPage->iFirstPresent; i < RT_ELEMENTS(pShwPT->a); i++) 1520 1520 { … … 1579 1579 PVM pVM = pPool->CTX_SUFF(pVM); 1580 1580 1581 # ifdef VBOX_STRICT1581 # ifdef VBOX_STRICT 1582 1582 for (unsigned i = 0; i < RT_MIN(RT_ELEMENTS(pShwPT->a), pPage->iFirstPresent); i++) 1583 1583 AssertMsg(!PGMSHWPTEPAE_IS_P(pShwPT->a[i]), ("Unexpected PTE: idx=%d %RX64 (first=%d)\n", i, PGMSHWPTEPAE_GET_LOG(pShwPT->a[i]), pPage->iFirstPresent)); 1584 # endif1584 # endif 1585 1585 for (unsigned i = pPage->iFirstPresent; i < RT_ELEMENTS(pShwPT->a); i++) 1586 1586 { … … 1628 1628 } 1629 1629 1630 # 1630 # endif /* VBOX_STRICT && !IN_RING3 */ 1631 1631 1632 1632 /** … … 1647 1647 unsigned cChanged = 0; 1648 1648 1649 # ifdef VBOX_STRICT1649 # ifdef VBOX_STRICT 1650 1650 for (unsigned i = 0; i < RT_MIN(RT_ELEMENTS(pShwPT->a), pPage->iFirstPresent); i++) 1651 1651 AssertMsg(!PGMSHWPTEPAE_IS_P(pShwPT->a[i]), ("Unexpected PTE: idx=%d %RX64 (first=%d)\n", i, PGMSHWPTEPAE_GET_LOG(pShwPT->a[i]), pPage->iFirstPresent)); 1652 # endif1652 # endif 1653 1653 *pfFlush = false; 1654 1654 … … 1672 1672 if ((pGstPT->a[i].u & X86_PTE_PAE_PG_MASK) == (pOldGstPT->a[i].u & X86_PTE_PAE_PG_MASK)) 1673 1673 { 1674 # ifdef VBOX_STRICT1674 # ifdef VBOX_STRICT 1675 1675 RTHCPHYS HCPhys = NIL_RTGCPHYS; 1676 1676 int rc = PGMPhysGCPhys2HCPhys(pPool->CTX_SUFF(pVM), pGstPT->a[i].u & X86_PTE_PAE_PG_MASK, &HCPhys); 1677 1677 AssertMsg(rc == VINF_SUCCESS && PGMSHWPTEPAE_GET_HCPHYS(pShwPT->a[i]) == HCPhys, ("rc=%d guest %RX64 old %RX64 shw=%RX64 vs %RHp\n", rc, pGstPT->a[i].u, pOldGstPT->a[i].u, PGMSHWPTEPAE_GET_LOG(pShwPT->a[i]), HCPhys)); 1678 # endif1678 # endif 1679 1679 uint64_t uHostAttr = PGMSHWPTEPAE_GET_U(pShwPT->a[i]) & (X86_PTE_P | X86_PTE_US | X86_PTE_A | X86_PTE_D | X86_PTE_G | X86_PTE_PAE_NX); 1680 1680 bool fHostRW = !!(PGMSHWPTEPAE_GET_U(pShwPT->a[i]) & X86_PTE_RW); … … 1715 1715 unsigned cChanged = 0; 1716 1716 1717 # ifdef VBOX_STRICT1717 # ifdef VBOX_STRICT 1718 1718 for (unsigned i = 0; i < RT_MIN(RT_ELEMENTS(pShwPT->a), pPage->iFirstPresent); i++) 1719 1719 AssertMsg(!PGMSHWPTEPAE_IS_P(pShwPT->a[i]), ("Unexpected PTE: idx=%d %RX64 (first=%d)\n", i, PGMSHWPTEPAE_GET_LOG(pShwPT->a[i]), pPage->iFirstPresent)); 1720 # endif1720 # endif 1721 1721 *pfFlush = false; 1722 1722 … … 1740 1740 if ((pGstPT->a[i].u & X86_PTE_PG_MASK) == (pOldGstPT->a[i].u & X86_PTE_PG_MASK)) 1741 1741 { 1742 # ifdef VBOX_STRICT1742 # ifdef VBOX_STRICT 1743 1743 RTHCPHYS HCPhys = NIL_RTGCPHYS; 1744 1744 int rc = PGMPhysGCPhys2HCPhys(pPool->CTX_SUFF(pVM), pGstPT->a[i].u & X86_PTE_PG_MASK, &HCPhys); 1745 1745 AssertMsg(rc == VINF_SUCCESS && PGMSHWPTEPAE_GET_HCPHYS(pShwPT->a[i]) == HCPhys, ("rc=%d guest %x old %x shw=%RX64 vs %RHp\n", rc, pGstPT->a[i].u, pOldGstPT->a[i].u, PGMSHWPTEPAE_GET_LOG(pShwPT->a[i]), HCPhys)); 1746 # endif1746 # endif 1747 1747 uint64_t uHostAttr = PGMSHWPTEPAE_GET_U(pShwPT->a[i]) & (X86_PTE_P | X86_PTE_US | X86_PTE_A | X86_PTE_D | X86_PTE_G); 1748 1748 bool fHostRW = !!(PGMSHWPTEPAE_GET_U(pShwPT->a[i]) & X86_PTE_RW); … … 1776 1776 static void pgmPoolFlushDirtyPage(PVM pVM, PPGMPOOL pPool, unsigned idxSlot, bool fAllowRemoval = false) 1777 1777 { 1778 PPGMPOOLPAGE pPage; 1779 unsigned idxPage; 1778 AssertCompile(RT_ELEMENTS(pPool->aidxDirtyPages) == RT_ELEMENTS(pPool->aDirtyPages)); 1780 1779 1781 1780 Assert(idxSlot < RT_ELEMENTS(pPool->aDirtyPages)); 1782 if (pPool->aDirtyPages[idxSlot].uIdx == NIL_PGMPOOL_IDX) 1781 unsigned idxPage = pPool->aidxDirtyPages[idxSlot]; 1782 if (idxPage == NIL_PGMPOOL_IDX) 1783 1783 return; 1784 1784 1785 idxPage = pPool->aDirtyPages[idxSlot].uIdx; 1786 AssertRelease(idxPage != NIL_PGMPOOL_IDX); 1787 pPage = &pPool->aPages[idxPage]; 1785 PPGMPOOLPAGE pPage = &pPool->aPages[idxPage]; 1788 1786 Assert(pPage->idx == idxPage); 1789 1787 Assert(pPage->iMonitoredNext == NIL_PGMPOOL_IDX && pPage->iMonitoredPrev == NIL_PGMPOOL_IDX); … … 1792 1790 Log(("Flush dirty page %RGp cMods=%d\n", pPage->GCPhys, pPage->cModifications)); 1793 1791 1794 # if defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0) || defined(IN_RC)1792 # if defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0) || defined(IN_RC) 1795 1793 PVMCPU pVCpu = VMMGetCpu(pVM); 1796 1794 uint32_t iPrevSubset = PGMRZDynMapPushAutoSubset(pVCpu); 1797 # endif1795 # endif 1798 1796 1799 1797 /* First write protect the page again to catch all write accesses. (before checking for changes -> SMP) */ … … 1802 1800 pPage->fDirty = false; 1803 1801 1804 # ifdef VBOX_STRICT1802 # ifdef VBOX_STRICT 1805 1803 uint64_t fFlags = 0; 1806 1804 RTHCPHYS HCPhys; … … 1812 1810 || rc == VERR_PAGE_NOT_PRESENT, 1813 1811 ("PGMShwGetPage -> GCPtr=%RGv rc=%d flags=%RX64\n", pPage->GCPtrDirtyFault, rc, fFlags)); 1814 # endif1812 # endif 1815 1813 1816 1814 /* Flush those PTEs that have changed. */ … … 1846 1844 1847 1845 pPool->cDirtyPages--; 1848 pPool->a DirtyPages[idxSlot].uIdx= NIL_PGMPOOL_IDX;1846 pPool->aidxDirtyPages[idxSlot] = NIL_PGMPOOL_IDX; 1849 1847 Assert(pPool->cDirtyPages <= RT_ELEMENTS(pPool->aDirtyPages)); 1850 1848 if (fFlush) … … 1858 1856 Log(("Removed dirty page %RGp cMods=%d cChanges=%d\n", pPage->GCPhys, pPage->cModifications, cChanges)); 1859 1857 1860 # if defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0) || defined(IN_RC)1858 # if defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0) || defined(IN_RC) 1861 1859 PGMRZDynMapPopAutoSubset(pVCpu, iPrevSubset); 1862 # endif1860 # endif 1863 1861 } 1864 1862 … … 1874 1872 void pgmPoolAddDirtyPage(PVM pVM, PPGMPOOL pPool, PPGMPOOLPAGE pPage) 1875 1873 { 1876 unsigned idxFree;1877 1878 1874 PGM_LOCK_ASSERT_OWNER(pVM); 1879 1875 AssertCompile(RT_ELEMENTS(pPool->aDirtyPages) == 8 || RT_ELEMENTS(pPool->aDirtyPages) == 16); 1880 1876 Assert(!pPage->fDirty); 1881 1877 1882 idxFree = pPool->idxFreeDirtyPage;1878 unsigned idxFree = pPool->idxFreeDirtyPage; 1883 1879 Assert(idxFree < RT_ELEMENTS(pPool->aDirtyPages)); 1884 1880 Assert(pPage->iMonitoredNext == NIL_PGMPOOL_IDX && pPage->iMonitoredPrev == NIL_PGMPOOL_IDX); … … 1890 1886 } 1891 1887 Assert(pPool->cDirtyPages < RT_ELEMENTS(pPool->aDirtyPages)); 1892 AssertMsg(pPool->a DirtyPages[idxFree].uIdx== NIL_PGMPOOL_IDX, ("idxFree=%d cDirtyPages=%d\n", idxFree, pPool->cDirtyPages));1888 AssertMsg(pPool->aidxDirtyPages[idxFree] == NIL_PGMPOOL_IDX, ("idxFree=%d cDirtyPages=%d\n", idxFree, pPool->cDirtyPages)); 1893 1889 1894 1890 Log(("Add dirty page %RGp (slot=%d)\n", pPage->GCPhys, idxFree)); … … 1915 1911 pPage->fDirty = true; 1916 1912 pPage->idxDirtyEntry = (uint8_t)idxFree; Assert(pPage->idxDirtyEntry == idxFree); 1917 pPool->a DirtyPages[idxFree].uIdx= pPage->idx;1913 pPool->aidxDirtyPages[idxFree] = pPage->idx; 1918 1914 pPool->cDirtyPages++; 1919 1915 1920 1916 pPool->idxFreeDirtyPage = (pPool->idxFreeDirtyPage + 1) & (RT_ELEMENTS(pPool->aDirtyPages) - 1); 1921 1917 if ( pPool->cDirtyPages < RT_ELEMENTS(pPool->aDirtyPages) 1922 && pPool->a DirtyPages[pPool->idxFreeDirtyPage].uIdx!= NIL_PGMPOOL_IDX)1918 && pPool->aidxDirtyPages[pPool->idxFreeDirtyPage] != NIL_PGMPOOL_IDX) 1923 1919 { 1924 1920 unsigned i; … … 1926 1922 { 1927 1923 idxFree = (pPool->idxFreeDirtyPage + i) & (RT_ELEMENTS(pPool->aDirtyPages) - 1); 1928 if (pPool->a DirtyPages[idxFree].uIdx== NIL_PGMPOOL_IDX)1924 if (pPool->aidxDirtyPages[idxFree] == NIL_PGMPOOL_IDX) 1929 1925 { 1930 1926 pPool->idxFreeDirtyPage = idxFree; … … 1935 1931 } 1936 1932 1937 Assert(pPool->cDirtyPages == RT_ELEMENTS(pPool->aDirtyPages) || pPool->a DirtyPages[pPool->idxFreeDirtyPage].uIdx== NIL_PGMPOOL_IDX);1933 Assert(pPool->cDirtyPages == RT_ELEMENTS(pPool->aDirtyPages) || pPool->aidxDirtyPages[pPool->idxFreeDirtyPage] == NIL_PGMPOOL_IDX); 1938 1934 1939 1935 /* … … 1952 1948 * @param GCPhys Guest physical address 1953 1949 */ 1954 bool pgmPoolIsDirtyPage (PVM pVM, RTGCPHYS GCPhys)1950 bool pgmPoolIsDirtyPageSlow(PVM pVM, RTGCPHYS GCPhys) 1955 1951 { 1956 1952 PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool); … … 1963 1959 for (unsigned i = 0; i < RT_ELEMENTS(pPool->aDirtyPages); i++) 1964 1960 { 1965 if (pPool->aDirtyPages[i].uIdx != NIL_PGMPOOL_IDX) 1966 { 1967 PPGMPOOLPAGE pPage; 1968 unsigned idxPage = pPool->aDirtyPages[i].uIdx; 1969 1970 pPage = &pPool->aPages[idxPage]; 1961 unsigned idxPage = pPool->aidxDirtyPages[i]; 1962 if (idxPage != NIL_PGMPOOL_IDX) 1963 { 1964 PPGMPOOLPAGE pPage = &pPool->aPages[idxPage]; 1971 1965 if (pPage->GCPhys == GCPhys) 1972 1966 return true; … … 1997 1991 pPool->idxFreeDirtyPage = 0; 1998 1992 if ( pPool->cDirtyPages != RT_ELEMENTS(pPool->aDirtyPages) 1999 && pPool->a DirtyPages[pPool->idxFreeDirtyPage].uIdx!= NIL_PGMPOOL_IDX)1993 && pPool->aidxDirtyPages[pPool->idxFreeDirtyPage] != NIL_PGMPOOL_IDX) 2000 1994 { 2001 1995 unsigned i; 2002 1996 for (i = 1; i < RT_ELEMENTS(pPool->aDirtyPages); i++) 2003 1997 { 2004 if (pPool->a DirtyPages[i].uIdx== NIL_PGMPOOL_IDX)1998 if (pPool->aidxDirtyPages[i] == NIL_PGMPOOL_IDX) 2005 1999 { 2006 2000 pPool->idxFreeDirtyPage = i; … … 2011 2005 } 2012 2006 2013 Assert(pPool->a DirtyPages[pPool->idxFreeDirtyPage].uIdx== NIL_PGMPOOL_IDX || pPool->cDirtyPages == RT_ELEMENTS(pPool->aDirtyPages));2007 Assert(pPool->aidxDirtyPages[pPool->idxFreeDirtyPage] == NIL_PGMPOOL_IDX || pPool->cDirtyPages == RT_ELEMENTS(pPool->aDirtyPages)); 2014 2008 return; 2015 2009 } … … 2034 2028 for (unsigned i = 0; i < RT_ELEMENTS(pPool->aDirtyPages); i++) 2035 2029 { 2030 /** @todo What was intended here??? This looks incomplete... */ 2036 2031 } 2037 2032 } … … 2058 2053 for (unsigned i = 0; i < RT_ELEMENTS(pPool->aDirtyPages); i++) 2059 2054 { 2060 if (pPool->aDirtyPages[i].uIdx != NIL_PGMPOOL_IDX) 2061 { 2062 unsigned idxPage = pPool->aDirtyPages[i].uIdx; 2063 2055 unsigned idxPage = pPool->aidxDirtyPages[i]; 2056 if (idxPage != NIL_PGMPOOL_IDX) 2057 { 2064 2058 PPGMPOOLPAGE pPage = &pPool->aPages[idxPage]; 2065 2059 if (pPage->GCPhys == GCPhysPT) … … 2075 2069 pgmPoolFlushDirtyPage(pVM, pPool, idxDirtyPage, true /* allow removal of reused page tables*/); 2076 2070 if ( pPool->cDirtyPages != RT_ELEMENTS(pPool->aDirtyPages) 2077 && pPool->a DirtyPages[pPool->idxFreeDirtyPage].uIdx!= NIL_PGMPOOL_IDX)2071 && pPool->aidxDirtyPages[pPool->idxFreeDirtyPage] != NIL_PGMPOOL_IDX) 2078 2072 { 2079 2073 unsigned i; 2080 2074 for (i = 0; i < RT_ELEMENTS(pPool->aDirtyPages); i++) 2081 2075 { 2082 if (pPool->a DirtyPages[i].uIdx== NIL_PGMPOOL_IDX)2076 if (pPool->aidxDirtyPages[i] == NIL_PGMPOOL_IDX) 2083 2077 { 2084 2078 pPool->idxFreeDirtyPage = i; … … 2091 2085 } 2092 2086 2093 # 2087 #endif /* PGMPOOL_WITH_OPTIMIZED_DIRTY_PT */ 2094 2088 2095 2089 /** … … 5573 5567 pPool->idxFreeDirtyPage = 0; 5574 5568 pPool->cDirtyPages = 0; 5575 for (unsigned i = 0; i < RT_ELEMENTS(pPool->a DirtyPages); i++)5576 pPool->a DirtyPages[i].uIdx= NIL_PGMPOOL_IDX;5569 for (unsigned i = 0; i < RT_ELEMENTS(pPool->aidxDirtyPages); i++) 5570 pPool->aidxDirtyPages[i] = NIL_PGMPOOL_IDX; 5577 5571 #endif 5578 5572 -
trunk/src/VBox/VMM/VMMR3/PGMPool.cpp
r76553 r77240 743 743 for (unsigned i = 0; i < RT_ELEMENTS(pPool->aDirtyPages); i++) 744 744 { 745 PPGMPOOLPAGE pPage; 746 unsigned idxPage; 747 748 if (pPool->aDirtyPages[i].uIdx == NIL_PGMPOOL_IDX) 745 unsigned idxPage = pPool->aidxDirtyPages[i]; 746 if (idxPage == NIL_PGMPOOL_IDX) 749 747 continue; 750 748 751 idxPage = pPool->aDirtyPages[i].uIdx; 752 AssertRelease(idxPage != NIL_PGMPOOL_IDX); 753 pPage = &pPool->aPages[idxPage]; 749 PPGMPOOLPAGE pPage = &pPool->aPages[idxPage]; 754 750 Assert(pPage->idx == idxPage); 755 751 Assert(pPage->iMonitoredNext == NIL_PGMPOOL_IDX && pPage->iMonitoredPrev == NIL_PGMPOOL_IDX); … … 764 760 pPage->fDirty = false; 765 761 766 pPool->a DirtyPages[i].uIdx= NIL_PGMPOOL_IDX;762 pPool->aidxDirtyPages[i] = NIL_PGMPOOL_IDX; 767 763 } 768 764 -
trunk/src/VBox/VMM/include/PGMInline.h
r76585 r77240 1496 1496 1497 1497 /** 1498 * Check if the specified page is dirty (not write monitored) 1499 * 1500 * @return dirty or not 1501 * @param pVM The cross context VM structure. 1502 * @param GCPhys Guest physical address 1503 */ 1504 DECLINLINE(bool) pgmPoolIsDirtyPage(PVM pVM, RTGCPHYS GCPhys) 1505 { 1506 PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool); 1507 PGM_LOCK_ASSERT_OWNER(pVM); 1508 if (!pPool->cDirtyPages) 1509 return false; 1510 return pgmPoolIsDirtyPageSlow(pVM, GCPhys); 1511 } 1512 1513 1514 /** 1498 1515 * Tells if mappings are to be put into the shadow page table or not. 1499 1516 * -
trunk/src/VBox/VMM/include/PGMInternal.h
r76993 r77240 2476 2476 uint32_t cDirtyPages; 2477 2477 /** Array of current dirty pgm pool page indices. */ 2478 uint16_t aidxDirtyPages[16]; 2479 /** Array running in parallel to aidxDirtyPages with the page data. */ 2478 2480 struct 2479 2481 { 2480 uint16_t uIdx; 2481 uint16_t Alignment[3]; 2482 uint64_t aPage[512]; 2482 uint64_t aPage[512]; 2483 2483 } aDirtyPages[16]; 2484 2484 2485 /** The number of pages currently in use. */ 2485 2486 uint16_t cUsedPages; … … 4294 4295 PPGMPOOLPAGE pgmPoolQueryPageForDbg(PPGMPOOL pPool, RTHCPHYS HCPhys); 4295 4296 int pgmPoolSyncCR3(PVMCPU pVCpu); 4296 bool pgmPoolIsDirtyPage (PVM pVM, RTGCPHYS GCPhys);4297 bool pgmPoolIsDirtyPageSlow(PVM pVM, RTGCPHYS GCPhys); 4297 4298 void pgmPoolInvalidateDirtyPage(PVM pVM, RTGCPHYS GCPhysPT); 4298 4299 int pgmPoolTrackUpdateGCPhys(PVM pVM, RTGCPHYS GCPhysPage, PPGMPAGE pPhysPage, bool fFlushPTEs, bool *pfFlushTLBs);
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