Changeset 77952 in vbox

Timestamp:

Mar 29, 2019 3:20:19 PM (6 years ago)

Author:

vboxsync

Message:

VMSVGA: Implemented pitch lock registers. See bugref:9424

File:

• trunk/src/VBox/Devices/Graphics/DevVGA-SVGA.cpp (modified) (8 diffs)

trunk/src/VBox/Devices/Graphics/DevVGA-SVGA.cpp

@@ -1465 +1465 @@
     }
 }
+
+
+/**
+ * Update the scanline pitch in response to the guest changing mode
+ * width/bpp.
+ *
+ * @param   pThis       VMSVGA State
+ */
+DECLINLINE(void) vmsvgaUpdatePitch(PVGASTATE pThis)
+{
+    uint32_t RT_UNTRUSTED_VOLATILE_GUEST *pFIFO = pThis->svga.CTX_SUFF(pFIFO);
+    uint32_t uFifoPitchLock = pFIFO[SVGA_FIFO_PITCHLOCK];
+    uint32_t uRegPitchLock  = pThis->svga.u32PitchLock;
+
+    /* Sanitize values. */
+    uFifoPitchLock = (uint16_t)uFifoPitchLock;
+    uRegPitchLock  = (uint16_t)uFifoPitchLock;
+
+    /* Prefer the register value to the FIFO value.*/
+    if (pThis->svga.u32PitchLock)
+        pThis->svga.cbScanline = pThis->svga.u32PitchLock;
+    if (uFifoPitchLock)
+        pThis->svga.cbScanline = uFifoPitchLock;
+    else
+        pThis->svga.cbScanline = pThis->svga.uWidth * (RT_ALIGN(pThis->svga.uBpp, 8) / 8);
+}
 #endif
+
 
 /**
@@ -1593 +1620 @@
         if (pThis->svga.uWidth != u32)
         {
+#if defined(IN_RING3) || defined(IN_RING0)
             pThis->svga.uWidth = u32;
-            pThis->svga.cbScanline = pThis->svga.uWidth * (RT_ALIGN(pThis->svga.uBpp, 8) / 8);
+            vmsvgaUpdatePitch(pThis);
             if (pThis->svga.fEnabled)
             {
                 ASMAtomicOrU32(&pThis->svga.u32ActionFlags, VMSVGA_ACTION_CHANGEMODE);
             }
+#else
+            rc = VINF_IOM_R3_IOPORT_WRITE;
+#endif
         }
         /* else: nop */
@@ -1625 +1656 @@
         if (pThis->svga.uBpp != u32)
         {
+#if defined(IN_RING3) || defined(IN_RING0)
             pThis->svga.uBpp = u32;
-            pThis->svga.cbScanline = pThis->svga.uWidth * (RT_ALIGN(pThis->svga.uBpp, 8) / 8);
+            vmsvgaUpdatePitch(pThis);
             if (pThis->svga.fEnabled)
             {
                 ASMAtomicOrU32(&pThis->svga.u32ActionFlags, VMSVGA_ACTION_CHANGEMODE);
             }
+#else
+            rc = VINF_IOM_R3_IOPORT_WRITE;
+#endif
         }
         /* else: nop */
@@ -1689 +1724 @@
         STAM_REL_COUNTER_INC(&pThis->svga.StatRegPitchLockWr);
         pThis->svga.u32PitchLock = u32;
+        /* Should this also update the FIFO pitch lock? Unclear. */
         break;
 
@@ -5427 +5463 @@
     PVGASTATE       pThis = PDMINS_2_DATA(pDevIns, PVGASTATE);
     PVMSVGAR3STATE  pSVGAState = pThis->svga.pSvgaR3State;
+    uint32_t RT_UNTRUSTED_VOLATILE_GUEST *pFIFO = pThis->svga.pFIFOR3;
 
     pHlp->pfnPrintf(pHlp, "Extension enabled:  %RTbool\n", pThis->svga.fEnabled);
@@ -5440 +5477 @@
     pHlp->pfnPrintf(pHlp, "IRQ status:         %#x\n", pThis->svga.u32IrqStatus);
     pHlp->pfnPrintf(pHlp, "IRQ mask:           %#x\n", pThis->svga.u32IrqMask);
-    pHlp->pfnPrintf(pHlp, "Pitch lock:         %#x\n", pThis->svga.u32PitchLock);
+    pHlp->pfnPrintf(pHlp, "Pitch lock:         %#x (FIFO:%#x)\n", pThis->svga.u32PitchLock, pFIFO[SVGA_FIFO_PITCHLOCK]);
     pHlp->pfnPrintf(pHlp, "Current GMR ID:     %#x\n", pThis->svga.u32CurrentGMRId);
     pHlp->pfnPrintf(pHlp, "Capabilites reg:    %#x\n", pThis->svga.u32RegCaps);
@@ -5837 +5874 @@
 
     /* Setup FIFO capabilities. */
-    pThis->svga.pFIFOR3[SVGA_FIFO_CAPABILITIES] = SVGA_FIFO_CAP_FENCE | SVGA_FIFO_CAP_CURSOR_BYPASS_3 | SVGA_FIFO_CAP_GMR2 | SVGA_FIFO_CAP_3D_HWVERSION_REVISED | SVGA_FIFO_CAP_SCREEN_OBJECT_2 | SVGA_FIFO_CAP_RESERVE;
+    pThis->svga.pFIFOR3[SVGA_FIFO_CAPABILITIES] = SVGA_FIFO_CAP_FENCE | SVGA_FIFO_CAP_CURSOR_BYPASS_3 | SVGA_FIFO_CAP_GMR2 | SVGA_FIFO_CAP_3D_HWVERSION_REVISED | SVGA_FIFO_CAP_SCREEN_OBJECT_2 | SVGA_FIFO_CAP_RESERVE | SVGA_FIFO_CAP_PITCHLOCK;
 
     /* Valid with SVGA_FIFO_CAP_SCREEN_OBJECT_2 */
@@ -5966 +6003 @@
 
     /* Setup FIFO capabilities. */
-    pThis->svga.pFIFOR3[SVGA_FIFO_CAPABILITIES] = SVGA_FIFO_CAP_FENCE | SVGA_FIFO_CAP_CURSOR_BYPASS_3 | SVGA_FIFO_CAP_GMR2 | SVGA_FIFO_CAP_3D_HWVERSION_REVISED | SVGA_FIFO_CAP_SCREEN_OBJECT_2 | SVGA_FIFO_CAP_RESERVE;
+    pThis->svga.pFIFOR3[SVGA_FIFO_CAPABILITIES] = SVGA_FIFO_CAP_FENCE | SVGA_FIFO_CAP_CURSOR_BYPASS_3 | SVGA_FIFO_CAP_GMR2 | SVGA_FIFO_CAP_3D_HWVERSION_REVISED | SVGA_FIFO_CAP_SCREEN_OBJECT_2 | SVGA_FIFO_CAP_RESERVE | SVGA_FIFO_CAP_PITCHLOCK;
 
     /* Valid with SVGA_FIFO_CAP_SCREEN_OBJECT_2 */