- Timestamp:
- Apr 18, 2019 3:54:40 PM (6 years ago)
- Location:
- trunk/src/VBox
- Files:
-
- 6 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/Devices/PC/DevPIC.cpp
r76553 r78208 811 811 SSMR3GetU8(pSSM, &pThis->aPics[i].elcr); 812 812 } 813 814 /* Note! PDM will restore the VMCPU_FF_INTERRUPT_PIC state. */ 813 815 return VINF_SUCCESS; 814 816 } -
trunk/src/VBox/VMM/VMMAll/APICAll.cpp
r78206 r78208 2979 2979 static void apicSetInterruptFF(PVMCPU pVCpu, PDMAPICIRQ enmType) 2980 2980 { 2981 #ifdef IN_RING3 2982 /* IRQ state should be loaded as-is by "LoadExec". Changes can be made from LoadDone. */ 2983 Assert(pVCpu->pVMR3->enmVMState != VMSTATE_LOADING || PDMR3HasLoadedState(pVCpu->pVMR3)); 2984 #endif 2985 2981 2986 switch (enmType) 2982 2987 { … … 3035 3040 VMM_INT_DECL(void) apicClearInterruptFF(PVMCPU pVCpu, PDMAPICIRQ enmType) 3036 3041 { 3042 #ifdef IN_RING3 3043 /* IRQ state should be loaded as-is by "LoadExec". Changes can be made from LoadDone. */ 3044 Assert(pVCpu->pVMR3->enmVMState != VMSTATE_LOADING || PDMR3HasLoadedState(pVCpu->pVMR3)); 3045 #endif 3046 3037 3047 /* NMI/SMI can't be cleared. */ 3038 3048 switch (enmType) -
trunk/src/VBox/VMM/VMMR3/APIC.cpp
r77098 r78208 1026 1026 } 1027 1027 1028 /* 1029 * Restore per CPU state. 1030 * 1031 * Note! PDM will restore the VMCPU_FF_INTERRUPT_APIC flag for us. 1032 * This code doesn't touch it. No devices should make us touch 1033 * it later during the restore either, only during the 'done' phase. 1034 */ 1028 1035 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++) 1029 1036 { -
trunk/src/VBox/VMM/VMMR3/PDM.cpp
r77348 r78208 830 830 831 831 /** 832 * For APIC assertions. 833 * 834 * @returns true if we've loaded state. 835 * @param pVM The cross context VM structure. 836 */ 837 VMMR3_INT_DECL(bool) PDMR3HasLoadedState(PVM pVM) 838 { 839 return pVM->pdm.s.fStateLoaded; 840 } 841 842 843 /** 832 844 * Bits that are saved in pass 0 and in the final pass. 833 845 * … … 975 987 /* 976 988 * Load the interrupt and DMA states. 989 * 990 * The APIC, PIC and DMA devices does not restore these, we do. In the 991 * APIC and PIC cases, it is possible that some devices is incorrectly 992 * setting IRQs during restore. We'll warn when this happens. (There 993 * are debug assertions in PDMDevMiscHlp.cpp and APICAll.cpp for 994 * catching the buggy device.) 977 995 */ 978 996 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++) … … 990 1008 return VERR_SSM_DATA_UNIT_FORMAT_CHANGED; 991 1009 } 992 AssertRelease(!VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_INTERRUPT_APIC)); /** @todo r=bird: bogus assertion, see @ticketref{18331} */ 1010 AssertLogRelMsg(!VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_INTERRUPT_APIC), 1011 ("VCPU%03u: VMCPU_FF_INTERRUPT_APIC set! Devices shouldn't set interrupts during state restore...\n", idCpu)); 993 1012 if (fInterruptPending) 994 1013 VMCPU_FF_SET(pVCpu, VMCPU_FF_INTERRUPT_APIC); … … 1004 1023 return VERR_SSM_DATA_UNIT_FORMAT_CHANGED; 1005 1024 } 1006 AssertRelease(!VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_INTERRUPT_PIC)); /** @todo r=bird: bogus assertion, see @ticketref{18331} */ 1025 AssertLogRelMsg(!VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_INTERRUPT_PIC), 1026 ("VCPU%03u: VMCPU_FF_INTERRUPT_PIC set! Devices shouldn't set interrupts during state restore...\n", idCpu)); 1007 1027 if (fInterruptPending) 1008 1028 VMCPU_FF_SET(pVCpu, VMCPU_FF_INTERRUPT_PIC); … … 1020 1040 return VERR_SSM_DATA_UNIT_FORMAT_CHANGED; 1021 1041 } 1022 Assert Release(!VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_INTERRUPT_NMI));1042 AssertLogRelMsg(!VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_INTERRUPT_NMI), ("VCPU%3u: VMCPU_FF_INTERRUPT_NMI set!\n", idCpu)); 1023 1043 if (fInterruptPending) 1024 1044 VMCPU_FF_SET(pVCpu, VMCPU_FF_INTERRUPT_NMI); … … 1034 1054 return VERR_SSM_DATA_UNIT_FORMAT_CHANGED; 1035 1055 } 1036 Assert Release(!VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_INTERRUPT_SMI));1056 AssertLogRelMsg(!VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_INTERRUPT_SMI), ("VCPU%3u: VMCPU_FF_INTERRUPT_SMI set!\n", idCpu)); 1037 1057 if (fInterruptPending) 1038 1058 VMCPU_FF_SET(pVCpu, VMCPU_FF_INTERRUPT_SMI); … … 1125 1145 pDevIns->pReg->szName, pDevIns->iInstance); 1126 1146 } 1147 1148 1149 /* 1150 * Indicate that we've been called (for assertions). 1151 */ 1152 pVM->pdm.s.fStateLoaded = true; 1127 1153 1128 1154 return VINF_SUCCESS; -
trunk/src/VBox/VMM/VMMR3/PDMDevMiscHlp.cpp
r76553 r78208 54 54 PVM pVM = pDevIns->Internal.s.pVMR3; 55 55 PVMCPU pVCpu = &pVM->aCpus[0]; /* for PIC we always deliver to CPU 0, MP use APIC */ 56 57 /* IRQ state should be loaded as-is by "LoadExec". Changes can be made from LoadDone. */ 58 Assert(pVM->enmVMState != VMSTATE_LOADING || pVM->pdm.s.fStateLoaded); 59 56 60 APICLocalInterrupt(pVCpu, 0 /* u8Pin */, 1 /* u8Level */, VINF_SUCCESS /* rcRZ */); 57 61 } … … 64 68 PVM pVM = pDevIns->Internal.s.pVMR3; 65 69 PVMCPU pVCpu = &pVM->aCpus[0]; /* for PIC we always deliver to CPU 0, MP use APIC */ 70 71 /* IRQ state should be loaded as-is by "LoadExec". Changes can be made from LoadDone. */ 72 Assert(pVM->enmVMState != VMSTATE_LOADING || pVM->pdm.s.fStateLoaded); 73 66 74 APICLocalInterrupt(pVCpu, 0 /* u8Pin */, 0 /* u8Level */, VINF_SUCCESS /* rcRZ */); 67 75 } -
trunk/src/VBox/VMM/include/PDMInternal.h
r76585 r78208 1080 1080 /** Pending reset flags (PDMVMRESET_F_XXX). */ 1081 1081 uint32_t volatile fResetFlags; 1082 1083 /** Set by pdmR3LoadExec for use in assertions. */ 1084 bool fStateLoaded; 1082 1085 /** Alignment padding. */ 1083 uint32_t volatile u32Padding;1086 bool afPadding[3]; 1084 1087 1085 1088 /** The tracing ID of the next device instance.
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