- Timestamp:
- Apr 23, 2019 9:17:44 AM (6 years ago)
- File:
-
- 1 edited
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trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp
r78257 r78258 2855 2855 hmR0VmxSetMsrPermission(pVCpu, pVmcsInfo, fIsNstGstVmcs, MSR_K8_FS_BASE, VMXMSRPM_ALLOW_RD_WR); 2856 2856 2857 #ifdef VBOX_STRICT2858 /** @todo NSTVMX: Remove this later. */2859 uint32_t fMsrpm = HMGetVmxMsrPermission(pVmcsInfo->pvMsrBitmap, MSR_IA32_SYSENTER_CS);2860 Assert((fMsrpm & VMXMSRPM_ALLOW_RD_WR) == VMXMSRPM_ALLOW_RD_WR);2861 2862 fMsrpm = HMGetVmxMsrPermission(pVmcsInfo->pvMsrBitmap, MSR_K8_GS_BASE);2863 Assert((fMsrpm & VMXMSRPM_ALLOW_RD_WR) == VMXMSRPM_ALLOW_RD_WR);2864 #endif2865 2866 2857 /* 2867 2858 * The IA32_PRED_CMD and IA32_FLUSH_CMD MSRs are write-only and has no state … … 2880 2871 hmR0VmxSetMsrPermission(pVCpu, pVmcsInfo, fIsNstGstVmcs, MSR_IA32_SPEC_CTRL, VMXMSRPM_ALLOW_RD_WR); 2881 2872 2882 /*2883 * IA32_EFER MSR is always intercepted, see @bugref{9180#c37}.2884 */2885 2886 2873 #if HC_ARCH_BITS == 64 2887 2874 /* … … 2895 2882 hmR0VmxSetMsrPermission(pVCpu, pVmcsInfo, fIsNstGstVmcs, MSR_K8_SF_MASK, VMXMSRPM_ALLOW_RD_WR); 2896 2883 hmR0VmxSetMsrPermission(pVCpu, pVmcsInfo, fIsNstGstVmcs, MSR_K8_KERNEL_GS_BASE, VMXMSRPM_ALLOW_RD_WR); 2897 2898 # ifdef VBOX_STRICT 2899 fMsrpm = HMGetVmxMsrPermission(pVmcsInfo->pvMsrBitmap, MSR_K8_GS_BASE); 2900 Assert((fMsrpm & VMXMSRPM_ALLOW_RD_WR) == VMXMSRPM_ALLOW_RD_WR); 2901 # endif 2902 } 2884 } 2885 #endif 2886 2887 /* 2888 * IA32_EFER MSR is always intercepted, see @bugref{9180#c37}. 2889 */ 2890 #ifdef VBOX_STRICT 2891 Assert(pVmcsInfo->pvMsrBitmap); 2892 uint32_t const fMsrpmEfer = HMGetVmxMsrPermission(pVmcsInfo->pvMsrBitmap, MSR_K6_EFER); 2893 Assert(fMsrpmEfer == VMXMSRPM_EXIT_RD_WR); 2903 2894 #endif 2904 2895 } … … 4927 4918 * the guest when it's not using paging. 4928 4919 */ 4929 HMVMX_CPUMCTX_ASSERT(pVCpu, CPUMCTX_EXTRN_CR3);4930 4920 GCPhysGuestCR3 = pCtx->cr3; 4931 4921 } … … 7576 7566 { 7577 7567 rc = VMXReadVmcsGstN(VMX_VMCS_GUEST_CR3, &u64Val); 7568 VMXLOCAL_BREAK_RC(rc); 7578 7569 if (pCtx->cr3 != u64Val) 7579 7570 {
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