Changeset 79167 in vbox for trunk/src/VBox/VMM
- Timestamp:
- Jun 17, 2019 5:32:49 AM (6 years ago)
- svn:sync-xref-src-repo-rev:
- 131336
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
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trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp
r79149 r79167 1356 1356 1357 1357 /* If we're for some reason not in VMX root mode, then don't leave it. */ 1358 RTCCUINTREG const uHostC R4 = ASMGetCR4();1358 RTCCUINTREG const uHostCr4 = ASMGetCR4(); 1359 1359 1360 1360 int rc; 1361 if (uHostC R4 & X86_CR4_VMXE)1361 if (uHostCr4 & X86_CR4_VMXE) 1362 1362 { 1363 1363 /* Exit VMX root mode and clear the VMX bit in CR4. */ … … 3621 3621 PCSUPHWVIRTMSRS pHwvirtMsrs) 3622 3622 { 3623 Assert (pHostCpu);3624 Assert (pHwvirtMsrs);3623 AssertPtr(pHostCpu); 3624 AssertPtr(pHwvirtMsrs); 3625 3625 Assert(!RTThreadPreemptIsEnabled(NIL_RTTHREAD)); 3626 3626 … … 3680 3680 VMMR0DECL(int) VMXR0InitVM(PVM pVM) 3681 3681 { 3682 AssertPtr(pVM); 3682 3683 LogFlowFunc(("pVM=%p\n", pVM)); 3683 3684 … … 3701 3702 VMMR0DECL(int) VMXR0TermVM(PVM pVM) 3702 3703 { 3704 AssertPtr(pVM); 3703 3705 LogFlowFunc(("pVM=%p\n", pVM)); 3704 3706 … … 3724 3726 VMMR0DECL(int) VMXR0SetupVM(PVM pVM) 3725 3727 { 3726 AssertPtr Return(pVM, VERR_INVALID_PARAMETER);3728 AssertPtr(pVM); 3727 3729 Assert(!RTThreadPreemptIsEnabled(NIL_RTTHREAD)); 3728 3730 … … 3733 3735 * VMX root mode or not without causing a #GP. 3734 3736 */ 3735 RTCCUINTREG const uHostC R4 = ASMGetCR4();3736 if (RT_LIKELY(uHostC R4 & X86_CR4_VMXE))3737 RTCCUINTREG const uHostCr4 = ASMGetCR4(); 3738 if (RT_LIKELY(uHostCr4 & X86_CR4_VMXE)) 3737 3739 { /* likely */ } 3738 3740 else … … 3891 3893 VMMR0DECL(int) VMXR0Execute64BitsHandler(PVMCPU pVCpu, HM64ON32OP enmOp, uint32_t cParams, uint32_t *paParam) 3892 3894 { 3895 AssertPtr(pVCpu); 3893 3896 PVM pVM = pVCpu->CTX_SUFF(pVM); 3894 3897 AssertReturn(pVM->hm.s.pfnHost32ToGuest64R0, VERR_HM_NO_32_TO_64_SWITCHER); … … 5094 5097 HMVMX_CPUMCTX_ASSERT(pVCpu, CPUMCTX_EXTRN_CR3); 5095 5098 5096 RTGCPHYS GCPhysGuestC R3 = NIL_RTGCPHYS;5099 RTGCPHYS GCPhysGuestCr3 = NIL_RTGCPHYS; 5097 5100 if (pVM->hm.s.fNestedPaging) 5098 5101 { … … 5141 5144 * the guest when it's not using paging. 5142 5145 */ 5143 GCPhysGuestC R3 = pCtx->cr3;5146 GCPhysGuestCr3 = pCtx->cr3; 5144 5147 } 5145 5148 else … … 5166 5169 AssertMsgFailedReturn(("%Rrc\n", rc), rc); 5167 5170 5168 GCPhysGuestC R3 = GCPhys;5171 GCPhysGuestCr3 = GCPhys; 5169 5172 } 5170 5173 5171 Log4Func(("u32GuestCr3=%#RGp (GstN)\n", GCPhysGuestC R3));5172 rc = VMXWriteVmcsGstN(VMX_VMCS_GUEST_CR3, GCPhysGuestC R3);5174 Log4Func(("u32GuestCr3=%#RGp (GstN)\n", GCPhysGuestCr3)); 5175 rc = VMXWriteVmcsGstN(VMX_VMCS_GUEST_CR3, GCPhysGuestCr3); 5173 5176 AssertRCReturn(rc, rc); 5174 5177 } … … 5176 5179 { 5177 5180 /* Non-nested paging case, just use the hypervisor's CR3. */ 5178 RTHCPHYS const HCPhysGuestC R3 = PGMGetHyperCR3(pVCpu);5179 5180 Log4Func(("u32GuestCr3=%#RHv (HstN)\n", HCPhysGuestC R3));5181 rc = VMXWriteVmcsHstN(VMX_VMCS_GUEST_CR3, HCPhysGuestC R3);5181 RTHCPHYS const HCPhysGuestCr3 = PGMGetHyperCR3(pVCpu); 5182 5183 Log4Func(("u32GuestCr3=%#RHv (HstN)\n", HCPhysGuestCr3)); 5184 rc = VMXWriteVmcsHstN(VMX_VMCS_GUEST_CR3, HCPhysGuestCr3); 5182 5185 AssertRCReturn(rc, rc); 5183 5186 } … … 6590 6593 VMMR0DECL(int) VMXWriteVmcs64Ex(PVMCPU pVCpu, uint32_t idxField, uint64_t u64Val) 6591 6594 { 6595 AssertPtr(pVCpu); 6592 6596 int rc; 6593 6597 switch (idxField) … … 7971 7975 VMMR0DECL(int) VMXR0ImportStateOnDemand(PVMCPU pVCpu, uint64_t fWhat) 7972 7976 { 7977 AssertPtr(pVCpu); 7973 7978 PCVMXVMCSINFO pVmcsInfo = hmGetVmxActiveVmcsInfo(pVCpu); 7974 7979 return hmR0VmxImportGuestState(pVCpu, pVmcsInfo, fWhat); … … 8465 8470 static int hmR0VmxExitToRing3(PVMCPU pVCpu, VBOXSTRICTRC rcExit) 8466 8471 { 8467 Assert(pVCpu);8468 8472 HMVMX_ASSERT_PREEMPT_SAFE(pVCpu); 8469 8473 … … 9146 9150 #ifdef VBOX_STRICT 9147 9151 /* At least verify VMX is enabled, since we can't check if we're in VMX root mode without #GP'ing. */ 9148 RTCCUINTREG uHostC R4 = ASMGetCR4();9149 if (!(uHostC R4 & X86_CR4_VMXE))9152 RTCCUINTREG uHostCr4 = ASMGetCR4(); 9153 if (!(uHostCr4 & X86_CR4_VMXE)) 9150 9154 { 9151 9155 LogRelFunc(("X86_CR4_VMXE bit in CR4 is not set!\n")); … … 9192 9196 VMMR0DECL(void) VMXR0ThreadCtxCallback(RTTHREADCTXEVENT enmEvent, PVMCPU pVCpu, bool fGlobalInit) 9193 9197 { 9194 NOREF(fGlobalInit); 9198 AssertPtr(pVCpu); 9199 RT_NOREF1(fGlobalInit); 9195 9200 9196 9201 switch (enmEvent) … … 12603 12608 VMMR0DECL(VBOXSTRICTRC) VMXR0RunGuestCode(PVMCPU pVCpu) 12604 12609 { 12610 AssertPtr(pVCpu); 12605 12611 PCPUMCTX pCtx = &pVCpu->cpum.GstCtx; 12606 12612 Assert(VMMRZCallRing3IsEnabled(pVCpu));
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