VirtualBox

Changeset 7956 in vbox


Ignore:
Timestamp:
Apr 14, 2008 4:08:20 PM (17 years ago)
Author:
vboxsync
Message:

Backed out 29598 (will recommit in a minute)

File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/src/VBox/VMM/VMMAll/PGMAllPool.cpp

    r7955 r7956  
    317317                    LogFlow(("pgmPoolMonitorChainChanging: Detected conflict at iShw=%#x!\n", iShw));
    318318                }
    319                 /* paranoia / a bit assumptive. (sizeof(X86PTE) - 1 = 3)*/
     319                /* paranoia / a bit assumptive. */
    320320                else if (   pCpu
    321                          && (off & 3)
    322                          && (off & 3) + pgmPoolDisasWriteSize(pCpu) > 4)
     321                         && (off & 4)
     322                         && (off & 4) + pgmPoolDisasWriteSize(pCpu) > 4)
    323323                {
    324324                    const unsigned iShw2 = (off + pgmPoolDisasWriteSize(pCpu) - 1) / sizeof(X86PTE);
     
    349349            case PGMPOOLKIND_ROOT_PAE_PD:
    350350            {
    351                 unsigned iShw = off / sizeof(X86PTEPAE);   // ASSUMING PAE guest paging!
    352                 if ((uShw.pPDPae->a[iShw].u & (PGM_PDFLAGS_MAPPING | X86_PDE_P)) == (PGM_PDFLAGS_MAPPING | X86_PDE_P))
     351                unsigned iShw = (off / sizeof(X86PTE)) * 2;   // ASSUMING 32-bit guest paging!
     352                for (unsigned i = 0; i < 2; i++, iShw++)
    353353                {
    354                     Assert(pgmMapAreMappingsEnabled(&pPool->CTXSUFF(pVM)->pgm.s));
    355                     VM_FF_SET(pPool->CTXSUFF(pVM), VM_FF_PGM_SYNC_CR3);
    356                     LogFlow(("pgmPoolMonitorChainChanging: Detected conflict at iShw=%#x!\n", iShw));
    357                 }
    358                 /* paranoia / a bit assumptive. (sizeof(X86PTEPAE) - 1 = 7)*/
    359                 else if (   pCpu
    360                             && (off & 7)
    361                             && (off & 7) + pgmPoolDisasWriteSize(pCpu) > 8)
    362                 {
    363                     const unsigned iShw2 = (off + pgmPoolDisasWriteSize(pCpu) - 1) / sizeof(X86PTEPAE);
    364                     if (    iShw2 < ELEMENTS(uShw.pPDPae->a)
    365                         &&  (uShw.pPDPae->a[iShw2].u & (PGM_PDFLAGS_MAPPING | X86_PDE_P)) == (PGM_PDFLAGS_MAPPING | X86_PDE_P))
     354                    if ((uShw.pPDPae->a[iShw].u & (PGM_PDFLAGS_MAPPING | X86_PDE_P)) == (PGM_PDFLAGS_MAPPING | X86_PDE_P))
    366355                    {
    367356                        Assert(pgmMapAreMappingsEnabled(&pPool->CTXSUFF(pVM)->pgm.s));
    368357                        VM_FF_SET(pPool->CTXSUFF(pVM), VM_FF_PGM_SYNC_CR3);
    369                         LogFlow(("pgmPoolMonitorChainChanging: Detected conflict at iShw2=%#x!\n", iShw2));
     358                        LogFlow(("pgmPoolMonitorChainChanging: Detected conflict at iShw=%#x!\n", iShw));
    370359                    }
     360                    /* paranoia / a bit assumptive. */
     361                    else if (   pCpu
     362                             && (off & 4)
     363                             && (off & 4) + pgmPoolDisasWriteSize(pCpu) > 4)
     364                    {
     365                        const unsigned iShw2 = iShw + 2;
     366                        if (    iShw2 < ELEMENTS(uShw.pPDPae->a)
     367                            &&  (uShw.pPDPae->a[iShw2].u & (PGM_PDFLAGS_MAPPING | X86_PDE_P)) == (PGM_PDFLAGS_MAPPING | X86_PDE_P))
     368                        {
     369                            Assert(pgmMapAreMappingsEnabled(&pPool->CTXSUFF(pVM)->pgm.s));
     370                            VM_FF_SET(pPool->CTXSUFF(pVM), VM_FF_PGM_SYNC_CR3);
     371                            LogFlow(("pgmPoolMonitorChainChanging: Detected conflict at iShw2=%#x!\n", iShw2));
     372                        }
     373                    }
     374#if 0 /* useful when running PGMAssertCR3(), a bit too troublesome for general use (TLBs). */
     375                    if (    uShw.pPDPae->a[iShw].n.u1Present
     376                        &&  !VM_FF_ISSET(pPool->CTXSUFF(pVM), VM_FF_PGM_SYNC_CR3))
     377                    {
     378                        LogFlow(("pgmPoolMonitorChainChanging: iShw=%#x: %RX64 -> freeing it!\n", iShw, uShw.pPDPae->a[iShw].u));
     379# ifdef IN_GC           /* TLB load - we're pushing things a bit... */
     380                        ASMProbeReadByte(pvAddress);
     381# endif
     382                        pgmPoolFree(pPool->CTXSUFF(pVM), uShw.pPDPae->a[iShw].u & X86_PDE_PAE_PG_MASK, pPage->idx, iShw);
     383                        uShw.pPDPae->a[iShw].u = 0;
     384                    }
     385#endif
    371386                }
    372 #if 0 /* useful when running PGMAssertCR3(), a bit too troublesome for general use (TLBs). */
    373                 if (    uShw.pPDPae->a[iShw].n.u1Present
    374                     &&  !VM_FF_ISSET(pPool->CTXSUFF(pVM), VM_FF_PGM_SYNC_CR3))
    375                 {
    376                     LogFlow(("pgmPoolMonitorChainChanging: iShw=%#x: %RX64 -> freeing it!\n", iShw, uShw.pPDPae->a[iShw].u));
    377 # ifdef IN_GC           /* TLB load - we're pushing things a bit... */
    378                     ASMProbeReadByte(pvAddress);
    379 # endif
    380                     pgmPoolFree(pPool->CTXSUFF(pVM), uShw.pPDPae->a[iShw].u & X86_PDE_PAE_PG_MASK, pPage->idx, iShw);
    381                     uShw.pPDPae->a[iShw].u = 0;
    382                 }
    383 #endif
    384387                break;
    385388            }
     
    11881191        case PGMPOOLKIND_ROOT_32BIT_PD:
    11891192        case PGMPOOLKIND_ROOT_PAE_PD:
    1190         case PGMPOOLKIND_ROOT_PDPT:
    11911193#ifdef PGMPOOL_WITH_MIXED_PT_CR3
    11921194            break;
     
    11941196        case PGMPOOLKIND_PAE_PD_FOR_32BIT_PD:
    11951197        case PGMPOOLKIND_64BIT_PDPT_FOR_64BIT_PDPT:
     1198        case PGMPOOLKIND_ROOT_PDPT:
    11961199        case PGMPOOLKIND_ROOT_PML4:
    11971200        default:
     
    12691272        case PGMPOOLKIND_ROOT_32BIT_PD:
    12701273        case PGMPOOLKIND_ROOT_PAE_PD:
    1271         case PGMPOOLKIND_ROOT_PDPT:
    12721274#ifdef PGMPOOL_WITH_MIXED_PT_CR3
    12731275            break;
     
    12751277        case PGMPOOLKIND_PAE_PD_FOR_32BIT_PD:
    12761278        case PGMPOOLKIND_64BIT_PDPT_FOR_64BIT_PDPT:
     1279        case PGMPOOLKIND_ROOT_PDPT:
    12771280        case PGMPOOLKIND_ROOT_PML4:
    12781281        default:
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