Changeset 7961 in vbox for trunk/src/VBox/VMM

Timestamp:

Apr 14, 2008 5:09:45 PM (17 years ago)

Author:

vboxsync

Message:

Updates for PAE paging in raw mode

Location:

trunk/src/VBox/VMM

Files:

• PGMInternal.h (modified) (1 diff)
• PGMPool.cpp (modified) (3 diffs)
• VMMAll/PGMAllGst.h (modified) (2 diffs)
• VMMAll/PGMAllPool.cpp (modified) (1 diff)

trunk/src/VBox/VMM/PGMInternal.h

@@ -1280 +1280 @@
 /** The extended PAE page directory (2048 entries, works as root currently). */
 #define PGMPOOL_IDX_PAE_PD      2
+ /** PAE Page Directory Table 0. */
+#define PGMPOOL_IDX_PAE_PD_0    3
+ /** PAE Page Directory Table 1. */
+#define PGMPOOL_IDX_PAE_PD_1    4
+ /** PAE Page Directory Table 2. */
+#define PGMPOOL_IDX_PAE_PD_2    5
+ /** PAE Page Directory Table 3. */
+#define PGMPOOL_IDX_PAE_PD_4    6
 /** Page Directory Pointer Table (PAE root, not currently used). */
-#define PGMPOOL_IDX_PDPT        3
+#define PGMPOOL_IDX_PDPT        7
 /** Page Map Level-4 (64-bit root). */
-#define PGMPOOL_IDX_PML4        4
+#define PGMPOOL_IDX_PML4        8
 /** The first normal index. */
-#define PGMPOOL_IDX_FIRST       5
+#define PGMPOOL_IDX_FIRST       9
 /** The last valid index. (inclusive, 14 bits) */
 #define PGMPOOL_IDX_LAST        0x3fff

trunk/src/VBox/VMM/PGMPool.cpp

@@ -232 +232 @@
     pPool->aPages[NIL_PGMPOOL_IDX].enmKind = PGMPOOLKIND_INVALID;
 
-    /* The Shadow 32-bit PD. */
+    /* The Shadow 32-bit PD. (32 bits guest paging) */
     pPool->aPages[PGMPOOL_IDX_PD].Core.Key  = NIL_RTHCPHYS;
     pPool->aPages[PGMPOOL_IDX_PD].GCPhys    = NIL_RTGCPHYS;
@@ -239 +239 @@
     pPool->aPages[PGMPOOL_IDX_PD].idx       = PGMPOOL_IDX_PD;
 
-    /* The Shadow PAE PDs. This is actually 4 pages! */
+    /* The Shadow PAE PDs. This is actually 4 pages! (32 bits guest paging)  */
     pPool->aPages[PGMPOOL_IDX_PAE_PD].Core.Key  = NIL_RTHCPHYS;
     pPool->aPages[PGMPOOL_IDX_PAE_PD].GCPhys    = NIL_RTGCPHYS;
@@ -245 +245 @@
     pPool->aPages[PGMPOOL_IDX_PAE_PD].enmKind   = PGMPOOLKIND_ROOT_PAE_PD;
     pPool->aPages[PGMPOOL_IDX_PAE_PD].idx       = PGMPOOL_IDX_PAE_PD;
+
+    /* The Shadow PAE PDs for PAE guest mode. */
+    for (unsigned i = 0; i < X86_PG_PAE_PDPE_ENTRIES; i++)
+    {
+        pPool->aPages[PGMPOOL_IDX_PAE_PD_0 + i].Core.Key  = NIL_RTHCPHYS;
+        pPool->aPages[PGMPOOL_IDX_PAE_PD_0 + i].GCPhys    = NIL_RTGCPHYS;
+        pPool->aPages[PGMPOOL_IDX_PAE_PD_0 + i].pvPageHC  = pVM->pgm.s.apHCPaePDs[i];
+        pPool->aPages[PGMPOOL_IDX_PAE_PD_0 + i].enmKind   = PGMPOOLKIND_PAE_PD_FOR_PAE_PD;
+        pPool->aPages[PGMPOOL_IDX_PAE_PD_0 + i].idx       = PGMPOOL_IDX_PAE_PD_0 + i;
+    }
 
     /* The Shadow PDPT. */

trunk/src/VBox/VMM/VMMAll/PGMAllGst.h

@@ -579 +579 @@
                    || pVM->pgm.s.enmShadowMode == PGMMODE_PAE_NX);
 
-            rc = pgmPoolMonitorMonitorCR3(pVM->pgm.s.CTXSUFF(pPool), PGMPOOL_IDX_PAE_PD, GCPhys);
+            rc = pgmPoolMonitorMonitorCR3(pVM->pgm.s.CTXSUFF(pPool), PGMPOOL_IDX_PAE_PD_0 + i, GCPhys);
 # endif /* PGMPOOL_WITH_MIXED_PT_CR3 */
             if (VBOX_FAILURE(rc))
@@ -658 +658 @@
 # else /* PGMPOOL_WITH_MIXED_PT_CR3 */
             Assert(pVM->pgm.s.enmShadowMode == PGMMODE_PAE || pVM->pgm.s.enmShadowMode == PGMMODE_PAE_NX);
-            int rc2 = pgmPoolMonitorUnmonitorCR3(pVM->pgm.s.CTXSUFF(pPool), PGMPOOL_IDX_PAE_PD);
+            int rc2 = pgmPoolMonitorUnmonitorCR3(pVM->pgm.s.CTXSUFF(pPool), PGMPOOL_IDX_PAE_PD_0 + i);
 # endif /* PGMPOOL_WITH_MIXED_PT_CR3 */
             AssertRC(rc2);

trunk/src/VBox/VMM/VMMAll/PGMAllPool.cpp

@@ -388 +388 @@
             }
 
+            case PGMPOOLKIND_PAE_PD_FOR_PAE_PD:
+            {
+                const unsigned iShw = off / sizeof(X86PTEPAE);
+                if (uShw.pPDPae->a[iShw].u & PGM_PDFLAGS_MAPPING)
+                {
+                    Assert(pgmMapAreMappingsEnabled(&pPool->CTXSUFF(pVM)->pgm.s));
+                    VM_FF_SET(pPool->CTXSUFF(pVM), VM_FF_PGM_SYNC_CR3);
+                    LogFlow(("pgmPoolMonitorChainChanging: Detected conflict at iShw=%#x!\n", iShw));
+                }
+                /* paranoia / a bit assumptive. */
+                else if (   pCpu
+                         && (off & 7)
+                         && (off & 7) + pgmPoolDisasWriteSize(pCpu) > 8)
+                {
+                    const unsigned iShw2 = (off + pgmPoolDisasWriteSize(pCpu) - 1) / sizeof(X86PTEPAE);
+                    if (    iShw2 != iShw
+                        &&  iShw2 < ELEMENTS(uShw.pPDPae->a)
+                        &&  uShw.pPDPae->a[iShw2].u & PGM_PDFLAGS_MAPPING)
+                    {
+                        Assert(pgmMapAreMappingsEnabled(&pPool->CTXSUFF(pVM)->pgm.s));
+                        VM_FF_SET(pPool->CTXSUFF(pVM), VM_FF_PGM_SYNC_CR3);
+                        LogFlow(("pgmPoolMonitorChainChanging: Detected conflict at iShw2=%#x!\n", iShw2));
+                    }
+                }
+#if 0 /* useful when running PGMAssertCR3(), a bit too troublesome for general use (TLBs). */
+                if (    uShw.pPDPae->a[iShw].n.u1Present
+                    &&  !VM_FF_ISSET(pPool->CTXSUFF(pVM), VM_FF_PGM_SYNC_CR3))
+                {
+                    LogFlow(("pgmPoolMonitorChainChanging: iShw=%#x: %RX32 -> freeing it!\n", iShw, uShw.pPDPae->a[iShw].u));
+# ifdef IN_GC       /* TLB load - we're pushing things a bit... */
+                    ASMProbeReadByte(pvAddress);
+# endif
+                    pgmPoolFree(pPool->CTXSUFF(pVM), uShwpPDPae->a[iShw].u & X86_PDE_PG_MASK, pPage->idx, iShw);
+                    uShw.pPDPae->a[iShw].u = 0;
+                }
+#endif
+                break;
+            }
+
             default:
                 AssertFatalMsgFailed(("enmKind=%d\n", pPage->enmKind));