VirtualBox

Changeset 80020 in vbox


Ignore:
Timestamp:
Jul 26, 2019 6:49:57 PM (5 years ago)
Author:
vboxsync
Message:

VMM: Kicking out raw-mode (work in progress) - vm.h. bugref:9517

Location:
trunk
Files:
8 edited

Legend:

Unmodified
Added
Removed

  • trunk/include/VBox/vmm/vm.h

    r79995 r80020  
    350350/** The name of the ring-0 context VMM Core module. */
    351351#define VMMR0_MAIN_MODULE_NAME          "VMMR0.r0"
    352 
    353 /**
    354  * Wrapper macro for avoiding too much \#ifdef VBOX_WITH_RAW_MODE.
    355  */
    356 #ifdef VBOX_WITH_RAW_MODE
    357 # define VM_WHEN_RAW_MODE(a_WithExpr, a_WithoutExpr)    a_WithExpr
    358 #else
    359 # define VM_WHEN_RAW_MODE(a_WithExpr, a_WithoutExpr)    a_WithoutExpr
    360 #endif
    361352
    362353
    … …  
    506497/** The bit number for VMCPU_FF_TLB_FLUSH. */
    507498#define VMCPU_FF_TLB_FLUSH_BIT              19
    508 #ifdef VBOX_WITH_RAW_MODE
    509 /** Check the interrupt and trap gates */
    510 # define VMCPU_FF_TRPM_SYNC_IDT             RT_BIT_64(VMCPU_FF_TRPM_SYNC_IDT_BIT)
    511 # define VMCPU_FF_TRPM_SYNC_IDT_BIT         20
    512 /** Check Guest's TSS ring 0 stack */
    513 # define VMCPU_FF_SELM_SYNC_TSS             RT_BIT_64(VMCPU_FF_SELM_SYNC_TSS_BIT)
    514 # define VMCPU_FF_SELM_SYNC_TSS_BIT         21
    515 /** Check Guest's GDT table */
    516 # define VMCPU_FF_SELM_SYNC_GDT             RT_BIT_64(VMCPU_FF_SELM_SYNC_GDT_BIT)
    517 # define VMCPU_FF_SELM_SYNC_GDT_BIT         22
    518 /** Check Guest's LDT table */
    519 # define VMCPU_FF_SELM_SYNC_LDT             RT_BIT_64(VMCPU_FF_SELM_SYNC_LDT_BIT)
    520 # define VMCPU_FF_SELM_SYNC_LDT_BIT         23
    521 #endif /* VBOX_WITH_RAW_MODE */
     499/* 20 used to be VMCPU_FF_TRPM_SYNC_IDT (raw-mode only). */
     500/* 21 used to be VMCPU_FF_SELM_SYNC_TSS (raw-mode only). */
     501/* 22 used to be VMCPU_FF_SELM_SYNC_GDT (raw-mode only). */
     502/* 23 used to be VMCPU_FF_SELM_SYNC_LDT (raw-mode only). */
    522503/** Inhibit interrupts pending. See EMGetInhibitInterruptsPC(). */
    523504#define VMCPU_FF_INHIBIT_INTERRUPTS         RT_BIT_64(VMCPU_FF_INHIBIT_INTERRUPTS_BIT)
    … …  
    526507#define VMCPU_FF_BLOCK_NMIS                 RT_BIT_64(VMCPU_FF_BLOCK_NMIS_BIT)
    527508#define VMCPU_FF_BLOCK_NMIS_BIT             25
    528 #ifdef VBOX_WITH_RAW_MODE
    529 /** CSAM needs to scan the page that's being executed */
    530 # define VMCPU_FF_CSAM_SCAN_PAGE            RT_BIT_64(VMCPU_FF_CSAM_SCAN_PAGE_BIT)
    531 # define VMCPU_FF_CSAM_SCAN_PAGE_BIT        26
    532 /** CSAM needs to do some homework. */
    533 # define VMCPU_FF_CSAM_PENDING_ACTION       RT_BIT_64(VMCPU_FF_CSAM_PENDING_ACTION_BIT)
    534 # define VMCPU_FF_CSAM_PENDING_ACTION_BIT   27
    535 #endif /* VBOX_WITH_RAW_MODE */
    536509/** Force return to Ring-3. */
    537510#define VMCPU_FF_TO_R3                      RT_BIT_64(VMCPU_FF_TO_R3_BIT)
    … …  
    543516#define VMCPU_FF_IOM                        RT_BIT_64(VMCPU_FF_IOM_BIT)
    544517#define VMCPU_FF_IOM_BIT                    29
    545 #ifdef VBOX_WITH_RAW_MODE
    546 /** CPUM need to adjust CR0.TS/EM before executing raw-mode code again.  */
    547 # define VMCPU_FF_CPUM                      RT_BIT_64(VMCPU_FF_CPUM_BIT)
    548 /** The bit number for VMCPU_FF_CPUM. */
    549 # define VMCPU_FF_CPUM_BIT                  30
    550 #endif /* VBOX_WITH_RAW_MODE */
     518/* 30 used to be VMCPU_FF_CPUM */
    551519/** VMX-preemption timer in effect. */
    552520#define VMCPU_FF_VMX_PREEMPT_TIMER          RT_BIT_64(VMCPU_FF_VMX_PREEMPT_TIMER_BIT)
    … …  
    589557                                                 | VMCPU_FF_PGM_SYNC_CR3 | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \
    590558                                                 | VMCPU_FF_INTERRUPT_NESTED_GUEST | VMCPU_FF_VMX_MTF  | VMCPU_FF_VMX_APIC_WRITE \
    591                                                  | VMCPU_FF_VMX_PREEMPT_TIMER | VMCPU_FF_VMX_NMI_WINDOW | VMCPU_FF_VMX_INT_WINDOW \
    592                                                  | VM_WHEN_RAW_MODE(  VMCPU_FF_SELM_SYNC_TSS | VMCPU_FF_TRPM_SYNC_IDT \
    593                                                                     | VMCPU_FF_SELM_SYNC_GDT | VMCPU_FF_SELM_SYNC_LDT, 0 ) )
     559                                                 | VMCPU_FF_VMX_PREEMPT_TIMER | VMCPU_FF_VMX_NMI_WINDOW | VMCPU_FF_VMX_INT_WINDOW )
    594560
    595561/** High priority VM pre raw-mode execution mask. */
    … …  
    597563/** High priority VMCPU pre raw-mode execution mask. */
    598564#define VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK     (  VMCPU_FF_PGM_SYNC_CR3 | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL \
    599                                                  | VMCPU_FF_INHIBIT_INTERRUPTS \
    600                                                  | VM_WHEN_RAW_MODE(  VMCPU_FF_SELM_SYNC_TSS | VMCPU_FF_TRPM_SYNC_IDT \
    601                                                                     | VMCPU_FF_SELM_SYNC_GDT | VMCPU_FF_SELM_SYNC_LDT, 0) )
     565                                                 | VMCPU_FF_INHIBIT_INTERRUPTS )
    602566
    603567/** High priority post-execution actions. */
    604568#define VM_FF_HIGH_PRIORITY_POST_MASK           (  VM_FF_PGM_NO_MEMORY )
    605569/** High priority post-execution actions. */
    606 #define VMCPU_FF_HIGH_PRIORITY_POST_MASK        (  VMCPU_FF_PDM_CRITSECT   | VM_WHEN_RAW_MODE(VMCPU_FF_CSAM_PENDING_ACTION, 0) \
     570#define VMCPU_FF_HIGH_PRIORITY_POST_MASK        (  VMCPU_FF_PDM_CRITSECT \
    607571                                                 | VMCPU_FF_HM_UPDATE_CR3  | VMCPU_FF_HM_UPDATE_PAE_PDPES \
    608572                                                 | VMCPU_FF_IEM | VMCPU_FF_IOM )
    … …  
    612576                                                 | VM_FF_PGM_NO_MEMORY  | VM_FF_EMT_RENDEZVOUS)
    613577/** Normal priority VMCPU post-execution actions. */
    614 #define VMCPU_FF_NORMAL_PRIORITY_POST_MASK      ( VM_WHEN_RAW_MODE(VMCPU_FF_CSAM_SCAN_PAGE, 0) | VMCPU_FF_DBGF )
     578#define VMCPU_FF_NORMAL_PRIORITY_POST_MASK      ( VMCPU_FF_DBGF )
    615579
    616580/** Normal priority VM actions. */
    … …  
    681645/** All the forced VMCPU flags except those related to raw-mode and hardware
    682646 * assisted execution. */
    683 #define VMCPU_FF_ALL_REM_MASK                   (~(  VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK | VMCPU_FF_PDM_CRITSECT \
    684                                                    | VMCPU_FF_TLB_FLUSH | VM_WHEN_RAW_MODE(VMCPU_FF_CSAM_PENDING_ACTION, 0) ))
     647#define VMCPU_FF_ALL_REM_MASK                   (~(VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK | VMCPU_FF_PDM_CRITSECT | VMCPU_FF_TLB_FLUSH))
    685648/** @} */
    686649

  • trunk/src/VBox/VMM/VMMAll/CPUMAllRegs.cpp

    r80007 r80020  
    608608VMMDECL(int) CPUMSetGuestGDTR(PVMCPU pVCpu, uint64_t GCPtrBase, uint16_t cbLimit)
    609609{
    610 #ifdef VBOX_WITH_RAW_MODE_NOT_R0
    611     if (VM_IS_RAW_MODE_ENABLED(pVCpu->CTX_SUFF(pVM)))
    612         VMCPU_FF_SET(pVCpu, VMCPU_FF_SELM_SYNC_GDT);
    613 #endif
    614610    pVCpu->cpum.s.Guest.gdtr.cbGdt = cbLimit;
    615611    pVCpu->cpum.s.Guest.gdtr.pGdt  = GCPtrBase;
    … …  
    622618VMMDECL(int) CPUMSetGuestIDTR(PVMCPU pVCpu, uint64_t GCPtrBase, uint16_t cbLimit)
    623619{
    624 #ifdef VBOX_WITH_RAW_MODE_NOT_R0
    625     if (VM_IS_RAW_MODE_ENABLED(pVCpu->CTX_SUFF(pVM)))
    626         VMCPU_FF_SET(pVCpu, VMCPU_FF_TRPM_SYNC_IDT);
    627 #endif
    628620    pVCpu->cpum.s.Guest.idtr.cbIdt = cbLimit;
    629621    pVCpu->cpum.s.Guest.idtr.pIdt  = GCPtrBase;
    … …  
    636628VMMDECL(int) CPUMSetGuestTR(PVMCPU pVCpu, uint16_t tr)
    637629{
    638 #ifdef VBOX_WITH_RAW_MODE_NOT_R0
    639     if (VM_IS_RAW_MODE_ENABLED(pVCpu->CTX_SUFF(pVM)))
    640         VMCPU_FF_SET(pVCpu, VMCPU_FF_SELM_SYNC_TSS);
    641 #endif
    642630    pVCpu->cpum.s.Guest.tr.Sel  = tr;
    643631    pVCpu->cpum.s.fChanged |= CPUM_CHANGED_TR;
    … …  
    648636VMMDECL(int) CPUMSetGuestLDTR(PVMCPU pVCpu, uint16_t ldtr)
    649637{
    650 #ifdef VBOX_WITH_RAW_MODE_NOT_R0
    651     if (   (   ldtr != 0
    652             || pVCpu->cpum.s.Guest.ldtr.Sel != 0)
    653         && VM_IS_RAW_MODE_ENABLED(pVCpu->CTX_SUFF(pVM)))
    654         VMCPU_FF_SET(pVCpu, VMCPU_FF_SELM_SYNC_LDT);
    655 #endif
    656638    pVCpu->cpum.s.Guest.ldtr.Sel      = ldtr;
    657639    /* The caller will set more hidden bits if it has them. */

  • trunk/src/VBox/VMM/VMMAll/IEMAll.cpp

    r80007 r80020  
    1449814498                                                                | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL
    1449914499                                                                | VMCPU_FF_TLB_FLUSH
    14500 #ifdef VBOX_WITH_RAW_MODE
    14501                                                                 | VMCPU_FF_TRPM_SYNC_IDT
    14502                                                                 | VMCPU_FF_SELM_SYNC_TSS
    14503                                                                 | VMCPU_FF_SELM_SYNC_GDT
    14504                                                                 | VMCPU_FF_SELM_SYNC_LDT
    14505 #endif
    1450614500                                                                | VMCPU_FF_INHIBIT_INTERRUPTS
    1450714501                                                                | VMCPU_FF_BLOCK_NMIS
    … …  
    1466814662                                                                | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL
    1466914663                                                                | VMCPU_FF_TLB_FLUSH
    14670 #ifdef VBOX_WITH_RAW_MODE
    14671                                                                 | VMCPU_FF_TRPM_SYNC_IDT
    14672                                                                 | VMCPU_FF_SELM_SYNC_TSS
    14673                                                                 | VMCPU_FF_SELM_SYNC_GDT
    14674                                                                 | VMCPU_FF_SELM_SYNC_LDT
    14675 #endif
    1467614664                                                                | VMCPU_FF_INHIBIT_INTERRUPTS
    1467714665                                                                | VMCPU_FF_BLOCK_NMIS

  • trunk/src/VBox/VMM/VMMAll/IEMAllCImpl.cpp.h

    r79074 r80020  
    58965896            /* SELM - VME may change things wrt to the TSS shadowing. */
    58975897            if ((uNewCrX ^ uOldCrX) & X86_CR4_VME)
    5898             {
    5899                 Log(("iemCImpl_load_CrX: VME %d -> %d => Setting VMCPU_FF_SELM_SYNC_TSS\n",
    5900                      RT_BOOL(uOldCrX & X86_CR4_VME), RT_BOOL(uNewCrX & X86_CR4_VME) ));
    5901 #ifdef VBOX_WITH_RAW_MODE
    5902                 if (VM_IS_RAW_MODE_ENABLED(pVCpu->CTX_SUFF(pVM)))
    5903                     VMCPU_FF_SET(pVCpu, VMCPU_FF_SELM_SYNC_TSS);
    5904 #endif
    5905             }
     5898                Log(("iemCImpl_load_CrX: VME %d -> %d\n", RT_BOOL(uOldCrX & X86_CR4_VME), RT_BOOL(uNewCrX & X86_CR4_VME) ));
    59065899
    59075900            /* PGM - flushing and mode. */

  • trunk/src/VBox/VMM/VMMR3/EM.cpp

    r80017 r80020  
    12411241        AssertCompile(VMCPU_FF_ALL_REM_MASK & VMCPU_FF_TIMER);
    12421242        if (    VM_FF_IS_ANY_SET(pVM, VM_FF_ALL_REM_MASK)
    1243             ||  VMCPU_FF_IS_ANY_SET(pVCpu,
    1244                                      VMCPU_FF_ALL_REM_MASK
    1245                                    & VM_WHEN_RAW_MODE(~(VMCPU_FF_CSAM_PENDING_ACTION | VMCPU_FF_CSAM_SCAN_PAGE), UINT32_MAX)) )
     1243            ||  VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_ALL_REM_MASK) )
    12461244        {
    12471245#ifdef VBOX_WITH_REM
    … …  
    18701868        /* check that we got them all  */
    18711869        AssertCompile(VM_FF_NORMAL_PRIORITY_POST_MASK == (VM_FF_CHECK_VM_STATE | VM_FF_DBGF | VM_FF_RESET | VM_FF_PGM_NO_MEMORY | VM_FF_EMT_RENDEZVOUS));
    1872         AssertCompile(VMCPU_FF_NORMAL_PRIORITY_POST_MASK == (VM_WHEN_RAW_MODE(VMCPU_FF_CSAM_SCAN_PAGE, 0) | VMCPU_FF_DBGF));
     1870        AssertCompile(VMCPU_FF_NORMAL_PRIORITY_POST_MASK == VMCPU_FF_DBGF);
    18731871    }
    18741872
    … …  
    23732371        /* check that we got them all  */
    23742372        AssertCompile(VM_FF_HIGH_PRIORITY_PRE_MASK == (VM_FF_TM_VIRTUAL_SYNC | VM_FF_DBGF | VM_FF_CHECK_VM_STATE | VM_FF_DEBUG_SUSPEND | VM_FF_PGM_NEED_HANDY_PAGES | VM_FF_PGM_NO_MEMORY | VM_FF_EMT_RENDEZVOUS));
    2375         AssertCompile(VMCPU_FF_HIGH_PRIORITY_PRE_MASK == (VMCPU_FF_TIMER | VMCPU_FF_INTERRUPT_APIC | VMCPU_FF_UPDATE_APIC | VMCPU_FF_INTERRUPT_PIC | VMCPU_FF_PGM_SYNC_CR3 | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL | VMCPU_FF_INHIBIT_INTERRUPTS | VMCPU_FF_DBGF | VMCPU_FF_INTERRUPT_NESTED_GUEST | VMCPU_FF_VMX_MTF | VMCPU_FF_VMX_APIC_WRITE | VMCPU_FF_VMX_PREEMPT_TIMER | VMCPU_FF_VMX_INT_WINDOW | VMCPU_FF_VMX_NMI_WINDOW | VM_WHEN_RAW_MODE(VMCPU_FF_SELM_SYNC_TSS | VMCPU_FF_TRPM_SYNC_IDT | VMCPU_FF_SELM_SYNC_GDT | VMCPU_FF_SELM_SYNC_LDT, 0)));
     2373        AssertCompile(VMCPU_FF_HIGH_PRIORITY_PRE_MASK == (VMCPU_FF_TIMER | VMCPU_FF_INTERRUPT_APIC | VMCPU_FF_UPDATE_APIC | VMCPU_FF_INTERRUPT_PIC | VMCPU_FF_PGM_SYNC_CR3 | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL | VMCPU_FF_INHIBIT_INTERRUPTS | VMCPU_FF_DBGF | VMCPU_FF_INTERRUPT_NESTED_GUEST | VMCPU_FF_VMX_MTF | VMCPU_FF_VMX_APIC_WRITE | VMCPU_FF_VMX_PREEMPT_TIMER | VMCPU_FF_VMX_INT_WINDOW | VMCPU_FF_VMX_NMI_WINDOW));
    23762374    }
    23772375

  • trunk/src/VBox/VMM/VMMRZ/CPUMRZ.cpp

    r76553 r80020  
    4949    {
    5050        case 0:
    51 #ifdef IN_RC
    52             cpumRZSaveHostFPUState(&pVCpu->cpum.s);
    53             VMCPU_FF_SET(pVCpu, VMCPU_FF_CPUM);     /* Must recalc CR0 before executing more code! */
    54 #else
    5551            if (cpumRZSaveHostFPUState(&pVCpu->cpum.s) == VINF_CPUM_HOST_CR0_MODIFIED)
    5652                HMR0NotifyCpumModifiedHostCr0(pVCpu);
    57 #endif
    5853            Log6(("CPUMRZFpuStatePrepareHostCpuForUse: #0 - %#x\n", ASMGetCR0()));
    5954            break;
    6055
    6156        case CPUM_USED_FPU_HOST:
    62 #ifdef IN_RC
    63             VMCPU_FF_SET(pVCpu, VMCPU_FF_CPUM);     /* (should be set already) */
    64 #elif defined(IN_RING0) && ARCH_BITS == 32 && defined(VBOX_WITH_64_BITS_GUESTS)
     57#if defined(IN_RING0) && ARCH_BITS == 32 && defined(VBOX_WITH_64_BITS_GUESTS)
    6558            if (pVCpu->cpum.s.fUseFlags | CPUM_SYNC_FPU_STATE)
    6659            {
    … …  
    8275#ifdef IN_RING0
    8376            HMR0NotifyCpumUnloadedGuestFpuState(pVCpu);
    84 #else
    85             VMCPU_FF_SET(pVCpu, VMCPU_FF_CPUM);     /* Must recalc CR0 before executing more code! */
    8677#endif
    8778            Log6(("CPUMRZFpuStatePrepareHostCpuForUse: #2 - %#x\n", ASMGetCR0()));

  • trunk/src/VBox/VMM/VMMRZ/CPUMRZA.asm

    r76553 r80020  
    3535; Saves the host FPU/SSE/AVX state.
    3636;
    37 ; Will return with CR0.EM and CR0.TS cleared!  This is the normal state in
    38 ; ring-0, whereas in raw-mode the caller will probably set VMCPU_FF_CPUM to
    39 ; re-evaluate the situation before executing more guest code.
     37; Will return with CR0.EM and CR0.TS cleared!  This is the normal state in ring-0.
    4038;
    4139; @returns  VINF_SUCCESS (0) or VINF_CPUM_HOST_CR0_MODIFIED. (EAX)

  • trunk/src/recompiler/VBoxRecompiler.c

    r80007 r80020  
    17841784    pCtx->cr0 = env->cr[0];
    17851785    pCtx->cr3 = env->cr[3];
    1786 #ifdef VBOX_WITH_RAW_MODE
    1787     if (((env->cr[4] ^ pCtx->cr4) & X86_CR4_VME) && VM_IS_RAW_MODE_ENABLED(pVM))
    1788         VMCPU_FF_SET(env->pVCpu, VMCPU_FF_SELM_SYNC_TSS);
    1789 #endif
    17901786    pCtx->cr4 = env->cr[4];
    17911787
    … …  
    19071903    pCtx->cr0 = env->cr[0];
    19081904    pCtx->cr3 = env->cr[3];
    1909 #ifdef VBOX_WITH_RAW_MODE
    1910     if (((env->cr[4] ^ pCtx->cr4) & X86_CR4_VME) && VM_IS_RAW_MODE_ENABLED(pVM))
    1911         VMCPU_FF_SET(env->pVCpu, VMCPU_FF_SELM_SYNC_TSS);
    1912 #endif
    19131905    pCtx->cr4 = env->cr[4];
    19141906
    … …  
    19561948    pCtx->cr0 = env->cr[0];
    19571949    pCtx->cr3 = env->cr[3];
    1958 #ifdef VBOX_WITH_RAW_MODE
    1959     if (((env->cr[4] ^ pCtx->cr4) & X86_CR4_VME) && VM_IS_RAW_MODE_ENABLED(pVM))
    1960         VMCPU_FF_SET(env->pVCpu, VMCPU_FF_SELM_SYNC_TSS);
    1961 #endif
    19621950    pCtx->cr4 = env->cr[4];
    19631951#ifdef TARGET_X86_64
    … …  
    26612649    pCtx->cr2           = pVM->rem.s.Env.cr[2];
    26622650    pCtx->cr3           = pVM->rem.s.Env.cr[3];
    2663 #ifdef VBOX_WITH_RAW_MODE
    2664     if (((pVM->rem.s.Env.cr[4] ^ pCtx->cr4) & X86_CR4_VME) && VM_IS_RAW_MODE_ENABLED(pVM))
    2665         VMCPU_FF_SET(pVCpu, VMCPU_FF_SELM_SYNC_TSS);
    2666 #endif
    26672651    pCtx->cr4           = pVM->rem.s.Env.cr[4];
    26682652
    … …  
    26752659        pCtx->gdtr.pGdt = pVM->rem.s.Env.gdt.base;
    26762660        STAM_COUNTER_INC(&gStatREMGDTChange);
    2677 #ifdef VBOX_WITH_RAW_MODE
    2678         if (VM_IS_RAW_MODE_ENABLED(pVM))
    2679             VMCPU_FF_SET(pVCpu, VMCPU_FF_SELM_SYNC_GDT);
    2680 #endif
    26812661    }
    26822662
    … …  
    26862666        pCtx->idtr.pIdt = pVM->rem.s.Env.idt.base;
    26872667        STAM_COUNTER_INC(&gStatREMIDTChange);
    2688 #ifdef VBOX_WITH_RAW_MODE
    2689         if (VM_IS_RAW_MODE_ENABLED(pVM))
    2690             VMCPU_FF_SET(pVCpu, VMCPU_FF_TRPM_SYNC_IDT);
    2691 #endif
    26922668    }
    26932669
    … …  
    27072683        pCtx->ldtr.Attr.u   = (pVM->rem.s.Env.ldt.flags >> SEL_FLAGS_SHIFT) & SEL_FLAGS_SMASK;
    27082684        STAM_COUNTER_INC(&gStatREMLDTRChange);
    2709 #ifdef VBOX_WITH_RAW_MODE
    2710         if (VM_IS_RAW_MODE_ENABLED(pVM))
    2711             VMCPU_FF_SET(pVCpu, VMCPU_FF_SELM_SYNC_LDT);
    2712 #endif
    27132685    }
    27142686
    … …  
    27332705        Assert(pCtx->tr.Attr.u & ~DESC_INTEL_UNUSABLE);
    27342706        STAM_COUNTER_INC(&gStatREMTRChange);
    2735 #ifdef VBOX_WITH_RAW_MODE
    2736         if (VM_IS_RAW_MODE_ENABLED(pVM))
    2737             VMCPU_FF_SET(pVCpu, VMCPU_FF_SELM_SYNC_TSS);
    2738 #endif
    27392707    }
    27402708
    … …  
    29122880    pCtx->cr2           = pVM->rem.s.Env.cr[2];
    29132881    pCtx->cr3           = pVM->rem.s.Env.cr[3];
    2914 #ifdef VBOX_WITH_RAW_MODE
    2915     if (((pVM->rem.s.Env.cr[4] ^ pCtx->cr4) & X86_CR4_VME) && VM_IS_RAW_MODE_ENABLED(pVM))
    2916         VMCPU_FF_SET(pVCpu, VMCPU_FF_SELM_SYNC_TSS);
    2917 #endif
    29182882    pCtx->cr4           = pVM->rem.s.Env.cr[4];
    29192883
    … …  
    29262890        pCtx->gdtr.pGdt     = (RTGCPTR)pVM->rem.s.Env.gdt.base;
    29272891        STAM_COUNTER_INC(&gStatREMGDTChange);
    2928 #ifdef VBOX_WITH_RAW_MODE
    2929         if (VM_IS_RAW_MODE_ENABLED(pVM))
    2930             VMCPU_FF_SET(pVCpu, VMCPU_FF_SELM_SYNC_GDT);
    2931 #endif
    29322892    }
    29332893
    … …  
    29372897        pCtx->idtr.pIdt     = (RTGCPTR)pVM->rem.s.Env.idt.base;
    29382898        STAM_COUNTER_INC(&gStatREMIDTChange);
    2939 #ifdef VBOX_WITH_RAW_MODE
    2940         if (VM_IS_RAW_MODE_ENABLED(pVM))
    2941             VMCPU_FF_SET(pVCpu, VMCPU_FF_TRPM_SYNC_IDT);
    2942 #endif
    29432899    }
    29442900
    … …  
    29582914        pCtx->ldtr.Attr.u   = (pVM->rem.s.Env.ldt.flags >> SEL_FLAGS_SHIFT) & SEL_FLAGS_SMASK;
    29592915        STAM_COUNTER_INC(&gStatREMLDTRChange);
    2960 #ifdef VBOX_WITH_RAW_MODE
    2961         if (VM_IS_RAW_MODE_ENABLED(pVM))
    2962             VMCPU_FF_SET(pVCpu, VMCPU_FF_SELM_SYNC_LDT);
    2963 #endif
    29642916    }
    29652917
    … …  
    29842936        Assert(pCtx->tr.Attr.u & ~DESC_INTEL_UNUSABLE);
    29852937        STAM_COUNTER_INC(&gStatREMTRChange);
    2986 #ifdef VBOX_WITH_RAW_MODE
    2987         if (VM_IS_RAW_MODE_ENABLED(pVM))
    2988             VMCPU_FF_SET(pVCpu, VMCPU_FF_SELM_SYNC_TSS);
    2989 #endif
    29902938    }
    29912939
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