VirtualBox

Changeset 80062 in vbox


Ignore:
Timestamp:
Jul 31, 2019 8:57:49 AM (6 years ago)
Author:
vboxsync
svn:sync-xref-src-repo-rev:
132501
Message:

VMM: Kicking out raw-mode - APIC. bugref:9517

Location:
trunk
Files:
6 edited

Legend:

Unmodified
Added
Removed
  • trunk/include/VBox/vmm/apic.h

    r78870 r80062  
    187187VMM_INT_DECL(int)           APICBusDeliver(PVM pVM, uint8_t uDest, uint8_t uDestMode, uint8_t uDeliveryMode, uint8_t uVector,
    188188                                           uint8_t uPolarity, uint8_t uTriggerMode, uint32_t uTagSrc);
    189 VMM_INT_DECL(int)           APICGetApicPageForCpu(PCVMCPU pVCpu, PRTHCPHYS pHCPhys, PRTR0PTR pR0Ptr, PRTR3PTR pR3Ptr,
    190                                                   PRTRCPTR pRCPtr);
     189VMM_INT_DECL(int)           APICGetApicPageForCpu(PCVMCPU pVCpu, PRTHCPHYS pHCPhys, PRTR0PTR pR0Ptr, PRTR3PTR pR3Ptr);
    191190
    192191/** @name Hyper-V interface (Ring-3 and all-context API).
  • trunk/src/VBox/VMM/VMMAll/APICAll.cpp

    r79264 r80062  
    34903490 * @param   pR0Ptr          Where to store the ring-0 address.
    34913491 * @param   pR3Ptr          Where to store the ring-3 address (optional).
    3492  * @param   pRCPtr          Where to store the raw-mode context address
    3493  *                          (optional).
    3494  */
    3495 VMM_INT_DECL(int) APICGetApicPageForCpu(PCVMCPU pVCpu, PRTHCPHYS pHCPhys, PRTR0PTR pR0Ptr, PRTR3PTR pR3Ptr, PRTRCPTR pRCPtr)
     3492 */
     3493VMM_INT_DECL(int) APICGetApicPageForCpu(PCVMCPU pVCpu, PRTHCPHYS pHCPhys, PRTR0PTR pR0Ptr, PRTR3PTR pR3Ptr)
    34963494{
    34973495    AssertReturn(pVCpu,   VERR_INVALID_PARAMETER);
     
    35063504    if (pR3Ptr)
    35073505        *pR3Ptr  = pApicCpu->pvApicPageR3;
    3508     if (pRCPtr)
    3509         *pRCPtr  = pApicCpu->pvApicPageRC;
    35103506    return VINF_SUCCESS;
    35113507}
  • trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp

    r80057 r80062  
    18081808                if (   PDMHasApic(pVCpu->CTX_SUFF(pVM))
    18091809                    && (pVM->hm.s.vmx.Msrs.ProcCtls.n.allowed1 & VMX_PROC_CTLS_USE_TPR_SHADOW))
    1810                 {
    1811                     rc = APICGetApicPageForCpu(pVCpu, &pVmcsInfo->HCPhysVirtApic, (PRTR0PTR)&pVmcsInfo->pbVirtApic,
    1812                                                NULL /* pR3Ptr */, NULL /* pRCPtr */);
    1813                 }
     1810                    rc = APICGetApicPageForCpu(pVCpu, &pVmcsInfo->HCPhysVirtApic, (PRTR0PTR)&pVmcsInfo->pbVirtApic, NULL /*pR3Ptr*/);
    18141811            }
    18151812        }
  • trunk/src/VBox/VMM/VMMR3/APIC.cpp

    r78208 r80062  
    11901190static DECLCALLBACK(void) apicR3Relocate(PPDMDEVINS pDevIns, RTGCINTPTR offDelta)
    11911191{
    1192     PVM      pVM      = PDMDevHlpGetVM(pDevIns);
    1193     PAPIC    pApic    = VM_TO_APIC(pVM);
    1194     PAPICDEV pApicDev = PDMINS_2_DATA(pDevIns, PAPICDEV);
    1195 
    1196     LogFlow(("APIC: apicR3Relocate: pVM=%p pDevIns=%p offDelta=%RGi\n", pVM, pDevIns, offDelta));
    1197 
    1198     pApicDev->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
    1199 
    1200     pApic->pApicDevRC   = PDMINS_2_DATA_RCPTR(pDevIns);
    1201     pApic->pvApicPibRC += offDelta;
    1202 
    1203     for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
    1204     {
    1205         PVMCPU   pVCpu         = &pVM->aCpus[idCpu];
    1206         PAPICCPU pApicCpu      = VMCPU_TO_APICCPU(pVCpu);
    1207         pApicCpu->pTimerRC     = TMTimerRCPtr(pApicCpu->pTimerR3);
    1208 
    1209         pApicCpu->pvApicPageRC += offDelta;
    1210         pApicCpu->pvApicPibRC  += offDelta;
    1211         Log2(("APIC%u: apicR3Relocate: APIC PIB at %RGv\n", pVCpu->idCpu, pApicCpu->pvApicPibRC));
    1212     }
     1192    RT_NOREF(pDevIns, offDelta);
    12131193}
    12141194
     
    12341214        pApic->pvApicPibR3 = NIL_RTR3PTR;
    12351215        pApic->pvApicPibR0 = NIL_RTR0PTR;
    1236         pApic->pvApicPibRC = NIL_RTRCPTR;
    12371216    }
    12381217
     
    12451224        pApicCpu->pvApicPibR3 = NIL_RTR3PTR;
    12461225        pApicCpu->pvApicPibR0 = NIL_RTR0PTR;
    1247         pApicCpu->pvApicPibRC = NIL_RTRCPTR;
    12481226
    12491227        if (pApicCpu->pvApicPageR3 != NIL_RTR3PTR)
     
    12521230            pApicCpu->pvApicPageR3 = NIL_RTR3PTR;
    12531231            pApicCpu->pvApicPageR0 = NIL_RTR0PTR;
    1254             pApicCpu->pvApicPageRC = NIL_RTRCPTR;
    12551232        }
    12561233    }
     
    12681245    PAPIC pApic = VM_TO_APIC(pVM);
    12691246    LogFlow(("APIC: apicR3InitState: pVM=%p\n", pVM));
    1270 
    1271     /* With hardware virtualization, we don't need to map the APIC in GC. */
    1272     bool const fNeedsGCMapping = VM_IS_RAW_MODE_ENABLED(pVM);
    12731247
    12741248    /*
     
    12801254    Assert(pApic->pvApicPibR3 == NIL_RTR3PTR);
    12811255    Assert(pApic->pvApicPibR0 == NIL_RTR0PTR);
    1282     Assert(pApic->pvApicPibRC == NIL_RTRCPTR);
    12831256    pApic->cbApicPib    = RT_ALIGN_Z(pVM->cCpus * sizeof(APICPIB), PAGE_SIZE);
    12841257    size_t const cPages = pApic->cbApicPib >> PAGE_SHIFT;
     
    13111284        RT_BZERO(pApic->pvApicPibR3, pApic->cbApicPib);
    13121285
    1313         /* Map the PIB into GC.  */
    1314         if (fNeedsGCMapping)
    1315         {
    1316             pApic->pvApicPibRC = NIL_RTRCPTR;
    1317             int rc = MMR3HyperMapHCPhys(pVM, pApic->pvApicPibR3, NIL_RTR0PTR, pApic->HCPhysApicPib, pApic->cbApicPib,
    1318                                         "APIC PIB", (PRTGCPTR)&pApic->pvApicPibRC);
    1319             if (RT_FAILURE(rc))
    1320             {
    1321                 LogRel(("APIC: Failed to map %u bytes for the pending-interrupt bitmap into GC, rc=%Rrc\n", pApic->cbApicPib,
    1322                         rc));
    1323                 apicR3TermState(pVM);
    1324                 return rc;
    1325             }
    1326 
    1327             AssertLogRelReturn(pApic->pvApicPibRC != NIL_RTRCPTR, VERR_INTERNAL_ERROR);
    1328         }
    1329 
    13301286        /*
    13311287         * Allocate the map the virtual-APIC pages.
     
    13431299            Assert(pApicCpu->pvApicPageR3 == NIL_RTR3PTR);
    13441300            Assert(pApicCpu->pvApicPageR0 == NIL_RTR0PTR);
    1345             Assert(pApicCpu->pvApicPageRC == NIL_RTRCPTR);
    13461301            AssertCompile(sizeof(XAPICPAGE) == PAGE_SIZE);
    13471302            pApicCpu->cbApicPage = sizeof(XAPICPAGE);
     
    13541309                pApicCpu->HCPhysApicPage = SupApicPage.Phys;
    13551310
    1356                 /* Map the virtual-APIC page into GC. */
    1357                 if (fNeedsGCMapping)
    1358                 {
    1359                     rc = MMR3HyperMapHCPhys(pVM, pApicCpu->pvApicPageR3, NIL_RTR0PTR, pApicCpu->HCPhysApicPage,
    1360                                             pApicCpu->cbApicPage, "APIC", (PRTGCPTR)&pApicCpu->pvApicPageRC);
    1361                     if (RT_FAILURE(rc))
    1362                     {
    1363                         LogRel(("APIC%u: Failed to map %u bytes for the virtual-APIC page into GC, rc=%Rrc", idCpu,
    1364                                 pApicCpu->cbApicPage, rc));
    1365                         apicR3TermState(pVM);
    1366                         return rc;
    1367                     }
    1368 
    1369                     AssertLogRelReturn(pApicCpu->pvApicPageRC != NIL_RTRCPTR, VERR_INTERNAL_ERROR);
    1370                 }
    1371 
    13721311                /* Associate the per-VCPU PIB pointers to the per-VM PIB mapping. */
    13731312                uint32_t const offApicPib  = idCpu * sizeof(APICPIB);
    13741313                pApicCpu->pvApicPibR0      = (RTR0PTR)((RTR0UINTPTR)pApic->pvApicPibR0 + offApicPib);
    13751314                pApicCpu->pvApicPibR3      = (RTR3PTR)((RTR3UINTPTR)pApic->pvApicPibR3 + offApicPib);
    1376                 if (fNeedsGCMapping)
    1377                     pApicCpu->pvApicPibRC  = (RTRCPTR)((RTRCUINTPTR)pApic->pvApicPibRC + offApicPib);
    13781315
    13791316                /* Initialize the virtual-APIC state. */
     
    13841321                Assert(pApicCpu->pvApicPibR3 != NIL_RTR3PTR);
    13851322                Assert(pApicCpu->pvApicPibR0 != NIL_RTR0PTR);
    1386                 Assert(!fNeedsGCMapping || pApicCpu->pvApicPibRC != NIL_RTRCPTR);
    13871323                Assert(pApicCpu->pvApicPageR3 != NIL_RTR3PTR);
    1388                 Assert(pApicCpu->pvApicPageR0 != NIL_RTR0PTR);
    1389                 Assert(!fNeedsGCMapping || pApicCpu->pvApicPageRC != NIL_RTRCPTR);
    1390                 Assert(!fNeedsGCMapping || pApic->pvApicPibRC == pVM->aCpus[0].apic.s.pvApicPibRC);
    13911324#endif
    13921325            }
     
    14021335        Assert(pApic->pvApicPibR3 != NIL_RTR3PTR);
    14031336        Assert(pApic->pvApicPibR0 != NIL_RTR0PTR);
    1404         Assert(!fNeedsGCMapping || pApic->pvApicPibRC != NIL_RTRCPTR);
    14051337#endif
    14061338        return VINF_SUCCESS;
     
    14181350static DECLCALLBACK(int) apicR3Destruct(PPDMDEVINS pDevIns)
    14191351{
     1352    PDMDEV_CHECK_VERSIONS_RETURN_QUIET(pDevIns);
    14201353    PVM pVM = PDMDevHlpGetVM(pDevIns);
    14211354    LogFlow(("APIC: apicR3Destruct: pVM=%p\n", pVM));
     
    14601393     * Validate inputs.
    14611394     */
     1395    Assert(pDevIns);
     1396    PDMDEV_CHECK_VERSIONS_RETURN(pDevIns);
    14621397    Assert(iInstance == 0); NOREF(iInstance);
    1463     Assert(pDevIns);
    14641398
    14651399    PAPICDEV pApicDev = PDMINS_2_DATA(pDevIns, PAPICDEV);
     
    14721406    pApicDev->pDevInsR3 = pDevIns;
    14731407    pApicDev->pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
    1474     pApicDev->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
    14751408
    14761409    pApic->pApicDevR0   = PDMINS_2_DATA_R0PTR(pDevIns);
    14771410    pApic->pApicDevR3   = (PAPICDEV)PDMINS_2_DATA_R3PTR(pDevIns);
    1478     pApic->pApicDevRC   = PDMINS_2_DATA_RCPTR(pDevIns);
    14791411
    14801412    /*
     
    15591491    if (pApic->fRZEnabled)
    15601492    {
    1561         rc = PDMDevHlpMMIORegisterRC(pDevIns, GCPhysApicBase, sizeof(XAPICPAGE), NIL_RTRCPTR /*pvUser*/,
    1562                                      "apicWriteMmio", "apicReadMmio");
    1563         if (RT_FAILURE(rc))
    1564             return rc;
    1565 
    15661493        rc = PDMDevHlpMMIORegisterR0(pDevIns, GCPhysApicBase, sizeof(XAPICPAGE), NIL_RTR0PTR /*pvUser*/,
    15671494                                     "apicWriteMmio", "apicReadMmio");
     
    15801507        rc = PDMDevHlpTMTimerCreate(pDevIns, TMCLOCK_VIRTUAL_SYNC, apicR3TimerCallback, pVCpu, TMTIMER_FLAGS_NO_CRIT_SECT,
    15811508                                    pApicCpu->szTimerDesc, &pApicCpu->pTimerR3);
    1582         if (RT_SUCCESS(rc))
    1583         {
    1584             pApicCpu->pTimerR0 = TMTimerR0Ptr(pApicCpu->pTimerR3);
    1585             pApicCpu->pTimerRC = TMTimerRCPtr(pApicCpu->pTimerR3);
    1586         }
    1587         else
    1588             return rc;
     1509        AssertRCReturn(rc, rc);
     1510        pApicCpu->pTimerR0 = TMTimerR0Ptr(pApicCpu->pTimerR3);
    15891511    }
    15901512
     
    16841606    "apic",
    16851607    /* szRCMod */
    1686     "VMMRC.rc",
     1608    "",
    16871609    /* szR0Mod */
    16881610    "VMMR0.r0",
     
    16911613    /* fFlags */
    16921614      PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT | PDM_DEVREG_FLAGS_GUEST_BITS_32_64 | PDM_DEVREG_FLAGS_PAE36
    1693     | PDM_DEVREG_FLAGS_RC | PDM_DEVREG_FLAGS_R0,
     1615    | PDM_DEVREG_FLAGS_R0,
    16941616    /* fClass */
    16951617    PDM_DEVREG_CLASS_PIC,
  • trunk/src/VBox/VMM/include/APICInternal.h

    r78206 r80062  
    11571157    /** The device instance - R3 Ptr. */
    11581158    PPDMDEVINSR3                pDevInsR3;
    1159     /** Alignment padding. */
    1160     R3PTRTYPE(void *)           pvAlignment0;
    1161 
    11621159    /** The device instance - R0 Ptr. */
    11631160    PPDMDEVINSR0                pDevInsR0;
    1164     /** Alignment padding. */
    1165     R0PTRTYPE(void *)           pvAlignment1;
    1166 
    1167     /** The device instance - RC Ptr. */
    1168     PPDMDEVINSRC                pDevInsRC;
    11691161} APICDEV;
    11701162/** Pointer to an APIC device. */
     
    11841176    /** The APIC device - R3 ptr. */
    11851177    R3PTRTYPE(PAPICDEV)         pApicDevR3;
    1186     /** The APIC device - RC ptr. */
    1187     RCPTRTYPE(PAPICDEV)         pApicDevRC;
    1188     /** Alignment padding. */
    1189     RTRCPTR                     RCPtrAlignment0;
    11901178    /** @} */
    11911179
     
    12021190    /** The APIC PIB virtual address - R3 ptr. */
    12031191    R3PTRTYPE(void *)           pvApicPibR3;
    1204     /** The APIC PIB virtual address - RC ptr. */
    1205     RCPTRTYPE(void *)           pvApicPibRC;
    1206     /** Alignment padding. */
    1207     RTRCPTR                     RCPtrAlignment1;
    12081192    /** The size of the page in bytes. */
    12091193    uint32_t                    cbApicPib;
     
    12601244    /** The APIC page virtual address - R3 ptr. */
    12611245    R3PTRTYPE(void *)           pvApicPageR3;
    1262     /** The APIC page virtual address - RC ptr. */
    1263     RCPTRTYPE(void *)           pvApicPageRC;
    1264     /** Alignment padding. */
    1265     RTRCPTR                     RCPtrAlignment0;
    12661246    /** The size of the page in bytes. */
    12671247    uint32_t                    cbApicPage;
     
    12841264    /** The APIC PIB virtual address - R3 ptr. */
    12851265    R3PTRTYPE(void *)           pvApicPibR3;
    1286     /** The APIC PIB virtual address - RC ptr. */
    1287     RCPTRTYPE(void *)           pvApicPibRC;
    1288     /** Alignment padding. */
    1289     RTRCPTR                     RCPtrAlignment1;
    12901266    /** The APIC PIB for level-sensitive interrupts. */
    12911267    APICPIB                     ApicPibLevel;
     
    13101286    /** The timer - R3 ptr. */
    13111287    PTMTIMERR3                  pTimerR3;
    1312     /** The timer - RC ptr. */
    1313     PTMTIMERRC                  pTimerRC;
    1314     /** Alignment padding. */
    1315     RTRCPTR                     RCPtrAlignment3;
    1316     /** The timer critical sect protecting @a u64TimerInitial  */
    1317     PDMCRITSECT                 TimerCritSect;
    13181288    /** The time stamp when the timer was initialized. */
    13191289    uint64_t                    u64TimerInitial;
     
    13221292    /** Cache of timer shift of the frequency hint to TM. */
    13231293    uint32_t                    uHintedTimerShift;
     1294    /** The timer critical sect protecting @a u64TimerInitial  */
     1295    PDMCRITSECT                 TimerCritSect;
    13241296    /** The timer description. */
    13251297    char                        szTimerDesc[32];
  • trunk/src/VBox/VMM/testcase/tstVMStruct.h

    r80034 r80062  
    14031403    GEN_CHECK_OFF(APIC, pApicDevR0);
    14041404    GEN_CHECK_OFF(APIC, pApicDevR3);
    1405     GEN_CHECK_OFF(APIC, pApicDevRC);
    14061405    GEN_CHECK_OFF(APIC, pvApicPibR0);
    14071406    GEN_CHECK_OFF(APIC, pvApicPibR3);
    1408     GEN_CHECK_OFF(APIC, pvApicPibRC);
    14091407    GEN_CHECK_OFF(APIC, cbApicPib);
    14101408    GEN_CHECK_OFF(APIC, enmMaxMode);
    14111409    GEN_CHECK_OFF(APICCPU, pvApicPageR0);
    14121410    GEN_CHECK_OFF(APICCPU, pvApicPageR3);
    1413     GEN_CHECK_OFF(APICCPU, pvApicPageRC);
    1414     GEN_CHECK_OFF(APICCPU, pvApicPageRC);
    14151411    GEN_CHECK_OFF(APICCPU, cbApicPage);
    14161412    GEN_CHECK_OFF(APICCPU, pvApicPibR0);
    14171413    GEN_CHECK_OFF(APICCPU, pvApicPibR3);
    1418     GEN_CHECK_OFF(APICCPU, pvApicPibRC);
    14191414    GEN_CHECK_OFF(APICCPU, ApicPibLevel);
    14201415    GEN_CHECK_OFF(APICCPU, pTimerR0);
    14211416    GEN_CHECK_OFF(APICCPU, pTimerR3);
    1422     GEN_CHECK_OFF(APICCPU, pTimerRC);
    14231417    GEN_CHECK_OFF(APICCPU, TimerCritSect);
    14241418
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