Changeset 80062 in vbox
- Timestamp:
- Jul 31, 2019 8:57:49 AM (6 years ago)
- svn:sync-xref-src-repo-rev:
- 132501
- Location:
- trunk
- Files:
-
- 6 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/include/VBox/vmm/apic.h
r78870 r80062 187 187 VMM_INT_DECL(int) APICBusDeliver(PVM pVM, uint8_t uDest, uint8_t uDestMode, uint8_t uDeliveryMode, uint8_t uVector, 188 188 uint8_t uPolarity, uint8_t uTriggerMode, uint32_t uTagSrc); 189 VMM_INT_DECL(int) APICGetApicPageForCpu(PCVMCPU pVCpu, PRTHCPHYS pHCPhys, PRTR0PTR pR0Ptr, PRTR3PTR pR3Ptr, 190 PRTRCPTR pRCPtr); 189 VMM_INT_DECL(int) APICGetApicPageForCpu(PCVMCPU pVCpu, PRTHCPHYS pHCPhys, PRTR0PTR pR0Ptr, PRTR3PTR pR3Ptr); 191 190 192 191 /** @name Hyper-V interface (Ring-3 and all-context API). -
trunk/src/VBox/VMM/VMMAll/APICAll.cpp
r79264 r80062 3490 3490 * @param pR0Ptr Where to store the ring-0 address. 3491 3491 * @param pR3Ptr Where to store the ring-3 address (optional). 3492 * @param pRCPtr Where to store the raw-mode context address 3493 * (optional). 3494 */ 3495 VMM_INT_DECL(int) APICGetApicPageForCpu(PCVMCPU pVCpu, PRTHCPHYS pHCPhys, PRTR0PTR pR0Ptr, PRTR3PTR pR3Ptr, PRTRCPTR pRCPtr) 3492 */ 3493 VMM_INT_DECL(int) APICGetApicPageForCpu(PCVMCPU pVCpu, PRTHCPHYS pHCPhys, PRTR0PTR pR0Ptr, PRTR3PTR pR3Ptr) 3496 3494 { 3497 3495 AssertReturn(pVCpu, VERR_INVALID_PARAMETER); … … 3506 3504 if (pR3Ptr) 3507 3505 *pR3Ptr = pApicCpu->pvApicPageR3; 3508 if (pRCPtr)3509 *pRCPtr = pApicCpu->pvApicPageRC;3510 3506 return VINF_SUCCESS; 3511 3507 } -
trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp
r80057 r80062 1808 1808 if ( PDMHasApic(pVCpu->CTX_SUFF(pVM)) 1809 1809 && (pVM->hm.s.vmx.Msrs.ProcCtls.n.allowed1 & VMX_PROC_CTLS_USE_TPR_SHADOW)) 1810 { 1811 rc = APICGetApicPageForCpu(pVCpu, &pVmcsInfo->HCPhysVirtApic, (PRTR0PTR)&pVmcsInfo->pbVirtApic, 1812 NULL /* pR3Ptr */, NULL /* pRCPtr */); 1813 } 1810 rc = APICGetApicPageForCpu(pVCpu, &pVmcsInfo->HCPhysVirtApic, (PRTR0PTR)&pVmcsInfo->pbVirtApic, NULL /*pR3Ptr*/); 1814 1811 } 1815 1812 } -
trunk/src/VBox/VMM/VMMR3/APIC.cpp
r78208 r80062 1190 1190 static DECLCALLBACK(void) apicR3Relocate(PPDMDEVINS pDevIns, RTGCINTPTR offDelta) 1191 1191 { 1192 PVM pVM = PDMDevHlpGetVM(pDevIns); 1193 PAPIC pApic = VM_TO_APIC(pVM); 1194 PAPICDEV pApicDev = PDMINS_2_DATA(pDevIns, PAPICDEV); 1195 1196 LogFlow(("APIC: apicR3Relocate: pVM=%p pDevIns=%p offDelta=%RGi\n", pVM, pDevIns, offDelta)); 1197 1198 pApicDev->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns); 1199 1200 pApic->pApicDevRC = PDMINS_2_DATA_RCPTR(pDevIns); 1201 pApic->pvApicPibRC += offDelta; 1202 1203 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++) 1204 { 1205 PVMCPU pVCpu = &pVM->aCpus[idCpu]; 1206 PAPICCPU pApicCpu = VMCPU_TO_APICCPU(pVCpu); 1207 pApicCpu->pTimerRC = TMTimerRCPtr(pApicCpu->pTimerR3); 1208 1209 pApicCpu->pvApicPageRC += offDelta; 1210 pApicCpu->pvApicPibRC += offDelta; 1211 Log2(("APIC%u: apicR3Relocate: APIC PIB at %RGv\n", pVCpu->idCpu, pApicCpu->pvApicPibRC)); 1212 } 1192 RT_NOREF(pDevIns, offDelta); 1213 1193 } 1214 1194 … … 1234 1214 pApic->pvApicPibR3 = NIL_RTR3PTR; 1235 1215 pApic->pvApicPibR0 = NIL_RTR0PTR; 1236 pApic->pvApicPibRC = NIL_RTRCPTR;1237 1216 } 1238 1217 … … 1245 1224 pApicCpu->pvApicPibR3 = NIL_RTR3PTR; 1246 1225 pApicCpu->pvApicPibR0 = NIL_RTR0PTR; 1247 pApicCpu->pvApicPibRC = NIL_RTRCPTR;1248 1226 1249 1227 if (pApicCpu->pvApicPageR3 != NIL_RTR3PTR) … … 1252 1230 pApicCpu->pvApicPageR3 = NIL_RTR3PTR; 1253 1231 pApicCpu->pvApicPageR0 = NIL_RTR0PTR; 1254 pApicCpu->pvApicPageRC = NIL_RTRCPTR;1255 1232 } 1256 1233 } … … 1268 1245 PAPIC pApic = VM_TO_APIC(pVM); 1269 1246 LogFlow(("APIC: apicR3InitState: pVM=%p\n", pVM)); 1270 1271 /* With hardware virtualization, we don't need to map the APIC in GC. */1272 bool const fNeedsGCMapping = VM_IS_RAW_MODE_ENABLED(pVM);1273 1247 1274 1248 /* … … 1280 1254 Assert(pApic->pvApicPibR3 == NIL_RTR3PTR); 1281 1255 Assert(pApic->pvApicPibR0 == NIL_RTR0PTR); 1282 Assert(pApic->pvApicPibRC == NIL_RTRCPTR);1283 1256 pApic->cbApicPib = RT_ALIGN_Z(pVM->cCpus * sizeof(APICPIB), PAGE_SIZE); 1284 1257 size_t const cPages = pApic->cbApicPib >> PAGE_SHIFT; … … 1311 1284 RT_BZERO(pApic->pvApicPibR3, pApic->cbApicPib); 1312 1285 1313 /* Map the PIB into GC. */1314 if (fNeedsGCMapping)1315 {1316 pApic->pvApicPibRC = NIL_RTRCPTR;1317 int rc = MMR3HyperMapHCPhys(pVM, pApic->pvApicPibR3, NIL_RTR0PTR, pApic->HCPhysApicPib, pApic->cbApicPib,1318 "APIC PIB", (PRTGCPTR)&pApic->pvApicPibRC);1319 if (RT_FAILURE(rc))1320 {1321 LogRel(("APIC: Failed to map %u bytes for the pending-interrupt bitmap into GC, rc=%Rrc\n", pApic->cbApicPib,1322 rc));1323 apicR3TermState(pVM);1324 return rc;1325 }1326 1327 AssertLogRelReturn(pApic->pvApicPibRC != NIL_RTRCPTR, VERR_INTERNAL_ERROR);1328 }1329 1330 1286 /* 1331 1287 * Allocate the map the virtual-APIC pages. … … 1343 1299 Assert(pApicCpu->pvApicPageR3 == NIL_RTR3PTR); 1344 1300 Assert(pApicCpu->pvApicPageR0 == NIL_RTR0PTR); 1345 Assert(pApicCpu->pvApicPageRC == NIL_RTRCPTR);1346 1301 AssertCompile(sizeof(XAPICPAGE) == PAGE_SIZE); 1347 1302 pApicCpu->cbApicPage = sizeof(XAPICPAGE); … … 1354 1309 pApicCpu->HCPhysApicPage = SupApicPage.Phys; 1355 1310 1356 /* Map the virtual-APIC page into GC. */1357 if (fNeedsGCMapping)1358 {1359 rc = MMR3HyperMapHCPhys(pVM, pApicCpu->pvApicPageR3, NIL_RTR0PTR, pApicCpu->HCPhysApicPage,1360 pApicCpu->cbApicPage, "APIC", (PRTGCPTR)&pApicCpu->pvApicPageRC);1361 if (RT_FAILURE(rc))1362 {1363 LogRel(("APIC%u: Failed to map %u bytes for the virtual-APIC page into GC, rc=%Rrc", idCpu,1364 pApicCpu->cbApicPage, rc));1365 apicR3TermState(pVM);1366 return rc;1367 }1368 1369 AssertLogRelReturn(pApicCpu->pvApicPageRC != NIL_RTRCPTR, VERR_INTERNAL_ERROR);1370 }1371 1372 1311 /* Associate the per-VCPU PIB pointers to the per-VM PIB mapping. */ 1373 1312 uint32_t const offApicPib = idCpu * sizeof(APICPIB); 1374 1313 pApicCpu->pvApicPibR0 = (RTR0PTR)((RTR0UINTPTR)pApic->pvApicPibR0 + offApicPib); 1375 1314 pApicCpu->pvApicPibR3 = (RTR3PTR)((RTR3UINTPTR)pApic->pvApicPibR3 + offApicPib); 1376 if (fNeedsGCMapping)1377 pApicCpu->pvApicPibRC = (RTRCPTR)((RTRCUINTPTR)pApic->pvApicPibRC + offApicPib);1378 1315 1379 1316 /* Initialize the virtual-APIC state. */ … … 1384 1321 Assert(pApicCpu->pvApicPibR3 != NIL_RTR3PTR); 1385 1322 Assert(pApicCpu->pvApicPibR0 != NIL_RTR0PTR); 1386 Assert(!fNeedsGCMapping || pApicCpu->pvApicPibRC != NIL_RTRCPTR);1387 1323 Assert(pApicCpu->pvApicPageR3 != NIL_RTR3PTR); 1388 Assert(pApicCpu->pvApicPageR0 != NIL_RTR0PTR);1389 Assert(!fNeedsGCMapping || pApicCpu->pvApicPageRC != NIL_RTRCPTR);1390 Assert(!fNeedsGCMapping || pApic->pvApicPibRC == pVM->aCpus[0].apic.s.pvApicPibRC);1391 1324 #endif 1392 1325 } … … 1402 1335 Assert(pApic->pvApicPibR3 != NIL_RTR3PTR); 1403 1336 Assert(pApic->pvApicPibR0 != NIL_RTR0PTR); 1404 Assert(!fNeedsGCMapping || pApic->pvApicPibRC != NIL_RTRCPTR);1405 1337 #endif 1406 1338 return VINF_SUCCESS; … … 1418 1350 static DECLCALLBACK(int) apicR3Destruct(PPDMDEVINS pDevIns) 1419 1351 { 1352 PDMDEV_CHECK_VERSIONS_RETURN_QUIET(pDevIns); 1420 1353 PVM pVM = PDMDevHlpGetVM(pDevIns); 1421 1354 LogFlow(("APIC: apicR3Destruct: pVM=%p\n", pVM)); … … 1460 1393 * Validate inputs. 1461 1394 */ 1395 Assert(pDevIns); 1396 PDMDEV_CHECK_VERSIONS_RETURN(pDevIns); 1462 1397 Assert(iInstance == 0); NOREF(iInstance); 1463 Assert(pDevIns);1464 1398 1465 1399 PAPICDEV pApicDev = PDMINS_2_DATA(pDevIns, PAPICDEV); … … 1472 1406 pApicDev->pDevInsR3 = pDevIns; 1473 1407 pApicDev->pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns); 1474 pApicDev->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);1475 1408 1476 1409 pApic->pApicDevR0 = PDMINS_2_DATA_R0PTR(pDevIns); 1477 1410 pApic->pApicDevR3 = (PAPICDEV)PDMINS_2_DATA_R3PTR(pDevIns); 1478 pApic->pApicDevRC = PDMINS_2_DATA_RCPTR(pDevIns);1479 1411 1480 1412 /* … … 1559 1491 if (pApic->fRZEnabled) 1560 1492 { 1561 rc = PDMDevHlpMMIORegisterRC(pDevIns, GCPhysApicBase, sizeof(XAPICPAGE), NIL_RTRCPTR /*pvUser*/,1562 "apicWriteMmio", "apicReadMmio");1563 if (RT_FAILURE(rc))1564 return rc;1565 1566 1493 rc = PDMDevHlpMMIORegisterR0(pDevIns, GCPhysApicBase, sizeof(XAPICPAGE), NIL_RTR0PTR /*pvUser*/, 1567 1494 "apicWriteMmio", "apicReadMmio"); … … 1580 1507 rc = PDMDevHlpTMTimerCreate(pDevIns, TMCLOCK_VIRTUAL_SYNC, apicR3TimerCallback, pVCpu, TMTIMER_FLAGS_NO_CRIT_SECT, 1581 1508 pApicCpu->szTimerDesc, &pApicCpu->pTimerR3); 1582 if (RT_SUCCESS(rc)) 1583 { 1584 pApicCpu->pTimerR0 = TMTimerR0Ptr(pApicCpu->pTimerR3); 1585 pApicCpu->pTimerRC = TMTimerRCPtr(pApicCpu->pTimerR3); 1586 } 1587 else 1588 return rc; 1509 AssertRCReturn(rc, rc); 1510 pApicCpu->pTimerR0 = TMTimerR0Ptr(pApicCpu->pTimerR3); 1589 1511 } 1590 1512 … … 1684 1606 "apic", 1685 1607 /* szRCMod */ 1686 " VMMRC.rc",1608 "", 1687 1609 /* szR0Mod */ 1688 1610 "VMMR0.r0", … … 1691 1613 /* fFlags */ 1692 1614 PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT | PDM_DEVREG_FLAGS_GUEST_BITS_32_64 | PDM_DEVREG_FLAGS_PAE36 1693 | PDM_DEVREG_FLAGS_R C | PDM_DEVREG_FLAGS_R0,1615 | PDM_DEVREG_FLAGS_R0, 1694 1616 /* fClass */ 1695 1617 PDM_DEVREG_CLASS_PIC, -
trunk/src/VBox/VMM/include/APICInternal.h
r78206 r80062 1157 1157 /** The device instance - R3 Ptr. */ 1158 1158 PPDMDEVINSR3 pDevInsR3; 1159 /** Alignment padding. */1160 R3PTRTYPE(void *) pvAlignment0;1161 1162 1159 /** The device instance - R0 Ptr. */ 1163 1160 PPDMDEVINSR0 pDevInsR0; 1164 /** Alignment padding. */1165 R0PTRTYPE(void *) pvAlignment1;1166 1167 /** The device instance - RC Ptr. */1168 PPDMDEVINSRC pDevInsRC;1169 1161 } APICDEV; 1170 1162 /** Pointer to an APIC device. */ … … 1184 1176 /** The APIC device - R3 ptr. */ 1185 1177 R3PTRTYPE(PAPICDEV) pApicDevR3; 1186 /** The APIC device - RC ptr. */1187 RCPTRTYPE(PAPICDEV) pApicDevRC;1188 /** Alignment padding. */1189 RTRCPTR RCPtrAlignment0;1190 1178 /** @} */ 1191 1179 … … 1202 1190 /** The APIC PIB virtual address - R3 ptr. */ 1203 1191 R3PTRTYPE(void *) pvApicPibR3; 1204 /** The APIC PIB virtual address - RC ptr. */1205 RCPTRTYPE(void *) pvApicPibRC;1206 /** Alignment padding. */1207 RTRCPTR RCPtrAlignment1;1208 1192 /** The size of the page in bytes. */ 1209 1193 uint32_t cbApicPib; … … 1260 1244 /** The APIC page virtual address - R3 ptr. */ 1261 1245 R3PTRTYPE(void *) pvApicPageR3; 1262 /** The APIC page virtual address - RC ptr. */1263 RCPTRTYPE(void *) pvApicPageRC;1264 /** Alignment padding. */1265 RTRCPTR RCPtrAlignment0;1266 1246 /** The size of the page in bytes. */ 1267 1247 uint32_t cbApicPage; … … 1284 1264 /** The APIC PIB virtual address - R3 ptr. */ 1285 1265 R3PTRTYPE(void *) pvApicPibR3; 1286 /** The APIC PIB virtual address - RC ptr. */1287 RCPTRTYPE(void *) pvApicPibRC;1288 /** Alignment padding. */1289 RTRCPTR RCPtrAlignment1;1290 1266 /** The APIC PIB for level-sensitive interrupts. */ 1291 1267 APICPIB ApicPibLevel; … … 1310 1286 /** The timer - R3 ptr. */ 1311 1287 PTMTIMERR3 pTimerR3; 1312 /** The timer - RC ptr. */1313 PTMTIMERRC pTimerRC;1314 /** Alignment padding. */1315 RTRCPTR RCPtrAlignment3;1316 /** The timer critical sect protecting @a u64TimerInitial */1317 PDMCRITSECT TimerCritSect;1318 1288 /** The time stamp when the timer was initialized. */ 1319 1289 uint64_t u64TimerInitial; … … 1322 1292 /** Cache of timer shift of the frequency hint to TM. */ 1323 1293 uint32_t uHintedTimerShift; 1294 /** The timer critical sect protecting @a u64TimerInitial */ 1295 PDMCRITSECT TimerCritSect; 1324 1296 /** The timer description. */ 1325 1297 char szTimerDesc[32]; -
trunk/src/VBox/VMM/testcase/tstVMStruct.h
r80034 r80062 1403 1403 GEN_CHECK_OFF(APIC, pApicDevR0); 1404 1404 GEN_CHECK_OFF(APIC, pApicDevR3); 1405 GEN_CHECK_OFF(APIC, pApicDevRC);1406 1405 GEN_CHECK_OFF(APIC, pvApicPibR0); 1407 1406 GEN_CHECK_OFF(APIC, pvApicPibR3); 1408 GEN_CHECK_OFF(APIC, pvApicPibRC);1409 1407 GEN_CHECK_OFF(APIC, cbApicPib); 1410 1408 GEN_CHECK_OFF(APIC, enmMaxMode); 1411 1409 GEN_CHECK_OFF(APICCPU, pvApicPageR0); 1412 1410 GEN_CHECK_OFF(APICCPU, pvApicPageR3); 1413 GEN_CHECK_OFF(APICCPU, pvApicPageRC);1414 GEN_CHECK_OFF(APICCPU, pvApicPageRC);1415 1411 GEN_CHECK_OFF(APICCPU, cbApicPage); 1416 1412 GEN_CHECK_OFF(APICCPU, pvApicPibR0); 1417 1413 GEN_CHECK_OFF(APICCPU, pvApicPibR3); 1418 GEN_CHECK_OFF(APICCPU, pvApicPibRC);1419 1414 GEN_CHECK_OFF(APICCPU, ApicPibLevel); 1420 1415 GEN_CHECK_OFF(APICCPU, pTimerR0); 1421 1416 GEN_CHECK_OFF(APICCPU, pTimerR3); 1422 GEN_CHECK_OFF(APICCPU, pTimerRC);1423 1417 GEN_CHECK_OFF(APICCPU, TimerCritSect); 1424 1418
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