Changeset 80077 in vbox
- Timestamp:
- Jul 31, 2019 2:30:19 PM (6 years ago)
- svn:sync-xref-src-repo-rev:
- 132517
- Location:
- trunk/src/VBox/VMM
- Files:
-
- 5 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMAll/GIMAllHv.cpp
r78434 r80077 1364 1364 * Whether we need to trap \#UD exceptions in the guest. 1365 1365 * 1366 * We only need to trap \#UD exceptions for raw-mode guests when hypercalls are1367 * enabled. For HM VMs, the hypercall would be handled via the1366 * We only needed to trap \#UD exceptions for the old raw-mode guests when 1367 * hypercalls are enabled. For HM VMs, the hypercall would be handled via the 1368 1368 * VMCALL/VMMCALL VM-exit. 1369 1369 * … … 1372 1372 VMM_INT_DECL(bool) gimHvShouldTrapXcptUD(PVMCPU pVCpu) 1373 1373 { 1374 #ifdef VBOX_WITH_RAW_MODE1375 if ( VM_IS_RAW_MODE_ENABLED(pVCpu->CTX_SUFF(pVM))1376 && gimHvAreHypercallsEnabled(pVCpu))1377 return true;1378 #else1379 1374 RT_NOREF(pVCpu); 1380 #endif1381 1375 return false; 1382 1376 } -
trunk/src/VBox/VMM/VMMAll/GIMAllKvm.cpp
r76553 r80077 239 239 { 240 240 bool fEnable = RT_BOOL(uRawValue & MSR_GIM_KVM_SYSTEM_TIME_ENABLE_BIT); 241 #if def IN_RING0241 #ifndef IN_RING3 242 242 NOREF(fEnable); NOREF(pKvmCpu); 243 243 gimR0KvmUpdateSystemTime(pVM, pVCpu); 244 return VINF_CPUM_R3_MSR_WRITE;245 #elif defined(IN_RC)246 Assert(pVM->cCpus == 1);247 if (fEnable)248 {249 RTCCUINTREG fEFlags = ASMIntDisableFlags();250 pKvmCpu->uTsc = TMCpuTickGetNoCheck(pVCpu) | UINT64_C(1);251 pKvmCpu->uVirtNanoTS = TMVirtualGetNoCheck(pVM) | UINT64_C(1);252 ASMSetFlags(fEFlags);253 }254 244 return VINF_CPUM_R3_MSR_WRITE; 255 245 #else /* IN_RING3 */ … … 288 278 } 289 279 return VINF_SUCCESS; 290 #endif 280 #endif /* IN_RING3 */ 291 281 } 292 282 … … 405 395 PCGIMKVM pKvm = &pVM->gim.s.u.Kvm; 406 396 if ( uDisOpcode != pKvm->uOpcodeNative 407 && !VM_IS_RAW_MODE_ENABLED(pVM)408 397 && cbInstr == sizeof(pKvm->abOpcodeNative) ) 409 398 { -
trunk/src/VBox/VMM/VMMR3/GIMHv.cpp
r79080 r80077 510 510 AssertLogRelRCReturn(rc, rc); 511 511 pHvStimer->pTimerR0 = TMTimerR0Ptr(pHvStimer->pTimerR3); 512 pHvStimer->pTimerRC = TMTimerRCPtr(pHvStimer->pTimerR3);513 512 } 514 513 } … … 622 621 VMMR3_INT_DECL(void) gimR3HvRelocate(PVM pVM, RTGCINTPTR offDelta) 623 622 { 624 RT_NOREF1(offDelta); 625 626 PCGIMHV pHv = &pVM->gim.s.u.Hv; 627 if ( (pHv->uBaseFeat & GIM_HV_BASE_FEAT_STIMER_MSRS) 628 || (pHv->uBaseFeat & GIM_HV_BASE_FEAT_BASIC_SYNIC_MSRS)) 629 { 630 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++) 631 { 632 PGIMHVCPU pHvCpu = &pVM->aCpus[idCpu].gim.s.u.HvCpu; 633 for (uint8_t idxStimer = 0; idxStimer < RT_ELEMENTS(pHvCpu->aStimers); idxStimer++) 634 { 635 PGIMHVSTIMER pHvStimer = &pHvCpu->aStimers[idxStimer]; 636 pHvStimer->pTimerRC = TMTimerRCPtr(pHvStimer->pTimerR3); 637 } 638 } 639 } 623 RT_NOREF(pVM, offDelta); 640 624 } 641 625 -
trunk/src/VBox/VMM/VMMR3/GIMKvm.cpp
r76553 r80077 167 167 AssertLogRelRCReturn(rc, rc); 168 168 AssertLogRelReturn(cbHypercall == sizeof(pKvm->abOpcodeNative), VERR_GIM_IPE_1); 169 pKvm->fTrapXcptUD = pKvm->uOpcodeNative != OP_VMCALL || VM_IS_RAW_MODE_ENABLED(pVM);169 pKvm->fTrapXcptUD = pKvm->uOpcodeNative != OP_VMCALL; 170 170 171 171 return VINF_SUCCESS; -
trunk/src/VBox/VMM/include/GIMHvInternal.h
r76585 r80077 1198 1198 /** Per-VM R0 Spinlock for protecting EMT writes to the TSC page. */ 1199 1199 RTSPINLOCK hSpinlockR0; 1200 #if HC_ARCH_BITS == 321201 uint32_t u32Alignment1;1202 #endif1203 1200 /** The TSC frequency (in HZ) reported to the guest. */ 1204 1201 uint64_t cTscTicksPerSecond; … … 1270 1267 /** Synthetic timer object - R3 ptr. */ 1271 1268 PTMTIMERR3 pTimerR3; 1272 /** Synthetic timer object - RC ptr. */1273 PTMTIMERRC pTimerRC;1274 /** RC alignment padding. */1275 RTRCPTR uAlignment0;1276 1269 /** Virtual CPU ID this timer belongs to (for reverse mapping). */ 1277 1270 VMCPUID idCpu;
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