Changeset 80090 in vbox for trunk/src/VBox/VMM
- Timestamp:
- Jul 31, 2019 9:20:57 PM (5 years ago)
- Location:
- trunk/src/VBox/VMM
- Files:
-
- 4 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMAll/IOMAllMMIO.cpp
r76553 r80090 850 850 851 851 852 #if def IN_RING3/* Only used by REM. */852 #if defined(IN_RING3) && defined(VBOX_WITH_REM) /* Only used by REM. */ 853 853 854 854 /** … … 1087 1087 1088 1088 #endif /* IN_RING3 - only used by REM. */ 1089 #ifndef IN_RC1090 1089 1091 1090 /** … … 1279 1278 } 1280 1279 1281 #endif /* !IN_RC */1282 -
trunk/src/VBox/VMM/VMMR3/IOM.cpp
r76553 r80090 166 166 167 167 /* 168 * Setup any fixed pointers and offsets.169 */170 pVM->iom.s.offVM = RT_UOFFSETOF(VM, iom);171 172 /*173 168 * Initialize the REM critical section. 174 169 */ … … 186 181 if (RT_SUCCESS(rc)) 187 182 { 188 pVM->iom.s.pTreesRC = MMHyperR3ToRC(pVM, pVM->iom.s.pTreesR3);189 183 pVM->iom.s.pTreesR0 = MMHyperR3ToR0(pVM, pVM->iom.s.pTreesR3); 190 184 … … 281 275 pVCpu->iom.s.pMMIORangeLastR3 = NULL; 282 276 pVCpu->iom.s.pMMIOStatsLastR3 = NULL; 283 284 pVCpu->iom.s.pRangeLastReadRC = NIL_RTRCPTR;285 pVCpu->iom.s.pRangeLastWriteRC = NIL_RTRCPTR;286 pVCpu->iom.s.pStatsLastReadRC = NIL_RTRCPTR;287 pVCpu->iom.s.pStatsLastWriteRC = NIL_RTRCPTR;288 pVCpu->iom.s.pMMIORangeLastRC = NIL_RTRCPTR;289 pVCpu->iom.s.pMMIOStatsLastRC = NIL_RTRCPTR;290 277 } 291 278 … … 317 304 VMMR3_INT_DECL(void) IOMR3Relocate(PVM pVM, RTGCINTPTR offDelta) 318 305 { 306 #if 0 319 307 LogFlow(("IOMR3Relocate: offDelta=%d\n", offDelta)); 320 308 … … 340 328 pVCpu->iom.s.pMMIOStatsLastRC = NIL_RTRCPTR; 341 329 } 330 #else 331 RT_NOREF(pVM, offDelta); 332 #endif 342 333 } 343 334 … … 372 363 373 364 365 #if 0 374 366 /** 375 367 * Callback function for relocating a MMIO range. … … 398 390 return 0; 399 391 } 392 #endif 400 393 401 394 … … 632 625 633 626 627 #if 0 634 628 /** 635 629 * Registers a I/O port RC handler. … … 745 739 return rc; 746 740 } 741 #endif 747 742 748 743 … … 927 922 } 928 923 924 #if 0 929 925 /* 930 926 * Remove any RC ranges first. … … 1009 1005 Port++; 1010 1006 } /* for all ports - RC. */ 1011 1007 #else 1008 int rc = VINF_SUCCESS; 1009 #endif 1012 1010 1013 1011 /* … … 1274 1272 1275 1273 1274 #if 0 1276 1275 /** 1277 1276 * Display a single I/O port GC range. … … 1296 1295 return 0; 1297 1296 } 1297 #endif 1298 1298 1299 1299 … … 1328 1328 RTAvlroIOPortDoWithAll(&pVM->iom.s.pTreesR3->IOPortTreeR0, true, iomR3IOPortInfoOneR3, (void *)pHlp); 1329 1329 1330 #if 0 1330 1331 pHlp->pfnPrintf(pHlp, 1331 1332 "I/O Port GC ranges (pVM=%p)\n" … … 1337 1338 sizeof(RTRCPTR) * 2, "pvUser "); 1338 1339 RTAvlroIOPortDoWithAll(&pVM->iom.s.pTreesR3->IOPortTreeRC, true, iomR3IOPortInfoOneRC, (void *)pHlp); 1340 #endif 1339 1341 } 1340 1342 … … 1443 1445 1444 1446 1447 #if 0 1445 1448 /** 1446 1449 * Registers a Memory Mapped I/O RC handler range. … … 1500 1503 return VINF_SUCCESS; 1501 1504 } 1505 #endif 1502 1506 1503 1507 … … 1751 1755 } 1752 1756 1757 #if 0 1753 1758 if (pfnReadCallbackRC || pfnWriteCallbackRC || pfnFillCallbackRC) 1754 1759 { … … 1759 1764 pRange->pfnFillCallbackRC = pfnFillCallbackRC; 1760 1765 } 1766 #else 1767 RT_NOREF(pfnReadCallbackRC, pfnWriteCallbackRC, pfnFillCallbackRC, pvUserRC); 1768 #endif 1761 1769 1762 1770 /* … … 2046 2054 pRange->pfnFillCallbackR0, 2047 2055 pRange->pvUserR0); 2056 #if 0 2048 2057 pHlp->pfnPrintf(pHlp, 2049 2058 "%*s %RRv %RRv %RRv %RRv %RRv\n", … … 2054 2063 pRange->pfnFillCallbackRC, 2055 2064 pRange->pvUserRC); 2065 #endif 2056 2066 return 0; 2057 2067 } -
trunk/src/VBox/VMM/VMMR3/PDMDevHlp.cpp
r77299 r80090 129 129 { 130 130 PDMDEV_ASSERT_DEVINS(pDevIns); 131 PVM pVM = pDevIns->Internal.s.pVMR3;132 VM_ASSERT_EMT(pVM);131 Assert(pDevIns->pReg->szRCMod[0]); 132 Assert(pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC); 133 133 LogFlow(("pdmR3DevHlp_IOPortRegisterRC: caller='%s'/%d: Port=%#x cPorts=%#x pvUser=%p pszOut=%p:{%s} pszIn=%p:{%s} pszOutStr=%p:{%s} pszInStr=%p:{%s} pszDesc=%p:{%s}\n", pDevIns->pReg->szName, pDevIns->iInstance, 134 134 Port, cPorts, pvUser, pszOut, pszOut, pszIn, pszIn, pszOutStr, pszOutStr, pszInStr, pszInStr, pszDesc, pszDesc)); 135 135 136 #if 0 136 137 /* 137 138 * Resolve the functions (one of the can be NULL). 138 139 */ 140 PVM pVM = pDevIns->Internal.s.pVMR3; 141 VM_ASSERT_EMT(pVM); 139 142 int rc = VINF_SUCCESS; 140 143 if ( pDevIns->pReg->szRCMod[0] … … 186 189 rc = VERR_INVALID_PARAMETER; 187 190 } 191 #else 192 RT_NOREF(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc); 193 int rc = VINF_SUCCESS; 194 #endif 188 195 189 196 LogFlow(("pdmR3DevHlp_IOPortRegisterRC: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc)); … … 305 312 { 306 313 PDMDEV_ASSERT_DEVINS(pDevIns); 307 PVM pVM = pDevIns->Internal.s.pVMR3; 308 VM_ASSERT_EMT(pVM); 314 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3); 315 Assert(pDevIns->pReg->szR0Mod[0]); 316 Assert(pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0); 309 317 LogFlow(("pdmR3DevHlp_MMIORegisterRC: caller='%s'/%d: GCPhysStart=%RGp cbRange=%RGp pvUser=%p pszWrite=%p:{%s} pszRead=%p:{%s} pszFill=%p:{%s}\n", 310 318 pDevIns->pReg->szName, pDevIns->iInstance, GCPhysStart, cbRange, pvUser, pszWrite, pszWrite, pszRead, pszRead, pszFill, pszFill)); 311 319 312 320 #if 0 313 321 /* 314 322 * Resolve the functions. … … 318 326 if ( pDevIns->pReg->szRCMod[0] 319 327 && (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC) 320 && VM_IS_RAW_MODE_ENABLED(p VM))328 && VM_IS_RAW_MODE_ENABLED(pDevIns->Internal.s.pVMR3)) 321 329 { 322 330 RTRCPTR RCPtrWrite = NIL_RTRCPTR; … … 335 343 336 344 if (RT_SUCCESS(rc) && RT_SUCCESS(rc2) && RT_SUCCESS(rc3)) 337 rc = IOMR3MmioRegisterRC(p VM, pDevIns, GCPhysStart, cbRange, pvUser, RCPtrWrite, RCPtrRead, RCPtrFill);345 rc = IOMR3MmioRegisterRC(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvUser, RCPtrWrite, RCPtrRead, RCPtrFill); 338 346 else 339 347 { … … 347 355 } 348 356 } 349 else if (VM_IS_RAW_MODE_ENABLED(p VM))357 else if (VM_IS_RAW_MODE_ENABLED(pDevIns->Internal.s.pVMR3)) 350 358 { 351 359 AssertMsgFailed(("No RC module for this driver!\n")); 352 360 rc = VERR_INVALID_PARAMETER; 353 361 } 362 #else 363 int rc = VINF_SUCCESS; 364 RT_NOREF(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill); 365 #endif 354 366 355 367 LogFlow(("pdmR3DevHlp_MMIORegisterRC: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc)); … … 363 375 PDMDEV_ASSERT_DEVINS(pDevIns); 364 376 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3); 377 Assert(pDevIns->pReg->szR0Mod[0]); 378 Assert(pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0); 365 379 LogFlow(("pdmR3DevHlp_MMIORegisterHC: caller='%s'/%d: GCPhysStart=%RGp cbRange=%RGp pvUser=%p pszWrite=%p:{%s} pszRead=%p:{%s} pszFill=%p:{%s}\n", 366 380 pDevIns->pReg->szName, pDevIns->iInstance, GCPhysStart, cbRange, pvUser, pszWrite, pszWrite, pszRead, pszRead, pszFill, pszFill)); … … 371 385 */ 372 386 int rc = VINF_SUCCESS; 373 if ( 374 && 387 if ( pDevIns->pReg->szR0Mod[0] 388 && (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0)) 375 389 { 376 390 R0PTRTYPE(PFNIOMMMIOWRITE) pfnR0PtrWrite = 0; … … 505 519 506 520 /* Raw-mode */ 507 rc = VINF_SUCCESS; 521 #if 0 508 522 RCPTRTYPE(PFNIOMMMIOWRITE) pfnWriteRC = 0; 509 523 if (pszWriteRC) … … 525 539 AssertLogRelMsgRCReturn(rc, ("pszFillRC=%s rc=%Rrc\n", pszFillRC, rc), rc); 526 540 } 541 #else 542 RCPTRTYPE(PFNIOMMMIOWRITE) pfnWriteRC = 0; 543 RCPTRTYPE(PFNIOMMMIOREAD) pfnReadRC = 0; 544 RCPTRTYPE(PFNIOMMMIOFILL) pfnFillRC = 0; 545 RT_NOREF(pszWriteRC, pszReadRC, pszFillRC); 546 #endif 547 527 548 528 549 /* -
trunk/src/VBox/VMM/include/IOMInternal.h
r76585 r80090 86 86 R3PTRTYPE(const char *) pszDesc; 87 87 88 #if 0 88 89 /** Pointer to user argument - RC. */ 89 90 RTRCPTR pvUserRC; … … 99 100 /** Padding structure length to multiple of 8 bytes. */ 100 101 RTRCPTR RCPtrPadding; 102 #endif 101 103 #endif 102 104 } IOMMMIORANGE; … … 289 291 /** Tree containing I/O port range descriptors registered for R0 (IOMIOPORTRANGER0). */ 290 292 AVLROIOPORTTREE IOPortTreeR0; 293 #if 0 291 294 /** Tree containing I/O port range descriptors registered for RC (IOMIOPORTRANGERC). */ 292 295 AVLROIOPORTTREE IOPortTreeRC; 296 #endif 293 297 294 298 /** Tree containing the MMIO range descriptors (IOMMMIORANGE). */ … … 316 320 typedef struct IOM 317 321 { 318 /** Offset to the VM structure. */319 RTINT offVM;320 321 /** Pointer to the trees - RC ptr. */322 RCPTRTYPE(PIOMTREES) pTreesRC;323 322 /** Pointer to the trees - R3 ptr. */ 324 323 R3PTRTYPE(PIOMTREES) pTreesR3; … … 447 446 R0PTRTYPE(PIOMMMIORANGE) pMMIORangeLastR0; 448 447 R0PTRTYPE(PIOMMMIOSTATS) pMMIOStatsLastR0; 449 450 RCPTRTYPE(PIOMIOPORTRANGERC) pRangeLastReadRC;451 RCPTRTYPE(PIOMIOPORTRANGERC) pRangeLastWriteRC;452 RCPTRTYPE(PIOMIOPORTSTATS) pStatsLastReadRC;453 RCPTRTYPE(PIOMIOPORTSTATS) pStatsLastWriteRC;454 RCPTRTYPE(PIOMMMIORANGE) pMMIORangeLastRC;455 RCPTRTYPE(PIOMMMIOSTATS) pMMIOStatsLastRC;456 448 /** @} */ 457 449 } IOMCPU;
Note:
See TracChangeset
for help on using the changeset viewer.