VirtualBox

Changeset 80097 in vbox


Ignore:
Timestamp:
Aug 1, 2019 5:35:47 AM (6 years ago)
Author:
vboxsync
svn:sync-xref-src-repo-rev:
132537
Message:

VMM: Kicking out 32-bit host support - VMX. bugref:9511

Location:
trunk
Files:
2 edited

Legend:

Unmodified
Added
Removed

  • trunk/include/VBox/vmm/hmvmxinline.h

    r80093 r80097  
    579579
    580580
     581/**
     582 * Executes VMWRITE for a natural-width VMCS field.
     583 */
    581584#ifdef RT_ARCH_AMD64
    582 # define VMXWriteVmcsHstN       VMXWriteVmcs64
    583 # define VMXWriteVmcsGstN       VMXWriteVmcs64
    584 #else
    585 # define VMXWriteVmcsHstN       VMXWriteVmcs32
    586 # define VMXWriteVmcsGstN       VMXWriteVmcs32
     585# define VMXWriteVmcsNw         VMXWriteVmcs64
     586#else
     587# define VMXWriteVmcsNw         VMXWriteVmcs32
    587588#endif
    588589
    … …  
    762763
    763764
     765/**
     766 * Executes VMREAD for a natural-width VMCS field.
     767 */
    764768#ifdef RT_ARCH_AMD64
    765 # define VMXReadVmcsHstN        VMXReadVmcs64
    766 # define VMXReadVmcsGstN        VMXReadVmcs64
    767 #else
    768 # define VMXReadVmcsHstN        VMXReadVmcs32
    769 # define VMXReadVmcsGstN        VMXReadVmcs32
     769# define VMXReadVmcsNw          VMXReadVmcs64
     770#else
     771# define VMXReadVmcsNw          VMXReadVmcs32
    770772#endif
    771773

  • trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp

    r80096 r80097  
    963963 * Sets the TSC offset for the current VMCS.
    964964 *
    965  * @param   pVCpu       The cross context virtual CPU structure.
    966965 * @param   uTscOffset  The TSC offset to set.
    967966 * @param   pVmcsInfo   The VMCS info. object.
    968967 */
    969 static void hmR0VmxSetTscOffsetVmcs(PVMCPU pVCpu, PVMXVMCSINFO pVmcsInfo, uint64_t uTscOffset)
    970 {
    971     NOREF(pVCpu); /* Used implicitly by VMXWriteVmcs64 on 32-bit hosts. */
     968static void hmR0VmxSetTscOffsetVmcs(PVMXVMCSINFO pVmcsInfo, uint64_t uTscOffset)
     969{
    972970    if (pVmcsInfo->u64TscOffset != uTscOffset)
    973971    {
    … …  
    10601058        {
    10611059            /* Validate we are not removing any essential exception intercepts. */
    1062             Assert(pVCpu->CTX_SUFF(pVM)->hm.s.fNestedPaging || !(uXcptMask & RT_BIT(X86_XCPT_PF))); RT_NOREF(pVCpu);
     1060            Assert(pVCpu->CTX_SUFF(pVM)->hm.s.fNestedPaging || !(uXcptMask & RT_BIT(X86_XCPT_PF)));
     1061            NOREF(pVCpu);
    10631062            Assert(!(uXcptMask & RT_BIT(X86_XCPT_DB)));
    10641063            Assert(!(uXcptMask & RT_BIT(X86_XCPT_AC)));
    … …  
    14571456 *
    14581457 * @returns VBox status code.
    1459  * @param   pVCpu           The cross context virtual CPU structure of the
    1460  *                          calling EMT. (Required for the VMCS cache case.)
    14611458 * @param   pVmxTransient   The VMX-transient structure.
    14621459 */
    1463 DECLINLINE(int) hmR0VmxReadExitQualVmcs(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
     1460DECLINLINE(int) hmR0VmxReadExitQualVmcs(PVMXTRANSIENT pVmxTransient)
    14641461{
    14651462    if (!(pVmxTransient->fVmcsFieldsRead & HMVMX_READ_EXIT_QUALIFICATION))
    14661463    {
    1467         int rc = VMXReadVmcsGstN(VMX_VMCS_RO_EXIT_QUALIFICATION, &pVmxTransient->uExitQual); NOREF(pVCpu);
     1464        int rc = VMXReadVmcsNw(VMX_VMCS_RO_EXIT_QUALIFICATION, &pVmxTransient->uExitQual);
    14681465        AssertRCReturn(rc, rc);
    14691466        pVmxTransient->fVmcsFieldsRead |= HMVMX_READ_EXIT_QUALIFICATION;
    … …  
    14771474 *
    14781475 * @returns VBox status code.
    1479  * @param   pVCpu           The cross context virtual CPU structure of the
    1480  *                          calling EMT. (Required for the VMCS cache case.)
    14811476 * @param   pVmxTransient   The VMX-transient structure.
    14821477 */
    1483 DECLINLINE(int) hmR0VmxReadGuestLinearAddrVmcs(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
     1478DECLINLINE(int) hmR0VmxReadGuestLinearAddrVmcs(PVMXTRANSIENT pVmxTransient)
    14841479{
    14851480    if (!(pVmxTransient->fVmcsFieldsRead & HMVMX_READ_GUEST_LINEAR_ADDR))
    14861481    {
    1487         int rc = VMXReadVmcsGstN(VMX_VMCS_RO_GUEST_LINEAR_ADDR, &pVmxTransient->uGuestLinearAddr); NOREF(pVCpu);
     1482        int rc = VMXReadVmcsNw(VMX_VMCS_RO_GUEST_LINEAR_ADDR, &pVmxTransient->uGuestLinearAddr);
    14881483        AssertRCReturn(rc, rc);
    14891484        pVmxTransient->fVmcsFieldsRead |= HMVMX_READ_GUEST_LINEAR_ADDR;
    … …  
    14971492 *
    14981493 * @returns VBox status code.
    1499  * @param   pVCpu           The cross context virtual CPU structure of the
    1500  *                          calling EMT. (Required for the VMCS cache case.)
    15011494 * @param   pVmxTransient   The VMX-transient structure.
    15021495 */
    1503 DECLINLINE(int) hmR0VmxReadGuestPhysicalAddrVmcs(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
     1496DECLINLINE(int) hmR0VmxReadGuestPhysicalAddrVmcs(PVMXTRANSIENT pVmxTransient)
    15041497{
    15051498    if (!(pVmxTransient->fVmcsFieldsRead & HMVMX_READ_GUEST_PHYSICAL_ADDR))
    15061499    {
    1507         int rc = VMXReadVmcs64(VMX_VMCS64_RO_GUEST_PHYS_ADDR_FULL, &pVmxTransient->uGuestPhysicalAddr); NOREF(pVCpu);
     1500        int rc = VMXReadVmcs64(VMX_VMCS64_RO_GUEST_PHYS_ADDR_FULL, &pVmxTransient->uGuestPhysicalAddr);
    15081501        AssertRCReturn(rc, rc);
    15091502        pVmxTransient->fVmcsFieldsRead |= HMVMX_READ_GUEST_PHYSICAL_ADDR;
    … …  
    15571550 *
    15581551 * @returns VBox status code.
    1559  * @param   pVCpu           The cross context virtual CPU structure of the
    1560  *                          calling EMT. (Required for the VMCS cache case.)
    15611552 * @param   pVmxTransient   The VMX-transient structure.
    15621553 */
    1563 static int hmR0VmxReadAllRoFieldsVmcs(PVMCPU pVCpu, PVMXTRANSIENT pVmxTransient)
    1564 {
    1565     NOREF(pVCpu); /* Used implicitly by VMXReadVmcsGstN on 32-bit hosts. */
    1566     int rc = VMXReadVmcsGstN(VMX_VMCS_RO_EXIT_QUALIFICATION,           &pVmxTransient->uExitQual);
     1554static int hmR0VmxReadAllRoFieldsVmcs(PVMXTRANSIENT pVmxTransient)
     1555{
     1556    int rc = VMXReadVmcsNw(VMX_VMCS_RO_EXIT_QUALIFICATION,             &pVmxTransient->uExitQual);
    15671557    rc    |= VMXReadVmcs32(VMX_VMCS32_RO_EXIT_INSTR_LENGTH,            &pVmxTransient->cbInstr);
    15681558    rc    |= VMXReadVmcs32(VMX_VMCS32_RO_EXIT_INSTR_INFO,              &pVmxTransient->ExitInstrInfo.u);
    … …  
    15711561    rc    |= VMXReadVmcs32(VMX_VMCS32_RO_EXIT_INTERRUPTION_INFO,       &pVmxTransient->uExitIntInfo);
    15721562    rc    |= VMXReadVmcs32(VMX_VMCS32_RO_EXIT_INTERRUPTION_ERROR_CODE, &pVmxTransient->uExitIntErrorCode);
    1573     rc    |= VMXReadVmcsGstN(VMX_VMCS_RO_GUEST_LINEAR_ADDR,            &pVmxTransient->uGuestLinearAddr);
    1574     rc    |= VMXReadVmcsGstN(VMX_VMCS64_RO_GUEST_PHYS_ADDR_FULL,       &pVmxTransient->uGuestPhysicalAddr);
     1563    rc    |= VMXReadVmcsNw(VMX_VMCS_RO_GUEST_LINEAR_ADDR,              &pVmxTransient->uGuestLinearAddr);
     1564    rc    |= VMXReadVmcsNw(VMX_VMCS64_RO_GUEST_PHYS_ADDR_FULL,         &pVmxTransient->uGuestPhysicalAddr);
    15751565    AssertRCReturn(rc, rc);
    15761566    pVmxTransient->fVmcsFieldsRead |= HMVMX_READ_EXIT_QUALIFICATION
    … …  
    34373427 *
    34383428 * @returns VBox status code.
    3439  * @param   pVCpu       The cross context virtual CPU structure.
    34403429 * @param   pVmcsInfo   The VMCS info. object.
    34413430 */
    3442 DECLINLINE(int) hmR0VmxSetupVmcsVirtApicAddr(PVMCPU pVCpu, PCVMXVMCSINFO pVmcsInfo)
    3443 {
    3444     NOREF(pVCpu); /* Used implicitly by VMXWriteVmcs64 on 32-bit hosts. */
     3431DECLINLINE(int) hmR0VmxSetupVmcsVirtApicAddr(PCVMXVMCSINFO pVmcsInfo)
     3432{
    34453433    RTHCPHYS const HCPhysVirtApic = pVmcsInfo->HCPhysVirtApic;
    34463434    Assert(HCPhysVirtApic != NIL_RTHCPHYS);
    … …  
    34543442 *
    34553443 * @returns VBox status code.
    3456  * @param   pVCpu       The cross context virtual CPU structure.
    34573444 * @param   pVmcsInfo   The VMCS info. object.
    34583445 */
    3459 DECLINLINE(int) hmR0VmxSetupVmcsMsrBitmapAddr(PVMCPU pVCpu, PCVMXVMCSINFO pVmcsInfo)
    3460 {
    3461     NOREF(pVCpu); /* Used implicitly by VMXWriteVmcs64 on 32-bit hosts. */
     3446DECLINLINE(int) hmR0VmxSetupVmcsMsrBitmapAddr(PCVMXVMCSINFO pVmcsInfo)
     3447{
    34623448    RTHCPHYS const HCPhysMsrBitmap = pVmcsInfo->HCPhysMsrBitmap;
    34633449    Assert(HCPhysMsrBitmap != NIL_RTHCPHYS);
    … …  
    35193505 *
    35203506 * @returns VBox status code.
    3521  * @param   pVCpu       The cross context virtual CPU structure.
    35223507 * @param   pVmcsInfo   The VMCS info. object.
    35233508 */
    3524 DECLINLINE(int) hmR0VmxSetupVmcsAutoLoadStoreMsrAddrs(PVMCPU pVCpu, PVMXVMCSINFO pVmcsInfo)
    3525 {
    3526     NOREF(pVCpu); /* Used implicitly by VMXWriteVmcs64 on 32-bit hosts. */
    3527 
     3509DECLINLINE(int) hmR0VmxSetupVmcsAutoLoadStoreMsrAddrs(PVMXVMCSINFO pVmcsInfo)
     3510{
    35283511    RTHCPHYS const HCPhysGuestMsrLoad = pVmcsInfo->HCPhysGuestMsrLoad;
    35293512    Assert(HCPhysGuestMsrLoad != NIL_RTHCPHYS);
    … …  
    38003783        Assert(!(fVal & VMX_PROC_CTLS_CR8_STORE_EXIT));
    38013784        Assert(!(fVal & VMX_PROC_CTLS_CR8_LOAD_EXIT));
    3802         int rc = hmR0VmxSetupVmcsVirtApicAddr(pVCpu, pVmcsInfo);
     3785        int rc = hmR0VmxSetupVmcsVirtApicAddr(pVmcsInfo);
    38033786        AssertRCReturn(rc, rc);
    38043787    }
    … …  
    38183801    {
    38193802        fVal |= VMX_PROC_CTLS_USE_MSR_BITMAPS;
    3820         int rc = hmR0VmxSetupVmcsMsrBitmapAddr(pVCpu, pVmcsInfo);
     3803        int rc = hmR0VmxSetupVmcsMsrBitmapAddr(pVmcsInfo);
    38213804        AssertRCReturn(rc, rc);
    38223805    }
    … …  
    38903873    if (RT_SUCCESS(rc))
    38913874    {
    3892         rc = hmR0VmxSetupVmcsAutoLoadStoreMsrAddrs(pVCpu, pVmcsInfo);
     3875        rc = hmR0VmxSetupVmcsAutoLoadStoreMsrAddrs(pVmcsInfo);
    38933876        if (RT_SUCCESS(rc))
    38943877        {
    38953878            uint64_t const u64Cr0Mask = hmR0VmxGetFixedCr0Mask(pVCpu);
    38963879            uint64_t const u64Cr4Mask = hmR0VmxGetFixedCr4Mask(pVCpu);
    3897             rc  = VMXWriteVmcsHstN(VMX_VMCS_CTRL_CR0_MASK, u64Cr0Mask);
    3898             rc |= VMXWriteVmcsHstN(VMX_VMCS_CTRL_CR4_MASK, u64Cr4Mask);
     3880            rc  = VMXWriteVmcsNw(VMX_VMCS_CTRL_CR0_MASK, u64Cr0Mask);
     3881            rc |= VMXWriteVmcsNw(VMX_VMCS_CTRL_CR4_MASK, u64Cr4Mask);
    38993882            if (RT_SUCCESS(rc))
    39003883            {
    … …  
    39653948    if (RT_SUCCESS(rc))
    39663949    {
    3967         rc = hmR0VmxSetupVmcsAutoLoadStoreMsrAddrs(pVCpu, pVmcsInfo);
     3950        rc = hmR0VmxSetupVmcsAutoLoadStoreMsrAddrs(pVmcsInfo);
    39683951        if (RT_SUCCESS(rc))
    39693952        {
    39703953            if (pVM->hm.s.vmx.Msrs.ProcCtls.n.allowed1 & VMX_PROC_CTLS_USE_MSR_BITMAPS)
    3971                 rc = hmR0VmxSetupVmcsMsrBitmapAddr(pVCpu, pVmcsInfo);
     3954                rc = hmR0VmxSetupVmcsMsrBitmapAddr(pVmcsInfo);
    39723955            if (RT_SUCCESS(rc))
    39733956                return VINF_SUCCESS;
    … …  
    43484331{
    43494332    RTCCUINTREG uReg = ASMGetCR0();
    4350     int rc = VMXWriteVmcsHstN(VMX_VMCS_HOST_CR0, uReg);
     4333    int rc = VMXWriteVmcsNw(VMX_VMCS_HOST_CR0, uReg);
    43514334    AssertRCReturn(rc, rc);
    43524335
    43534336    uReg = ASMGetCR3();
    4354     rc = VMXWriteVmcsHstN(VMX_VMCS_HOST_CR3, uReg);
     4337    rc = VMXWriteVmcsNw(VMX_VMCS_HOST_CR3, uReg);
    43554338    AssertRCReturn(rc, rc);
    43564339
    43574340    uReg = ASMGetCR4();
    4358     rc = VMXWriteVmcsHstN(VMX_VMCS_HOST_CR4, uReg);
     4341    rc = VMXWriteVmcsNw(VMX_VMCS_HOST_CR4, uReg);
    43594342    AssertRCReturn(rc, rc);
    43604343    return rc;
    … …  
    44614444    ASMGetGDTR(&Gdtr);
    44624445    ASMGetIDTR(&Idtr);
    4463     rc  = VMXWriteVmcsHstN(VMX_VMCS_HOST_GDTR_BASE, Gdtr.pGdt);
    4464     rc |= VMXWriteVmcsHstN(VMX_VMCS_HOST_IDTR_BASE, Idtr.pIdt);
     4446    rc  = VMXWriteVmcsNw(VMX_VMCS_HOST_GDTR_BASE, Gdtr.pGdt);
     4447    rc |= VMXWriteVmcsNw(VMX_VMCS_HOST_IDTR_BASE, Idtr.pIdt);
    44654448    AssertRCReturn(rc, rc);
    44664449
    … …  
    45424525    }
    45434526
    4544     rc = VMXWriteVmcsHstN(VMX_VMCS_HOST_TR_BASE, uTRBase);
     4527    rc = VMXWriteVmcsNw(VMX_VMCS_HOST_TR_BASE, uTRBase);
    45454528    AssertRCReturn(rc, rc);
    45464529
    … …  
    45504533    uint64_t const u64FSBase = ASMRdMsr(MSR_K8_FS_BASE);
    45514534    uint64_t const u64GSBase = ASMRdMsr(MSR_K8_GS_BASE);
    4552     rc  = VMXWriteVmcsHstN(VMX_VMCS_HOST_FS_BASE, u64FSBase);
    4553     rc |= VMXWriteVmcsHstN(VMX_VMCS_HOST_GS_BASE, u64GSBase);
     4535    rc  = VMXWriteVmcsNw(VMX_VMCS_HOST_FS_BASE, u64FSBase);
     4536    rc |= VMXWriteVmcsNw(VMX_VMCS_HOST_GS_BASE, u64GSBase);
    45544537    AssertRCReturn(rc, rc);
    45554538
    … …  
    45914574     */
    45924575    int rc = VMXWriteVmcs32(VMX_VMCS32_HOST_SYSENTER_CS,  ASMRdMsr_Low(MSR_IA32_SYSENTER_CS));
    4593     rc    |= VMXWriteVmcsHstN(VMX_VMCS_HOST_SYSENTER_ESP, ASMRdMsr(MSR_IA32_SYSENTER_ESP));
    4594     rc    |= VMXWriteVmcsHstN(VMX_VMCS_HOST_SYSENTER_EIP, ASMRdMsr(MSR_IA32_SYSENTER_EIP));
     4576    rc    |= VMXWriteVmcsNw(VMX_VMCS_HOST_SYSENTER_ESP, ASMRdMsr(MSR_IA32_SYSENTER_ESP));
     4577    rc    |= VMXWriteVmcsNw(VMX_VMCS_HOST_SYSENTER_EIP, ASMRdMsr(MSR_IA32_SYSENTER_EIP));
    45954578    AssertRCReturn(rc, rc);
    45964579
    … …  
    50205003        HMVMX_CPUMCTX_ASSERT(pVCpu, CPUMCTX_EXTRN_RIP);
    50215004
    5022         int rc = VMXWriteVmcsGstN(VMX_VMCS_GUEST_RIP, pVCpu->cpum.GstCtx.rip);
     5005        int rc = VMXWriteVmcsNw(VMX_VMCS_GUEST_RIP, pVCpu->cpum.GstCtx.rip);
    50235006        AssertRCReturn(rc, rc);
    50245007
    … …  
    50445027        HMVMX_CPUMCTX_ASSERT(pVCpu, CPUMCTX_EXTRN_RSP);
    50455028
    5046         int rc = VMXWriteVmcsGstN(VMX_VMCS_GUEST_RSP, pVCpu->cpum.GstCtx.rsp);
     5029        int rc = VMXWriteVmcsNw(VMX_VMCS_GUEST_RSP, pVCpu->cpum.GstCtx.rsp);
    50475030        AssertRCReturn(rc, rc);
    50485031
    … …  
    50915074        }
    50925075
    5093         int rc = VMXWriteVmcsGstN(VMX_VMCS_GUEST_RFLAGS, fEFlags.u32);
     5076        int rc = VMXWriteVmcsNw(VMX_VMCS_GUEST_RFLAGS, fEFlags.u32);
    50945077        AssertRCReturn(rc, rc);
    50955078
    … …  
    52345217 * Enables VMCS shadowing for the given VMCS info. object.
    52355218 *
    5236  * @param   pVCpu       The cross context virtual CPU structure.
    52375219 * @param   pVmcsInfo   The VMCS info. object.
    52385220 *
    52395221 * @remarks No-long-jump zone!!!
    52405222 */
    5241 static void hmR0VmxEnableVmcsShadowing(PVMCPU pVCpu, PVMXVMCSINFO pVmcsInfo)
    5242 {
    5243     NOREF(pVCpu); /* Used implicitly by VMXWriteVmcs64 on 32-bit hosts. */
    5244 
     5223static void hmR0VmxEnableVmcsShadowing(PVMXVMCSINFO pVmcsInfo)
     5224{
    52455225    uint32_t uProcCtls2 = pVmcsInfo->u32ProcCtls2;
    52465226    if (!(uProcCtls2 & VMX_PROC_CTLS2_VMCS_SHADOWING))
    … …  
    52625242 * Disables VMCS shadowing for the given VMCS info. object.
    52635243 *
    5264  * @param   pVCpu       The cross context virtual CPU structure.
    52655244 * @param   pVmcsInfo   The VMCS info. object.
    52665245 *
    52675246 * @remarks No-long-jump zone!!!
    52685247 */
    5269 static void hmR0VmxDisableVmcsShadowing(PVMCPU pVCpu, PVMXVMCSINFO pVmcsInfo)
    5270 {
    5271     NOREF(pVCpu); /* Used implicitly by VMXWriteVmcs64 on 32-bit hosts. */
    5272 
     5248static void hmR0VmxDisableVmcsShadowing(PVMXVMCSINFO pVmcsInfo)
     5249{
    52735250    /*
    52745251     * We want all VMREAD and VMWRITE instructions to cause VM-exits, so we clear the
    … …  
    53435320                    pVCpu->hm.s.vmx.fCopiedNstGstToShadowVmcs = true;
    53445321                }
    5345                 hmR0VmxEnableVmcsShadowing(pVCpu, pVmcsInfo);
     5322                hmR0VmxEnableVmcsShadowing(pVmcsInfo);
    53465323            }
    53475324            else
    5348                 hmR0VmxDisableVmcsShadowing(pVCpu, pVmcsInfo);
     5325                hmR0VmxDisableVmcsShadowing(pVmcsInfo);
    53495326        }
    53505327#else
    … …  
    54825459
    54835460            /* Commit the CR0 and related fields to the guest VMCS. */
    5484             int rc = VMXWriteVmcsGstN(VMX_VMCS_GUEST_CR0, u64GuestCr0);
    5485             rc    |= VMXWriteVmcsHstN(VMX_VMCS_CTRL_CR0_READ_SHADOW, u64ShadowCr0);
     5461            int rc = VMXWriteVmcsNw(VMX_VMCS_GUEST_CR0, u64GuestCr0);
     5462            rc    |= VMXWriteVmcsNw(VMX_VMCS_CTRL_CR0_READ_SHADOW, u64ShadowCr0);
    54865463            if (uProcCtls != pVmcsInfo->u32ProcCtls)
    54875464                rc |= VMXWriteVmcs32(VMX_VMCS32_CTRL_PROC_EXEC, uProcCtls);
    … …  
    55215498
    55225499            /* Commit the CR0 and CR0 read-shadow to the nested-guest VMCS. */
    5523             int rc = VMXWriteVmcsGstN(VMX_VMCS_GUEST_CR0, u64GuestCr0);
    5524             rc    |= VMXWriteVmcsHstN(VMX_VMCS_CTRL_CR0_READ_SHADOW, u64ShadowCr0);
     5500            int rc = VMXWriteVmcsNw(VMX_VMCS_GUEST_CR0, u64GuestCr0);
     5501            rc    |= VMXWriteVmcsNw(VMX_VMCS_CTRL_CR0_READ_SHADOW, u64ShadowCr0);
    55255502            AssertRCReturn(rc, rc);
    55265503
    … …  
    56425619
    56435620            Log4Func(("u32GuestCr3=%#RGp (GstN)\n", GCPhysGuestCr3));
    5644             rc = VMXWriteVmcsGstN(VMX_VMCS_GUEST_CR3, GCPhysGuestCr3);
     5621            rc = VMXWriteVmcsNw(VMX_VMCS_GUEST_CR3, GCPhysGuestCr3);
    56455622            AssertRCReturn(rc, rc);
    56465623        }
    … …  
    56515628
    56525629            Log4Func(("u32GuestCr3=%#RHv (HstN)\n", HCPhysGuestCr3));
    5653             rc = VMXWriteVmcsHstN(VMX_VMCS_GUEST_CR3, HCPhysGuestCr3);
     5630            rc = VMXWriteVmcsNw(VMX_VMCS_GUEST_CR3, HCPhysGuestCr3);
    56545631            AssertRCReturn(rc, rc);
    56555632        }
    … …  
    57615738
    57625739        /* Commit the CR4 and CR4 read-shadow to the guest VMCS. */
    5763         rc  = VMXWriteVmcsGstN(VMX_VMCS_GUEST_CR4, u64GuestCr4);
    5764         rc |= VMXWriteVmcsHstN(VMX_VMCS_CTRL_CR4_READ_SHADOW, u64ShadowCr4);
     5740        rc  = VMXWriteVmcsNw(VMX_VMCS_GUEST_CR4, u64GuestCr4);
     5741        rc |= VMXWriteVmcsNw(VMX_VMCS_CTRL_CR4_READ_SHADOW, u64ShadowCr4);
    57655742        AssertRCReturn(rc, rc);
    57665743
    … …  
    57975774    if (pVmxTransient->fIsNestedGuest)
    57985775    {
    5799         int rc = VMXWriteVmcsGstN(VMX_VMCS_GUEST_DR7, CPUMGetGuestDR7(pVCpu));
     5776        int rc = VMXWriteVmcsNw(VMX_VMCS_GUEST_DR7, CPUMGetGuestDR7(pVCpu));
    58005777        AssertRCReturn(rc, rc);
    58015778
    … …  
    59135890     * Update guest DR7.
    59145891     */
    5915     int rc = VMXWriteVmcsGstN(VMX_VMCS_GUEST_DR7, u64GuestDr7);
     5892    int rc = VMXWriteVmcsNw(VMX_VMCS_GUEST_DR7, u64GuestDr7);
    59165893    AssertRCReturn(rc, rc);
    59175894
    … …  
    61716148    int rc = VMXWriteVmcs32(idxSel,    pSelReg->Sel);
    61726149    rc    |= VMXWriteVmcs32(idxLimit,  pSelReg->u32Limit);
    6173     rc    |= VMXWriteVmcsGstN(idxBase, pSelReg->u64Base);
     6150    rc    |= VMXWriteVmcsNw(idxBase, pSelReg->u64Base);
    61746151    rc    |= VMXWriteVmcs32(idxAttr,   u32Access);
    61756152    AssertRCReturn(rc, rc);
    … …  
    63506327        rc |= VMXWriteVmcs32(VMX_VMCS32_GUEST_TR_LIMIT,         u32Limit);
    63516328        rc |= VMXWriteVmcs32(VMX_VMCS32_GUEST_TR_ACCESS_RIGHTS, u32AccessRights);
    6352         rc |= VMXWriteVmcsGstN(VMX_VMCS_GUEST_TR_BASE,          u64Base);
     6329        rc |= VMXWriteVmcsNw(VMX_VMCS_GUEST_TR_BASE,          u64Base);
    63536330        AssertRCReturn(rc, rc);
    63546331
    … …  
    63656342
    63666343        rc  = VMXWriteVmcs32(VMX_VMCS32_GUEST_GDTR_LIMIT, pCtx->gdtr.cbGdt);
    6367         rc |= VMXWriteVmcsGstN(VMX_VMCS_GUEST_GDTR_BASE,  pCtx->gdtr.pGdt);
     6344        rc |= VMXWriteVmcsNw(VMX_VMCS_GUEST_GDTR_BASE,  pCtx->gdtr.pGdt);
    63686345        AssertRCReturn(rc, rc);
    63696346
    … …  
    63936370        rc |= VMXWriteVmcs32(VMX_VMCS32_GUEST_LDTR_LIMIT,         pCtx->ldtr.u32Limit);
    63946371        rc |= VMXWriteVmcs32(VMX_VMCS32_GUEST_LDTR_ACCESS_RIGHTS, u32Access);
    6395         rc |= VMXWriteVmcsGstN(VMX_VMCS_GUEST_LDTR_BASE,          pCtx->ldtr.u64Base);
     6372        rc |= VMXWriteVmcsNw(VMX_VMCS_GUEST_LDTR_BASE,          pCtx->ldtr.u64Base);
    63966373        AssertRCReturn(rc, rc);
    63976374
    … …  
    64236400
    64246401        rc  = VMXWriteVmcs32(VMX_VMCS32_GUEST_IDTR_LIMIT, pCtx->idtr.cbIdt);
    6425         rc |= VMXWriteVmcsGstN(VMX_VMCS_GUEST_IDTR_BASE,  pCtx->idtr.pIdt);
     6402        rc |= VMXWriteVmcsNw(VMX_VMCS_GUEST_IDTR_BASE,  pCtx->idtr.pIdt);
    64266403        AssertRCReturn(rc, rc);
    64276404
    … …  
    64946471        if (ASMAtomicUoReadU64(&pVCpu->hm.s.fCtxChanged) & HM_CHANGED_GUEST_SYSENTER_EIP_MSR)
    64956472        {
    6496             int rc = VMXWriteVmcsGstN(VMX_VMCS_GUEST_SYSENTER_EIP, pCtx->SysEnter.eip);
     6473            int rc = VMXWriteVmcsNw(VMX_VMCS_GUEST_SYSENTER_EIP, pCtx->SysEnter.eip);
    64976474            AssertRCReturn(rc, rc);
    64986475            ASMAtomicUoAndU64(&pVCpu->hm.s.fCtxChanged, ~HM_CHANGED_GUEST_SYSENTER_EIP_MSR);
    … …  
    65016478        if (ASMAtomicUoReadU64(&pVCpu->hm.s.fCtxChanged) & HM_CHANGED_GUEST_SYSENTER_ESP_MSR)
    65026479        {
    6503             int rc = VMXWriteVmcsGstN(VMX_VMCS_GUEST_SYSENTER_ESP, pCtx->SysEnter.esp);
     6480            int rc = VMXWriteVmcsNw(VMX_VMCS_GUEST_SYSENTER_ESP, pCtx->SysEnter.esp);
    65046481            AssertRCReturn(rc, rc);
    65056482            ASMAtomicUoAndU64(&pVCpu->hm.s.fCtxChanged, ~HM_CHANGED_GUEST_SYSENTER_ESP_MSR);
    … …  
    66616638            int rc = VMXReadVmcs32(VMX_VMCS32_RO_EXIT_REASON, &pVCpu->hm.s.vmx.LastError.u32ExitReason);
    66626639            rc    |= VMXReadVmcs32(VMX_VMCS32_RO_VM_INSTR_ERROR, &pVCpu->hm.s.vmx.LastError.u32InstrError);
    6663             rc    |= hmR0VmxReadExitQualVmcs(pVCpu, pVmxTransient);
     6640            rc    |= hmR0VmxReadExitQualVmcs(pVmxTransient);
    66646641            AssertRC(rc);
    66656642
    … …  
    68926869        if (pVmxTransient->fIsNestedGuest)
    68936870            uTscOffset = CPUMApplyNestedGuestTscOffset(pVCpu, uTscOffset);
    6894         hmR0VmxSetTscOffsetVmcs(pVCpu, pVmcsInfo, uTscOffset);
     6871        hmR0VmxSetTscOffsetVmcs(pVmcsInfo, uTscOffset);
    68956872        hmR0VmxRemoveProcCtlsVmcs(pVCpu, pVmxTransient, VMX_PROC_CTLS_RDTSC_EXIT);
    68966873    }
    … …  
    71737150    rc    |= VMXReadVmcs32(idxLimit, &u32Limit);
    71747151    rc    |= VMXReadVmcs32(idxAttr,  &u32Attr);
    7175     rc    |= VMXReadVmcsGstN(idxBase, &u64Base);
     7152    rc    |= VMXReadVmcsNw(idxBase, &u64Base);
    71767153    if (RT_SUCCESS(rc))
    71777154    {
    … …  
    72077184    rc    |= VMXReadVmcs32(VMX_VMCS32_GUEST_LDTR_LIMIT,         &u32Limit);
    72087185    rc    |= VMXReadVmcs32(VMX_VMCS32_GUEST_LDTR_ACCESS_RIGHTS, &u32Attr);
    7209     rc    |= VMXReadVmcsGstN(VMX_VMCS_GUEST_LDTR_BASE,          &u64Base);
     7186    rc    |= VMXReadVmcsNw(VMX_VMCS_GUEST_LDTR_BASE,          &u64Base);
    72107187    if (RT_SUCCESS(rc))
    72117188    {
    … …  
    72407217    rc    |= VMXReadVmcs32(VMX_VMCS32_GUEST_TR_LIMIT,         &u32Limit);
    72417218    rc    |= VMXReadVmcs32(VMX_VMCS32_GUEST_TR_ACCESS_RIGHTS, &u32Attr);
    7242     rc    |= VMXReadVmcsGstN(VMX_VMCS_GUEST_TR_BASE,          &u64Base);
     7219    rc    |= VMXReadVmcsNw(VMX_VMCS_GUEST_TR_BASE,          &u64Base);
    72437220    AssertRCReturn(rc, rc);
    72447221
    … …  
    72717248    if (pCtx->fExtrn & CPUMCTX_EXTRN_RIP)
    72727249    {
    7273         int rc = VMXReadVmcsGstN(VMX_VMCS_GUEST_RIP, &u64Val);
     7250        int rc = VMXReadVmcsNw(VMX_VMCS_GUEST_RIP, &u64Val);
    72747251        if (RT_SUCCESS(rc))
    72757252        {
    … …  
    73017278    if (pCtx->fExtrn & CPUMCTX_EXTRN_RFLAGS)
    73027279    {
    7303         int rc = VMXReadVmcsGstN(VMX_VMCS_GUEST_RFLAGS, &u64Val);
     7280        int rc = VMXReadVmcsNw(VMX_VMCS_GUEST_RFLAGS, &u64Val);
    73047281        if (RT_SUCCESS(rc))
    73057282        {
    … …  
    74407417            if (fWhat & CPUMCTX_EXTRN_RSP)
    74417418            {
    7442                 rc = VMXReadVmcsGstN(VMX_VMCS_GUEST_RSP, &u64Val);
     7419                rc = VMXReadVmcsNw(VMX_VMCS_GUEST_RSP, &u64Val);
    74437420                VMXLOCAL_BREAK_RC(rc);
    74447421                pCtx->rsp = u64Val;
    … …  
    74967473                if (fWhat & CPUMCTX_EXTRN_GDTR)
    74977474                {
    7498                     rc |= VMXReadVmcsGstN(VMX_VMCS_GUEST_GDTR_BASE,  &u64Val);
     7475                    rc |= VMXReadVmcsNw(VMX_VMCS_GUEST_GDTR_BASE,  &u64Val);
    74997476                    rc |= VMXReadVmcs32(VMX_VMCS32_GUEST_GDTR_LIMIT, &u32Val);
    75007477                    pCtx->gdtr.pGdt  = u64Val;
    … …  
    75057482                if (fWhat & CPUMCTX_EXTRN_IDTR)
    75067483                {
    7507                     rc |= VMXReadVmcsGstN(VMX_VMCS_GUEST_IDTR_BASE,  &u64Val);
     7484                    rc |= VMXReadVmcsNw(VMX_VMCS_GUEST_IDTR_BASE,  &u64Val);
    75087485                    rc |= VMXReadVmcs32(VMX_VMCS32_GUEST_IDTR_LIMIT, &u32Val);
    75097486                    pCtx->idtr.pIdt  = u64Val;
    … …  
    75277504                {
    75287505                    /* Upper 32-bits are always zero. See Intel spec. 2.7.3 "Loading and Storing Debug Registers". */
    7529                     rc = VMXReadVmcsGstN(VMX_VMCS_GUEST_DR7, &u64Val);
     7506                    rc = VMXReadVmcsNw(VMX_VMCS_GUEST_DR7, &u64Val);
    75307507                    VMXLOCAL_BREAK_RC(rc);
    75317508                    pCtx->dr[7] = u64Val;
    … …  
    75357512            if (fWhat & CPUMCTX_EXTRN_SYSENTER_MSRS)
    75367513            {
    7537                 rc  = VMXReadVmcsGstN(VMX_VMCS_GUEST_SYSENTER_EIP, &pCtx->SysEnter.eip);
    7538                 rc |= VMXReadVmcsGstN(VMX_VMCS_GUEST_SYSENTER_ESP, &pCtx->SysEnter.esp);
     7514                rc  = VMXReadVmcsNw(VMX_VMCS_GUEST_SYSENTER_EIP, &pCtx->SysEnter.eip);
     7515                rc |= VMXReadVmcsNw(VMX_VMCS_GUEST_SYSENTER_ESP, &pCtx->SysEnter.esp);
    75397516                rc |= VMXReadVmcs32(VMX_VMCS32_GUEST_SYSENTER_CS,  &u32Val);
    75407517                pCtx->SysEnter.cs = u32Val;
    … …  
    75927569                {
    75937570                    uint64_t u64Shadow;
    7594                     rc  = VMXReadVmcsGstN(VMX_VMCS_GUEST_CR0, &u64Val);
    7595                     rc |= VMXReadVmcsHstN(VMX_VMCS_CTRL_CR0_READ_SHADOW, &u64Shadow);
     7571                    rc  = VMXReadVmcsNw(VMX_VMCS_GUEST_CR0, &u64Val);
     7572                    rc |= VMXReadVmcsNw(VMX_VMCS_CTRL_CR0_READ_SHADOW, &u64Shadow);
    75967573                    VMXLOCAL_BREAK_RC(rc);
    75977574                    u64Val = (u64Val    & ~pVmcsInfo->u64Cr0Mask)
    … …  
    76187595                {
    76197596                    uint64_t u64Shadow;
    7620                     rc  = VMXReadVmcsGstN(VMX_VMCS_GUEST_CR4, &u64Val);
    7621                     rc |= VMXReadVmcsHstN(VMX_VMCS_CTRL_CR4_READ_SHADOW, &u64Shadow);
     7597                    rc  = VMXReadVmcsNw(VMX_VMCS_GUEST_CR4, &u64Val);
     7598                    rc |= VMXReadVmcsNw(VMX_VMCS_CTRL_CR4_READ_SHADOW, &u64Shadow);
    76227599                    VMXLOCAL_BREAK_RC(rc);
    76237600                    u64Val = (u64Val    & ~pVmcsInfo->u64Cr4Mask)
    … …  
    76467623                            && CPUMIsGuestPagingEnabledEx(pCtx)))
    76477624                    {
    7648                         rc = VMXReadVmcsGstN(VMX_VMCS_GUEST_CR3, &u64Val);
     7625                        rc = VMXReadVmcsNw(VMX_VMCS_GUEST_CR3, &u64Val);
    76497626                        VMXLOCAL_BREAK_RC(rc);
    76507627                        if (pCtx->cr3 != u64Val)
    … …  
    93939370         * RIP and RFLAGS.
    93949371         */
    9395         rc = VMXReadVmcsGstN(VMX_VMCS_GUEST_RIP, &u64Val);
     9372        rc = VMXReadVmcsNw(VMX_VMCS_GUEST_RIP, &u64Val);
    93969373        AssertRCBreak(rc);
    93979374        /* pCtx->rip can be different than the one in the VMCS (e.g. run guest code and VM-exits that don't update it). */
    … …  
    94079384
    94089385        /* Flags in pCtx can be different (real-on-v86 for instance). We are only concerned about the VMCS contents here. */
    9409         rc = VMXReadVmcsGstN(VMX_VMCS_GUEST_RFLAGS, &u64Val);
     9386        rc = VMXReadVmcsNw(VMX_VMCS_GUEST_RFLAGS, &u64Val);
    94109387        AssertRCBreak(rc);
    94119388        HMVMX_CHECK_BREAK(!(u64Val & UINT64_C(0xffffffffffc08028)),                     /* Bit 63:22, Bit 15, 5, 3 MBZ. */
    … …  
    94519428        }
    94529429
    9453         rc = VMXReadVmcsHstN(VMX_VMCS_HOST_SYSENTER_ESP, &u64Val);
     9430        rc = VMXReadVmcsNw(VMX_VMCS_HOST_SYSENTER_ESP, &u64Val);
    94549431        AssertRCBreak(rc);
    94559432        HMVMX_CHECK_BREAK(X86_IS_CANONICAL(u64Val), VMX_IGS_SYSENTER_ESP_NOT_CANONICAL);
    94569433
    9457         rc = VMXReadVmcsHstN(VMX_VMCS_HOST_SYSENTER_EIP, &u64Val);
     9434        rc = VMXReadVmcsNw(VMX_VMCS_HOST_SYSENTER_EIP, &u64Val);
    94589435        AssertRCBreak(rc);
    94599436        HMVMX_CHECK_BREAK(X86_IS_CANONICAL(u64Val), VMX_IGS_SYSENTER_EIP_NOT_CANONICAL);
    … …  
    97259702         * GDTR and IDTR (64-bit capable checks).
    97269703         */
    9727         rc = VMXReadVmcsGstN(VMX_VMCS_GUEST_GDTR_BASE, &u64Val);
     9704        rc = VMXReadVmcsNw(VMX_VMCS_GUEST_GDTR_BASE, &u64Val);
    97289705        AssertRCBreak(rc);
    97299706        HMVMX_CHECK_BREAK(X86_IS_CANONICAL(u64Val), VMX_IGS_GDTR_BASE_NOT_CANONICAL);
    97309707
    9731         rc = VMXReadVmcsGstN(VMX_VMCS_GUEST_IDTR_BASE, &u64Val);
     9708        rc = VMXReadVmcsNw(VMX_VMCS_GUEST_IDTR_BASE, &u64Val);
    97329709        AssertRCBreak(rc);
    97339710        HMVMX_CHECK_BREAK(X86_IS_CANONICAL(u64Val), VMX_IGS_IDTR_BASE_NOT_CANONICAL);
    … …  
    1026910246        rc |= VMXWriteVmcs32(VMX_VMCS32_CTRL_EXCEPTION_BITMAP, u32XcptBitmap);
    1027010247    if (pVmcsInfoNstGst->u64Cr0Mask != u64Cr0Mask)
    10271         rc |= VMXWriteVmcsHstN(VMX_VMCS_CTRL_CR0_MASK, u64Cr0Mask);
     10248        rc |= VMXWriteVmcsNw(VMX_VMCS_CTRL_CR0_MASK, u64Cr0Mask);
    1027210249    if (pVmcsInfoNstGst->u64Cr4Mask != u64Cr4Mask)
    10273         rc |= VMXWriteVmcsHstN(VMX_VMCS_CTRL_CR4_MASK, u64Cr4Mask);
     10250        rc |= VMXWriteVmcsNw(VMX_VMCS_CTRL_CR4_MASK, u64Cr4Mask);
    1027410251    if (pVmcsInfoNstGst->u32XcptPFMask != u32XcptPFMask)
    1027510252        rc |= VMXWriteVmcs32(VMX_VMCS32_CTRL_PAGEFAULT_ERROR_MASK, u32XcptPFMask);
    … …  
    1087310850
    1087410851#ifdef HMVMX_ALWAYS_SAVE_RO_GUEST_STATE
    10875             rc = hmR0VmxReadAllRoFieldsVmcs(pVCpu, pVmxTransient);
     10852            rc = hmR0VmxReadAllRoFieldsVmcs(pVmxTransient);
    1087610853            AssertRC(rc);
    1087710854#endif
    … …  
    1129711274    {
    1129811275        pVmcsInfo->u64Cr0Mask = 0;
    11299         VMXWriteVmcsHstN(VMX_VMCS_CTRL_CR0_MASK, 0);
     11276        VMXWriteVmcsNw(VMX_VMCS_CTRL_CR0_MASK, 0);
    1130011277        Log6Func(("VMX_VMCS_CTRL_CR0_MASK: 0\n"));
    1130111278    }
    … …  
    1130411281    {
    1130511282        pVmcsInfo->u64Cr4Mask = 0;
    11306         VMXWriteVmcsHstN(VMX_VMCS_CTRL_CR4_MASK, 0);
     11283        VMXWriteVmcsNw(VMX_VMCS_CTRL_CR4_MASK, 0);
    1130711284        Log6Func(("VMX_VMCS_CTRL_CR4_MASK: 0\n"));
    1130811285    }
    … …  
    1178511762        case VMX_EXIT_VMXON:            SET_BOTH(VMX_VMXON); break;
    1178611763        case VMX_EXIT_MOV_CRX:
    11787             hmR0VmxReadExitQualVmcs(pVCpu, pVmxTransient);
     11764            hmR0VmxReadExitQualVmcs(pVmxTransient);
    1178811765            if (VMX_EXIT_QUAL_CRX_ACCESS(pVmxTransient->uExitQual) == VMX_EXIT_QUAL_CRX_ACCESS_READ)
    1178911766                SET_BOTH(CRX_READ);
    … …  
    1179311770            break;
    1179411771        case VMX_EXIT_MOV_DRX:
    11795             hmR0VmxReadExitQualVmcs(pVCpu, pVmxTransient);
     11772            hmR0VmxReadExitQualVmcs(pVmxTransient);
    1179611773            if (   VMX_EXIT_QUAL_DRX_DIRECTION(pVmxTransient->uExitQual)
    1179711774                == VMX_EXIT_QUAL_DRX_DIRECTION_READ)
    … …  
    1187611853    if (fDtrace1 || fDtrace2)
    1187711854    {
    11878         hmR0VmxReadExitQualVmcs(pVCpu, pVmxTransient);
     11855        hmR0VmxReadExitQualVmcs(pVmxTransient);
    1187911856        hmR0VmxImportGuestState(pVCpu, pVmxTransient->pVmcsInfo, HMVMX_CPUMCTX_EXTRN_ALL);
    1188011857        PCPUMCTX pCtx = &pVCpu->cpum.GstCtx;
    … …  
    1206312040    else
    1206412041    {
    12065         hmR0VmxReadExitQualVmcs(pVCpu, pVmxTransient);
     12042        hmR0VmxReadExitQualVmcs(pVmxTransient);
    1206612043        int rc = hmR0VmxImportGuestState(pVCpu, pVmxTransient->pVmcsInfo, HMVMX_CPUMCTX_EXTRN_ALL);
    1206712044        AssertRC(rc);
    … …  
    1359013567    HMVMX_VALIDATE_EXIT_XCPT_HANDLER_PARAMS(pVCpu, pVmxTransient);
    1359113568    PVM pVM = pVCpu->CTX_SUFF(pVM);
    13592     int rc = hmR0VmxReadExitQualVmcs(pVCpu, pVmxTransient);
     13569    int rc = hmR0VmxReadExitQualVmcs(pVmxTransient);
    1359313570    AssertRCReturn(rc, rc);
    1359413571
    … …  
    1377013747     * Get the DR6-like values from the Exit qualification and pass it to DBGF for processing.
    1377113748     */
    13772     int rc = hmR0VmxReadExitQualVmcs(pVCpu, pVmxTransient);
     13749    int rc = hmR0VmxReadExitQualVmcs(pVmxTransient);
    1377313750    AssertRCReturn(rc, rc);
    1377413751
    … …  
    1381213789        pCtx->dr[7] |= X86_DR7_RA1_MASK;
    1381313790
    13814         rc = VMXWriteVmcsGstN(VMX_VMCS_GUEST_DR7, pCtx->dr[7]);
     13791        rc = VMXWriteVmcsNw(VMX_VMCS_GUEST_DR7, pCtx->dr[7]);
    1381513792        AssertRCReturn(rc, rc);
    1381613793
    … …  
    1450714484
    1450814485    PVMXVMCSINFO pVmcsInfo = pVmxTransient->pVmcsInfo;
    14509     int rc = hmR0VmxReadExitQualVmcs(pVCpu, pVmxTransient);
     14486    int rc = hmR0VmxReadExitQualVmcs(pVmxTransient);
    1451014487    rc    |= hmR0VmxReadExitInstrLenVmcs(pVmxTransient);
    1451114488    rc    |= hmR0VmxImportGuestState(pVCpu, pVmcsInfo, IEM_CPUMCTX_EXTRN_EXEC_DECODED_MEM_MASK);
    … …  
    1471014687    rc = VMXReadVmcs32(VMX_VMCS_GUEST_CR0, &u32Val);                        AssertRC(rc);
    1471114688    Log4(("VMX_VMCS_GUEST_CR0                         %#RX32\n", u32Val));
    14712     rc = VMXReadVmcsHstN(VMX_VMCS_CTRL_CR0_MASK, &uHCReg);                  AssertRC(rc);
     14689    rc = VMXReadVmcsNw(VMX_VMCS_CTRL_CR0_MASK, &uHCReg);                  AssertRC(rc);
    1471314690    Log4(("VMX_VMCS_CTRL_CR0_MASK                     %#RHr\n", uHCReg));
    14714     rc = VMXReadVmcsHstN(VMX_VMCS_CTRL_CR0_READ_SHADOW, &uHCReg);           AssertRC(rc);
     14691    rc = VMXReadVmcsNw(VMX_VMCS_CTRL_CR0_READ_SHADOW, &uHCReg);           AssertRC(rc);
    1471514692    Log4(("VMX_VMCS_CTRL_CR4_READ_SHADOW              %#RHr\n", uHCReg));
    14716     rc = VMXReadVmcsHstN(VMX_VMCS_CTRL_CR4_MASK, &uHCReg);                  AssertRC(rc);
     14693    rc = VMXReadVmcsNw(VMX_VMCS_CTRL_CR4_MASK, &uHCReg);                  AssertRC(rc);
    1471714694    Log4(("VMX_VMCS_CTRL_CR4_MASK                     %#RHr\n", uHCReg));
    14718     rc = VMXReadVmcsHstN(VMX_VMCS_CTRL_CR4_READ_SHADOW, &uHCReg);           AssertRC(rc);
     14695    rc = VMXReadVmcsNw(VMX_VMCS_CTRL_CR4_READ_SHADOW, &uHCReg);           AssertRC(rc);
    1471914696    Log4(("VMX_VMCS_CTRL_CR4_READ_SHADOW              %#RHr\n", uHCReg));
    1472014697    if (pVCpu->CTX_SUFF(pVM)->hm.s.fNestedPaging)
    … …  
    1507815055
    1507915056    PVMXVMCSINFO pVmcsInfo = pVmxTransient->pVmcsInfo;
    15080     int rc = hmR0VmxReadExitQualVmcs(pVCpu, pVmxTransient);
     15057    int rc = hmR0VmxReadExitQualVmcs(pVmxTransient);
    1508115058    rc    |= hmR0VmxReadExitInstrLenVmcs(pVmxTransient);
    1508215059    AssertRCReturn(rc, rc);
    … …  
    1519315170            if (fMemOperand)
    1519415171            {
    15195                 rc = hmR0VmxReadGuestLinearAddrVmcs(pVCpu, pVmxTransient);
     15172                rc = hmR0VmxReadGuestLinearAddrVmcs(pVmxTransient);
    1519615173                AssertRCReturn(rc, rc);
    1519715174                GCPtrEffDst = pVmxTransient->uGuestLinearAddr;
    … …  
    1523115208    PCPUMCTX pCtx = &pVCpu->cpum.GstCtx;
    1523215209    PVMXVMCSINFO pVmcsInfo = pVmxTransient->pVmcsInfo;
    15233     int rc = hmR0VmxReadExitQualVmcs(pVCpu, pVmxTransient);
     15210    int rc = hmR0VmxReadExitQualVmcs(pVmxTransient);
    1523415211    rc    |= hmR0VmxReadExitInstrLenVmcs(pVmxTransient);
    1523515212    rc    |= hmR0VmxImportGuestState(pVCpu, pVmcsInfo, IEM_CPUMCTX_EXTRN_MUST_MASK | CPUMCTX_EXTRN_SREG_MASK
    … …  
    1546615443
    1546715444    /* Check if this task-switch occurred while delivery an event through the guest IDT. */
    15468     int rc = hmR0VmxReadExitQualVmcs(pVCpu, pVmxTransient);
     15445    int rc = hmR0VmxReadExitQualVmcs(pVmxTransient);
    1546915446    AssertRCReturn(rc, rc);
    1547015447    if (VMX_EXIT_QUAL_TASK_SWITCH_TYPE(pVmxTransient->uExitQual) == VMX_EXIT_QUAL_TASK_SWITCH_TYPE_IDT)
    … …  
    1556115538    PVMXVMCSINFO pVmcsInfo = pVmxTransient->pVmcsInfo;
    1556215539    rc  = hmR0VmxImportGuestState(pVCpu, pVmcsInfo, IEM_CPUMCTX_EXTRN_MUST_MASK);
    15563     rc |= hmR0VmxReadExitQualVmcs(pVCpu, pVmxTransient);
     15540    rc |= hmR0VmxReadExitQualVmcs(pVmxTransient);
    1556415541    AssertRCReturn(rc, rc);
    1556515542
    … …  
    1565415631
    1565515632#ifdef VBOX_WITH_STATISTICS
    15656             rc = hmR0VmxReadExitQualVmcs(pVCpu, pVmxTransient);
     15633            rc = hmR0VmxReadExitQualVmcs(pVmxTransient);
    1565715634            AssertRCReturn(rc, rc);
    1565815635            if (VMX_EXIT_QUAL_DRX_DIRECTION(pVmxTransient->uExitQual) == VMX_EXIT_QUAL_DRX_DIRECTION_WRITE)
    … …  
    1567215649     */
    1567315650    PCPUMCTX pCtx = &pVCpu->cpum.GstCtx;
    15674     int rc = hmR0VmxReadExitQualVmcs(pVCpu, pVmxTransient);
     15651    int rc = hmR0VmxReadExitQualVmcs(pVmxTransient);
    1567515652    rc    |= hmR0VmxImportGuestState(pVCpu, pVmcsInfo, CPUMCTX_EXTRN_SREG_MASK | CPUMCTX_EXTRN_DR7);
    1567615653    AssertRCReturn(rc, rc);
    … …  
    1575615733     */
    1575715734    PVMXVMCSINFO pVmcsInfo = pVmxTransient->pVmcsInfo;
    15758     rc  = hmR0VmxReadGuestPhysicalAddrVmcs(pVCpu, pVmxTransient);
     15735    rc  = hmR0VmxReadGuestPhysicalAddrVmcs(pVmxTransient);
    1575915736    rc |= hmR0VmxImportGuestState(pVCpu, pVmcsInfo, IEM_CPUMCTX_EXTRN_MUST_MASK);
    1576015737    AssertRCReturn(rc, rc);
    … …  
    1581515792    Assert(pVCpu->CTX_SUFF(pVM)->hm.s.fNestedPaging);
    1581615793
    15817     int rc  = hmR0VmxReadExitQualVmcs(pVCpu, pVmxTransient);
     15794    int rc  = hmR0VmxReadExitQualVmcs(pVmxTransient);
    1581815795    rc     |= hmR0VmxReadExitIntInfoVmcs(pVmxTransient);
    1581915796    rc     |= hmR0VmxReadExitIntErrorCodeVmcs(pVmxTransient);
    … …  
    1584315820
    1584415821    PVMXVMCSINFO pVmcsInfo = pVmxTransient->pVmcsInfo;
    15845     rc  = hmR0VmxReadGuestPhysicalAddrVmcs(pVCpu, pVmxTransient);
     15822    rc  = hmR0VmxReadGuestPhysicalAddrVmcs(pVmxTransient);
    1584615823    rc |= hmR0VmxImportGuestState(pVCpu, pVmcsInfo, IEM_CPUMCTX_EXTRN_MUST_MASK);
    1584715824    AssertRCReturn(rc, rc);
    … …  
    1589915876                                                                    | IEM_CPUMCTX_EXTRN_EXEC_DECODED_MEM_MASK);
    1590015877    rc    |= hmR0VmxReadExitInstrInfoVmcs(pVmxTransient);
    15901     rc    |= hmR0VmxReadExitQualVmcs(pVCpu, pVmxTransient);
     15878    rc    |= hmR0VmxReadExitQualVmcs(pVmxTransient);
    1590215879    AssertRCReturn(rc, rc);
    1590315880
    … …  
    1596515942                                                                    | IEM_CPUMCTX_EXTRN_EXEC_DECODED_MEM_MASK);
    1596615943    rc    |= hmR0VmxReadExitInstrInfoVmcs(pVmxTransient);
    15967     rc    |= hmR0VmxReadExitQualVmcs(pVCpu, pVmxTransient);
     15944    rc    |= hmR0VmxReadExitQualVmcs(pVmxTransient);
    1596815945    AssertRCReturn(rc, rc);
    1596915946
    … …  
    1600215979                                                                    | IEM_CPUMCTX_EXTRN_EXEC_DECODED_MEM_MASK);
    1600315980    rc    |= hmR0VmxReadExitInstrInfoVmcs(pVmxTransient);
    16004     rc    |= hmR0VmxReadExitQualVmcs(pVCpu, pVmxTransient);
     15981    rc    |= hmR0VmxReadExitQualVmcs(pVmxTransient);
    1600515982    AssertRCReturn(rc, rc);
    1600615983
    … …  
    1604416021                                                                    | IEM_CPUMCTX_EXTRN_EXEC_DECODED_MEM_MASK);
    1604516022    rc    |= hmR0VmxReadExitInstrInfoVmcs(pVmxTransient);
    16046     rc    |= hmR0VmxReadExitQualVmcs(pVCpu, pVmxTransient);
     16023    rc    |= hmR0VmxReadExitQualVmcs(pVmxTransient);
    1604716024    AssertRCReturn(rc, rc);
    1604816025
    … …  
    1611616093                                                                    | IEM_CPUMCTX_EXTRN_EXEC_DECODED_MEM_MASK);
    1611716094    rc    |= hmR0VmxReadExitInstrInfoVmcs(pVmxTransient);
    16118     rc    |= hmR0VmxReadExitQualVmcs(pVCpu, pVmxTransient);
     16095    rc    |= hmR0VmxReadExitQualVmcs(pVmxTransient);
    1611916096    AssertRCReturn(rc, rc);
    1612016097
    … …  
    1618116158                                                                    | IEM_CPUMCTX_EXTRN_EXEC_DECODED_MEM_MASK);
    1618216159    rc    |= hmR0VmxReadExitInstrInfoVmcs(pVmxTransient);
    16183     rc    |= hmR0VmxReadExitQualVmcs(pVCpu, pVmxTransient);
     16160    rc    |= hmR0VmxReadExitQualVmcs(pVmxTransient);
    1618416161    AssertRCReturn(rc, rc);
    1618516162
    … …  
    1621716194                                                                    | IEM_CPUMCTX_EXTRN_EXEC_DECODED_MEM_MASK);
    1621816195    rc    |= hmR0VmxReadExitInstrInfoVmcs(pVmxTransient);
    16219     rc    |= hmR0VmxReadExitQualVmcs(pVCpu, pVmxTransient);
     16196    rc    |= hmR0VmxReadExitQualVmcs(pVmxTransient);
    1622016197    AssertRCReturn(rc, rc);
    1622116198
    … …  
    1629816275            {
    1629916276                /* Exit qualification is required for debug and page-fault exceptions. */
    16300                 rc = hmR0VmxReadExitQualVmcs(pVCpu, pVmxTransient);
     16277                rc = hmR0VmxReadExitQualVmcs(pVmxTransient);
    1630116278                AssertRCReturn(rc, rc);
    1630216279
    … …  
    1640316380    HMVMX_VALIDATE_NESTED_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient);
    1640416381
    16405     int rc = hmR0VmxReadExitQualVmcs(pVCpu, pVmxTransient);
     16382    int rc = hmR0VmxReadExitQualVmcs(pVmxTransient);
    1640616383    rc    |= hmR0VmxReadExitInstrLenVmcs(pVmxTransient);
    1640716384    rc    |= hmR0VmxReadIdtVectoringInfoVmcs(pVmxTransient);
    … …  
    1645016427    {
    1645116428        int rc = hmR0VmxReadExitInstrLenVmcs(pVmxTransient);
    16452         rc    |= hmR0VmxReadExitQualVmcs(pVCpu, pVmxTransient);
     16429        rc    |= hmR0VmxReadExitQualVmcs(pVmxTransient);
    1645316430        AssertRCReturn(rc, rc);
    1645416431
    … …  
    1650616483    {
    1650716484        rc |= hmR0VmxReadExitInstrLenVmcs(pVmxTransient);
    16508         rc |= hmR0VmxReadExitQualVmcs(pVCpu, pVmxTransient);
     16485        rc |= hmR0VmxReadExitQualVmcs(pVmxTransient);
    1650916486        AssertRCReturn(rc, rc);
    1651016487
    … …  
    1655016527    HMVMX_VALIDATE_NESTED_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient);
    1655116528
    16552     int rc  = hmR0VmxReadExitQualVmcs(pVCpu, pVmxTransient);
     16529    int rc  = hmR0VmxReadExitQualVmcs(pVmxTransient);
    1655316530    rc     |= hmR0VmxReadExitInstrLenVmcs(pVmxTransient);
    1655416531    AssertRCReturn(rc, rc);
    … …  
    1666516642            if (fMemOperand)
    1666616643            {
    16667                 rc = hmR0VmxReadGuestLinearAddrVmcs(pVCpu, pVmxTransient);
     16644                rc = hmR0VmxReadGuestLinearAddrVmcs(pVmxTransient);
    1666816645                AssertRCReturn(rc, rc);
    1666916646                GCPtrEffDst = pVmxTransient->uGuestLinearAddr;
    … …  
    1671316690    if (CPUMIsGuestVmxProcCtlsSet(pVCpu, &pVCpu->cpum.GstCtx, VMX_PROC_CTLS_MOV_DR_EXIT))
    1671416691    {
    16715         int rc = hmR0VmxReadExitQualVmcs(pVCpu, pVmxTransient);
     16692        int rc = hmR0VmxReadExitQualVmcs(pVmxTransient);
    1671616693        rc    |= hmR0VmxReadExitInstrLenVmcs(pVmxTransient);
    1671716694        AssertRCReturn(rc, rc);
    … …  
    1673616713    HMVMX_VALIDATE_NESTED_EXIT_HANDLER_PARAMS(pVCpu, pVmxTransient);
    1673716714
    16738     int rc = hmR0VmxReadExitQualVmcs(pVCpu, pVmxTransient);
     16715    int rc = hmR0VmxReadExitQualVmcs(pVmxTransient);
    1673916716    AssertRCReturn(rc, rc);
    1674016717
    … …  
    1676816745        if (fIOString)
    1676916746        {
    16770             rc |= hmR0VmxReadGuestLinearAddrVmcs(pVCpu, pVmxTransient);
     16747            rc |= hmR0VmxReadGuestLinearAddrVmcs(pVmxTransient);
    1677116748            if (fVmxInsOutsInfo)
    1677216749            {
    … …  
    1693416911
    1693516912    Assert(CPUMIsGuestVmxProcCtls2Set(pVCpu, &pVCpu->cpum.GstCtx, VMX_PROC_CTLS2_VIRT_APIC_ACCESS));
    16936     rc = hmR0VmxReadExitQualVmcs(pVCpu, pVmxTransient);
     16913    rc = hmR0VmxReadExitQualVmcs(pVmxTransient);
    1693716914    AssertRCReturn(rc, rc);
    1693816915
    … …  
    1696016937
    1696116938    Assert(CPUMIsGuestVmxProcCtls2Set(pVCpu, &pVCpu->cpum.GstCtx, VMX_PROC_CTLS2_APIC_REG_VIRT));
    16962     int rc = hmR0VmxReadExitQualVmcs(pVCpu, pVmxTransient);
     16939    int rc = hmR0VmxReadExitQualVmcs(pVmxTransient);
    1696316940    AssertRCReturn(rc, rc);
    1696416941
    … …  
    1697616953
    1697716954    Assert(CPUMIsGuestVmxProcCtls2Set(pVCpu, &pVCpu->cpum.GstCtx, VMX_PROC_CTLS2_VIRT_INT_DELIVERY));
    16978     int rc = hmR0VmxReadExitQualVmcs(pVCpu, pVmxTransient);
     16955    int rc = hmR0VmxReadExitQualVmcs(pVmxTransient);
    1697916956    AssertRCReturn(rc, rc);
    1698016957
    … …  
    1702917006        Assert(CPUMIsGuestVmxProcCtls2Set(pVCpu, &pVCpu->cpum.GstCtx, VMX_PROC_CTLS2_INVPCID));
    1703017007        int rc  = hmR0VmxReadExitInstrLenVmcs(pVmxTransient);
    17031         rc     |= hmR0VmxReadExitQualVmcs(pVCpu, pVmxTransient);
     17008        rc     |= hmR0VmxReadExitQualVmcs(pVmxTransient);
    1703217009        rc     |= hmR0VmxReadExitInstrInfoVmcs(pVmxTransient);
    1703317010        AssertRCReturn(rc, rc);
    … …  
    1713717114
    1713817115    int rc  = hmR0VmxReadExitInstrLenVmcs(pVmxTransient);
    17139     rc     |= hmR0VmxReadExitQualVmcs(pVCpu, pVmxTransient);
     17116    rc     |= hmR0VmxReadExitQualVmcs(pVmxTransient);
    1714017117    rc     |= hmR0VmxReadExitInstrInfoVmcs(pVmxTransient);
    1714117118    AssertRCReturn(rc, rc);
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