VirtualBox

Changeset 80172 in vbox for trunk/src


Ignore:
Timestamp:
Aug 7, 2019 8:48:20 AM (5 years ago)
Author:
vboxsync
Message:

VMM: Kicking out raw-mode - PGMAll*.cpp, PGMInline.h, PGMInternal.h. bugref:9517

Location:
trunk/src/VBox/VMM
Files:
6 edited

Legend:

Unmodified
Added
Removed
  • trunk/src/VBox/VMM/VMMAll/PGMAllBth.h

    r80167 r80172  
    764764            return rc;
    765765        }
    766 
    767 #   if defined(LOG_ENABLED) && 0
    768         RTGCPHYS   GCPhys2;
    769         uint64_t   fPageGst2;
    770         PGMGstGetPage(pVCpu, pvFault, &fPageGst2, &GCPhys2);
    771 #    if PGM_WITH_PAGING(PGM_GST_TYPE, PGM_SHW_TYPE)
    772         Log(("Page out of sync: %RGv eip=%08x PdeSrc.US=%d fPageGst2=%08llx GCPhys2=%RGp scan=%d\n",
    773              pvFault, pRegFrame->eip, GstWalk.Pde.n.u1User, fPageGst2, GCPhys2, CSAMDoesPageNeedScanning(pVM, pRegFrame->eip)));
    774 #    else
    775         Log(("Page out of sync: %RGv eip=%08x fPageGst2=%08llx GCPhys2=%RGp scan=%d\n",
    776              pvFault, pRegFrame->eip, fPageGst2, GCPhys2, CSAMDoesPageNeedScanning(pVM, pRegFrame->eip)));
    777 #    endif
    778 #   endif /* LOG_ENABLED */
    779766
    780767#   if PGM_WITH_PAGING(PGM_GST_TYPE, PGM_SHW_TYPE)
     
    27492736                    if (PteSrc.n.u1Present)
    27502737                    {
    2751 # ifdef VBOX_WITH_RAW_MODE_NOT_R0
    2752                         /*
    2753                          * Assuming kernel code will be marked as supervisor - and not as user level
    2754                          * and executed using a conforming code selector - And marked as readonly.
    2755                          * Also assume that if we're monitoring a page, it's of no interest to CSAM.
    2756                          */
    2757                         PPGMPAGE pPage;
    2758                         if (    ((PdeSrc.u & pPTSrc->a[iPTSrc].u) & (X86_PTE_RW | X86_PTE_US))
    2759                             ||  !CSAMDoesPageNeedScanning(pVM, GCPtrCur)
    2760                             ||  (   (pPage = pgmPhysGetPage(pVM, GST_GET_PTE_GCPHYS(PteSrc)))
    2761                                  &&  PGM_PAGE_HAS_ACTIVE_HANDLERS(pPage))
    2762                            )
    2763 # endif
    2764                             PGM_BTH_NAME(SyncPageWorker)(pVCpu, &pPTDst->a[iPTDst], PdeSrc, PteSrc, pShwPage, iPTDst);
     2738                        PGM_BTH_NAME(SyncPageWorker)(pVCpu, &pPTDst->a[iPTDst], PdeSrc, PteSrc, pShwPage, iPTDst);
    27652739                        Log2(("SyncPT:   4K+ %RGv PteSrc:{P=%d RW=%d U=%d raw=%08llx}%s dst.raw=%08llx iPTSrc=%x PdeSrc.u=%x physpte=%RGp\n",
    27662740                              GCPtrCur,
     
    33333307    && !PGM_TYPE_IS_NESTED_OR_EPT(PGM_SHW_TYPE) \
    33343308    && PGM_SHW_TYPE != PGM_TYPE_NONE
    3335 
    3336 # ifdef VBOX_WITH_RAW_MODE_NOT_R0
    3337     if (!(fPage & X86_PTE_US))
    3338     {
    3339         /*
    3340          * Mark this page as safe.
    3341          */
    3342         /** @todo not correct for pages that contain both code and data!! */
    3343         Log(("CSAMMarkPage %RGv; scanned=%d\n", GCPtrPage, true));
    3344         CSAMMarkPage(pVM, GCPtrPage, true);
    3345     }
    3346 # endif
    33473309
    33483310    /*
  • trunk/src/VBox/VMM/VMMAll/PGMAllHandler.cpp

    r80163 r80172  
    399399                rc = rc2;
    400400
    401 #ifndef IN_RC
    402401            /* Tell NEM about the protection update. */
    403402            if (VM_IS_NEM_ENABLED(pVM))
     
    409408                PGM_PAGE_SET_NEM_STATE(pPage, u2State);
    410409            }
    411 #endif
    412410        }
    413411
     
    627625#endif
    628626    /** @todo do we need this notification? */
    629 #if defined(IN_RING3) || defined(IN_RING0)
    630627    NEMHCNotifyHandlerPhysicalDeregister(pVM, pCurType->enmKind, GCPhysStart, GCPhysLast - GCPhysStart + 1,
    631628                                         fRestoreAsRAM, fRestoreAsRAM2);
    632 #else
    633     RT_NOREF_PV(fRestoreAsRAM); /** @todo this needs more work for REM! */
    634     RT_NOREF_PV(fRestoreAsRAM2);
    635 #endif
    636629}
    637630
     
    685678                AssertRC(rc);
    686679
    687 #ifndef IN_RC
    688680            /* Tell NEM about the protection update. */
    689681            if (VM_IS_NEM_ENABLED(pVM))
     
    695687                PGM_PAGE_SET_NEM_STATE(pPage, u2State);
    696688            }
    697 #endif
    698689        }
    699690        else
     
    718709           || PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_SPECIAL_ALIAS_MMIO);
    719710    Assert(PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) == PGM_PAGE_HNDL_PHYS_STATE_DISABLED);
    720 #ifndef IN_RC
    721711    RTHCPHYS const HCPhysPrev = PGM_PAGE_GET_HCPHYS(pPage);
    722 #endif
    723712
    724713    /*
     
    728717    int rc = pgmPoolTrackUpdateGCPhys(pVM, GCPhysPage, pPage, true /*fFlushPTEs*/, &fFlushTLBs);
    729718    AssertLogRelRCReturnVoid(rc);
    730 #ifdef IN_RC
    731     if (fFlushTLBs && rc != VINF_PGM_SYNC_CR3)
    732         PGM_INVL_VCPU_TLBS(VMMGetCpu0(pVM));
    733 #else
    734719    HMFlushTlbOnAllVCpus(pVM);
    735 #endif
    736720
    737721    /*
     
    762746    }
    763747
    764 #ifndef IN_RC
    765748    /*
    766749     * Tell NEM about the protection change.
     
    773756        PGM_PAGE_SET_NEM_STATE(pPage, u2State);
    774757    }
    775 #endif
    776758}
    777759
     
    820802            PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, PGM_PAGE_HNDL_PHYS_STATE_NONE);
    821803
    822 #ifndef IN_RC
    823804            /* Tell NEM about the protection change. */
    824805            if (VM_IS_NEM_ENABLED(pVM) && !fNemNotifiedAlready)
     
    830811                PGM_PAGE_SET_NEM_STATE(pPage, u2State);
    831812            }
    832 #else
    833             RT_NOREF_PV(fNemNotifiedAlready);
    834 #endif
    835813        }
    836814        else
     
    883861         */
    884862        pgmHandlerPhysicalResetRamFlags(pVM, pCur);
    885 #if defined(VBOX_WITH_REM) || defined(IN_RING3) || defined(IN_RING0)
    886863        PPGMPHYSHANDLERTYPEINT const pCurType      = PGMPHYSHANDLER_GET_TYPE(pVM, pCur);
    887864        bool const                   fRestoreAsRAM = pCurType->pfnHandlerR3 /** @todo this isn't entirely correct. */
    888865                                                  && pCurType->enmKind != PGMPHYSHANDLERKIND_MMIO;
    889 #endif
    890866
    891867        /*
     
    909885                if (RTAvlroGCPhysInsert(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, &pCur->Core))
    910886                {
    911 #if defined(VBOX_WITH_REM) || defined(IN_RING3) || defined(IN_RING0)
    912887                    RTGCPHYS            const cb            = GCPhysLast - GCPhys + 1;
    913888                    PGMPHYSHANDLERKIND  const enmKind       = pCurType->enmKind;
    914 #endif
    915889#ifdef VBOX_WITH_REM
    916890                    bool                const fHasHCHandler = !!pCurType->pfnHandlerR3;
     
    923897
    924898                    /** @todo NEM: not sure we need this notification... */
    925 #if defined(IN_RING3) || defined(IN_RING0)
    926899                    NEMHCNotifyHandlerPhysicalModify(pVM, enmKind, GCPhysCurrent, GCPhys, cb, fRestoreAsRAM);
    927 #endif
    928900
    929901                    pgmUnlock(pVM);
     
    13231295                PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, PGM_PAGE_HNDL_PHYS_STATE_DISABLED);
    13241296                pCur->cTmpOffPages++;
    1325 #ifndef IN_RC
     1297
    13261298                /* Tell NEM about the protection change (VGA is using this to track dirty pages). */
    13271299                if (VM_IS_NEM_ENABLED(pVM))
     
    13331305                    PGM_PAGE_SET_NEM_STATE(pPage, u2State);
    13341306                }
    1335 #endif
    13361307            }
    13371308            pgmUnlock(pVM);
     
    14601431            pgmPhysInvalidatePageMapTLBEntry(pVM, GCPhysPage);
    14611432
    1462 # ifndef IN_RC
    14631433            /* Tell NEM about the backing and protection change. */
    14641434            if (VM_IS_NEM_ENABLED(pVM))
     
    14701440                PGM_PAGE_SET_NEM_STATE(pPage, u2State);
    14711441            }
    1472 # endif
    14731442            LogFlow(("PGMHandlerPhysicalPageAlias: => %R[pgmpage]\n", pPage));
    14741443            pgmUnlock(pVM);
     
    15721541            pgmPhysInvalidatePageMapTLBEntry(pVM, GCPhysPage);
    15731542
    1574 # ifndef IN_RC
    15751543            /* Tell NEM about the backing and protection change. */
    15761544            if (VM_IS_NEM_ENABLED(pVM))
     
    15821550                PGM_PAGE_SET_NEM_STATE(pPage, u2State);
    15831551            }
    1584 # endif
    15851552            LogFlow(("PGMHandlerPhysicalPageAliasHC: => %R[pgmpage]\n", pPage));
    15861553            pgmUnlock(pVM);
  • trunk/src/VBox/VMM/VMMAll/PGMAllMap.cpp

    r80118 r80172  
    441441    /* This only applies to raw mode where we only support 1 VCPU. */
    442442    PVMCPU pVCpu = VMMGetCpu0(pVM);
    443 # ifdef IN_RC
    444     Assert(pShwPageCR3 != pVCpu->pgm.s.CTX_SUFF(pShwPageCR3));
    445 # endif
     443# error fixme
    446444
    447445    PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool);
  • trunk/src/VBox/VMM/VMMAll/PGMAllPhys.cpp

    r80163 r80172  
    6868    (   (a_rcStrict) == VINF_SUCCESS \
    6969     || (a_rcStrict) == VINF_PGM_HANDLER_DO_DEFAULT)
    70 #elif defined(IN_RING0) || defined(IN_RC)
     70#elif defined(IN_RING0)
    7171#define PGM_HANDLER_PHYS_IS_VALID_STATUS(a_rcStrict, a_fWrite) \
    7272    (   (a_rcStrict) == VINF_SUCCESS \
     
    110110# define PGM_HANDLER_VIRT_IS_VALID_STATUS(a_rcStrict, a_fWrite) \
    111111    (false /* no virtual handlers in ring-0! */ )
    112 #elif defined(IN_RC)
    113 # define PGM_HANDLER_VIRT_IS_VALID_STATUS(a_rcStrict, a_fWrite) \
    114     (   (a_rcStrict) == VINF_SUCCESS \
    115      || (a_rcStrict) == VINF_PGM_HANDLER_DO_DEFAULT \
    116      \
    117      || ((a_fWrite) ? (a_rcStrict) == VINF_EM_RAW_EMULATE_INSTR_GDT_FAULT : 0) \
    118      || ((a_fWrite) ? (a_rcStrict) == VINF_EM_RAW_EMULATE_INSTR_LDT_FAULT : 0) \
    119      || ((a_fWrite) ? (a_rcStrict) == VINF_EM_RAW_EMULATE_INSTR_TSS_FAULT : 0) \
    120      || ((a_fWrite) ? (a_rcStrict) == VINF_EM_RAW_EMULATE_INSTR_IDT_FAULT : 0) \
    121      || ((a_fWrite) ? (a_rcStrict) == VINF_SELM_SYNC_GDT                  : 0) \
    122      || ((a_fWrite) ? (a_rcStrict) == VINF_CSAM_PENDING_ACTION            : 0) \
    123      || (a_rcStrict) == VINF_PATM_CHECK_PATCH_PAGE \
    124      \
    125      || (a_rcStrict) == VINF_EM_RAW_EMULATE_INSTR \
    126      || (a_rcStrict) == VINF_EM_DBG_STOP \
    127      || (a_rcStrict) == VINF_EM_DBG_EVENT \
    128      || (a_rcStrict) == VINF_EM_DBG_BREAKPOINT \
    129     )
    130112#else
    131113# error "Context?"
     
    880862        PGM_INVL_ALL_VCPU_TLBS(pVM);
    881863
    882 #ifndef IN_RC
    883864    /*
    884865     * Notify NEM about the mapping change for this page.
     
    902883        }
    903884    }
    904 #endif
    905885
    906886    return rc;
     
    10911071    pVM->pgm.s.cWrittenToPages++;
    10921072
    1093 #ifndef IN_RC
    10941073    /*
    10951074     * Notify NEM about the protection change so we won't spin forever.
     
    11061085        PGM_PAGE_SET_NEM_STATE(pPage, u2State);
    11071086    }
    1108 #else
    1109     RT_NOREF(GCPhys);
    1110 #endif
    11111087}
    11121088
     
    11821158    AssertReturn(idChunk != NIL_GMM_CHUNKID, VERR_INVALID_PARAMETER);
    11831159
    1184 #if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
     1160#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0
    11851161    /*
    11861162     * Map it by HCPhys.
     
    12571233    NOREF(GCPhys);
    12581234
    1259 #if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
     1235#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0
    12601236    /*
    12611237     * Just some sketchy GC/R0-darwin code.
     
    12671243    return VINF_SUCCESS;
    12681244
    1269 #else /* IN_RING3 || IN_RING0 */
     1245#else /* !VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0 */
    12701246
    12711247
     
    13381314        else
    13391315        {
    1340 #ifdef IN_RING0
     1316# ifdef IN_RING0
    13411317            int rc = VMMRZCallRing3NoCpu(pVM, VMMCALLRING3_PGM_MAP_CHUNK, idChunk);
    13421318            AssertRCReturn(rc, rc);
    13431319            pMap = (PPGMCHUNKR3MAP)RTAvlU32Get(&pVM->pgm.s.ChunkR3Map.pTree, idChunk);
    13441320            Assert(pMap);
    1345 #else
     1321# else
    13461322            int rc = pgmR3PhysChunkMap(pVM, idChunk, &pMap);
    13471323            if (RT_FAILURE(rc))
    13481324                return rc;
    1349 #endif
     1325# endif
    13501326            AssertPtr(pMap->pv);
    13511327        }
     
    13611337    *ppMap = pMap;
    13621338    return VINF_SUCCESS;
    1363 #endif /* IN_RING3 */
     1339#endif /* !VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0 */
    13641340}
    13651341
     
    14551431}
    14561432
    1457 #if !defined(IN_RC) && !defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
     1433#ifndef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0
    14581434
    14591435/**
     
    15251501        pTlbe->pv = pVM->pgm.s.CTXALLSUFF(pvZeroPg);
    15261502    }
    1527 #ifdef PGM_WITH_PHYS_TLB
     1503# ifdef PGM_WITH_PHYS_TLB
    15281504    if (    PGM_PAGE_GET_TYPE(pPage) < PGMPAGETYPE_ROM_SHADOW
    15291505        ||  PGM_PAGE_GET_TYPE(pPage) > PGMPAGETYPE_ROM)
     
    15311507    else
    15321508        pTlbe->GCPhys = NIL_RTGCPHYS; /* ROM: Problematic because of the two pages. :-/ */
    1533 #else
     1509# else
    15341510    pTlbe->GCPhys = NIL_RTGCPHYS;
    1535 #endif
     1511# endif
    15361512    pTlbe->pPage = pPage;
    15371513    return VINF_SUCCESS;
    15381514}
    15391515
    1540 #endif /* !IN_RC && !VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0 */
     1516#endif /* !VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0 */
    15411517
    15421518/**
     
    15791555     * Get the mapping address.
    15801556     */
    1581 #if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
     1557#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0
    15821558    void *pv;
    15831559    rc = pgmRZDynMapHCPageInlined(VMMGetCpu(pVM),
     
    15981574}
    15991575
    1600 #if !defined(IN_RC) && !defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
     1576#ifndef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0
    16011577
    16021578/**
     
    16661642}
    16671643
    1668 #endif /* !IN_RC && !VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0 */
     1644#endif /* !VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0 */
    16691645
    16701646
     
    17081684     * Do the job.
    17091685     */
    1710 #if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
     1686#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0
    17111687    void *pv;
    17121688    PVMCPU pVCpu = VMMGetCpu(pVM);
     
    17601736     * Do the job.
    17611737     */
    1762 #if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
     1738#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0
    17631739    void *pv;
    17641740    PVMCPU pVCpu = VMMGetCpu(pVM);
     
    18231799    AssertRCReturn(rc, rc);
    18241800
    1825 #if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
     1801#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0
    18261802    /*
    18271803     * Find the page and make sure it's writable.
     
    18551831    }
    18561832
    1857 #else  /* IN_RING3 || IN_RING0 */
     1833#else  /* !VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0 */
    18581834    /*
    18591835     * Query the Physical TLB entry for the page (may fail).
     
    18871863    }
    18881864
    1889 #endif /* IN_RING3 || IN_RING0 */
     1865#endif /* !VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0 */
    18901866    pgmUnlock(pVM);
    18911867    return rc;
     
    19261902    AssertRCReturn(rc, rc);
    19271903
    1928 #if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
     1904#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0
    19291905    /*
    19301906     * Find the page and make sure it's readable.
     
    19561932    }
    19571933
    1958 #else  /* IN_RING3 || IN_RING0 */
     1934#else  /* !VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0 */
    19591935    /*
    19601936     * Query the Physical TLB entry for the page (may fail).
     
    19781954    }
    19791955
    1980 #endif /* IN_RING3 || IN_RING0 */
     1956#endif /* !VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0 */
    19811957    pgmUnlock(pVM);
    19821958    return rc;
     
    20692045VMMDECL(void) PGMPhysReleasePageMappingLock(PVM pVM, PPGMPAGEMAPLOCK pLock)
    20702046{
    2071 #if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
     2047#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0
    20722048    Assert(pLock->pvPage != NULL);
    20732049    Assert(pLock->pVCpu == VMMGetCpu(pVM)); RT_NOREF_PV(pVM);
     
    21252101    }
    21262102    pgmUnlock(pVM);
    2127 #endif /* IN_RING3 */
     2103#endif /* !VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0 */
    21282104}
    21292105
     
    22792255
    22802256    Log(("pgmPhysGCPhys2R3Ptr(,%RGp,): dont use this API!\n", GCPhys)); /** @todo eliminate this API! */
    2281 #if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
     2257#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0
    22822258    NOREF(pVM); NOREF(pR3Ptr); RT_NOREF_PV(GCPhys);
    22832259    AssertFailedReturn(VERR_NOT_IMPLEMENTED);
     
    22972273}
    22982274
    2299 #if 0 /*defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)*/
     2275#if 0 /*def VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0 */
    23002276
    23012277/**
     
    42474223 */
    42484224VMM_INT_DECL(int) PGMPhysIemGCPhys2PtrNoLock(PVM pVM, PVMCPU pVCpu, RTGCPHYS GCPhys, uint64_t const volatile *puTlbPhysRev,
    4249 #if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
     4225#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0
    42504226                                             R3PTRTYPE(uint8_t *) *ppb,
    42514227#else
     
    42874263                            break;
    42884264                    }
    4289 #if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
     4265#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0
    42904266                    *pfTlb |= PGMIEMGCPHYS2PTR_F_NO_MAPPINGR3;
    42914267                    *ppb = NULL;
     
    43284304                                break;
    43294305                        }
    4330 #if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
     4306#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0
    43314307                    *pfTlb |= PGMIEMGCPHYS2PTR_F_NO_MAPPINGR3;
    43324308                    *ppb = NULL;
     
    44464422                }
    44474423
    4448 #if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
     4424#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0
    44494425            void *pv;
    44504426            rc = pgmRZDynMapHCPageInlined(pVCpu,
     
    45464522}
    45474523
    4548 #ifndef IN_RC
    45494524
    45504525/**
     
    46914666}
    46924667
    4693 #endif /* !IN_RC */
    4694 
  • trunk/src/VBox/VMM/include/PGMInline.h

    r80163 r80172  
    3636#include <VBox/vmm/gmm.h>
    3737#include <VBox/vmm/hm.h>
    38 #ifndef IN_RC
    39 # include <VBox/vmm/nem.h>
    40 #endif
     38#include <VBox/vmm/nem.h>
    4139#include <iprt/asm.h>
    4240#include <iprt/assert.h>
     
    221219}
    222220
    223 #if defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0) || defined(IN_RC)
     221#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0
    224222
    225223/**
     
    402400}
    403401
    404 #endif /* VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0 */
    405 #if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
    406402
    407403/**
     
    448444}
    449445
    450 #endif /*  VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0 || IN_RC */
    451 #ifndef IN_RC
     446#endif /*  VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0 */
    452447
    453448/**
     
    501496        STAM_COUNTER_INC(&pVM->pgm.s.CTX_SUFF(pStats)->CTX_MID_Z(Stat,PageMapTlbHits));
    502497        rc = VINF_SUCCESS;
    503 # if 0 //def VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0
    504 #  ifdef IN_RING3
     498#if 0 //def VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0
     499# ifdef IN_RING3
    505500        if (pTlbe->pv == (void *)pVM->pgm.s.pvZeroPgR0)
    506 #  else
     501# else
    507502        if (pTlbe->pv == (void *)pVM->pgm.s.pvZeroPgR3)
    508 #  endif
     503# endif
    509504            pTlbe->pv = pVM->pgm.s.CTX_SUFF(pvZeroPg);
    510 # endif
     505#endif
    511506        AssertPtr(pTlbe->pv);
    512 # ifndef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0
     507#ifndef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0
    513508        Assert(!pTlbe->pMap || RT_VALID_PTR(pTlbe->pMap->pv));
    514 # endif
     509#endif
    515510    }
    516511    else
     
    553548}
    554549
    555 #endif /* !IN_RC */
    556550
    557551/**
     
    586580    }
    587581
    588 #ifndef IN_RC
    589582    /* Tell NEM. */
    590583    if (VM_IS_NEM_ENABLED(pVM))
     
    596589        PGM_PAGE_SET_NEM_STATE(pPage, u2State);
    597590    }
    598 #endif
    599591}
    600592
     
    870862}
    871863
    872 #ifndef IN_RC
    873864
    874865/**
     
    10361027}
    10371028
    1038 #endif /* !IN_RC */
    10391029
    10401030/**
     
    11831173}
    11841174
    1185 #ifndef IN_RC
    11861175
    11871176/**
     
    12331222}
    12341223
    1235 #endif /* !IN_RC */
    12361224
    12371225/**
     
    12881276     * Just deal with the simple case here.
    12891277     */
    1290 # ifdef VBOX_STRICT
     1278#ifdef VBOX_STRICT
    12911279    PVM pVM = pPool->CTX_SUFF(pVM); NOREF(pVM);
    1292 # endif
    1293 # ifdef LOG_ENABLED
     1280#endif
     1281#ifdef LOG_ENABLED
    12941282    const unsigned uOrg = PGM_PAGE_GET_TRACKING(pPhysPage);
    1295 # endif
     1283#endif
    12961284    const unsigned cRefs = PGM_PAGE_GET_TD_CREFS(pPhysPage);
    12971285    if (cRefs == 1)
  • trunk/src/VBox/VMM/include/PGMInternal.h

    r80167 r80172  
    9292 */
    9393//#if 0 /* disabled again while debugging */
    94 #ifndef IN_RC
    95 # define PGMPOOL_WITH_OPTIMIZED_DIRTY_PT
    96 #endif
     94#define PGMPOOL_WITH_OPTIMIZED_DIRTY_PT
    9795//#endif
    9896
     
    10098 * Large page support enabled only on 64 bits hosts; applies to nested paging only.
    10199 */
    102 #if (HC_ARCH_BITS == 64) && !defined(IN_RC)
    103 # define PGM_WITH_LARGE_PAGES
    104 #endif
     100#define PGM_WITH_LARGE_PAGES
    105101
    106102/**
     
    108104 * VMX_EXIT_EPT_MISCONFIG.
    109105 */
    110 #if 1 /* testing */
    111 # define PGM_WITH_MMIO_OPTIMIZATIONS
    112 #endif
     106#define PGM_WITH_MMIO_OPTIMIZATIONS
    113107
    114108/**
     
    131125 * but ~5% fewer faults.
    132126 */
    133 # define PGM_SYNC_NR_PAGES               32
     127# define PGM_SYNC_NR_PAGES              32
    134128#else
    135 # define PGM_SYNC_NR_PAGES               8
     129# define PGM_SYNC_NR_PAGES              8
    136130#endif
    137131
     
    276270 * @remark  There is no need to assert on the result.
    277271 */
    278 #if defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0) || defined(IN_RC)
     272#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0
    279273# define PGM_HCPHYS_2_PTR(pVM, pVCpu, HCPhys, ppv) \
    280274     pgmRZDynMapHCPageInlined(pVCpu, HCPhys, (void **)(ppv) RTLOG_COMMA_SRC_POS)
     
    297291 * @remark  There is no need to assert on the result.
    298292 */
    299 #if defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0) || defined(IN_RC)
     293#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0
    300294# define PGM_GCPHYS_2_PTR_V2(pVM, pVCpu, GCPhys, ppv) \
    301295     pgmRZDynMapGCPageV2Inlined(pVM, pVCpu, GCPhys, (void **)(ppv) RTLOG_COMMA_SRC_POS)
     
    345339 * @remark  There is no need to assert on the result.
    346340 */
    347 #if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
     341#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0
    348342# define PGM_GCPHYS_2_PTR_EX(pVM, GCPhys, ppv) \
    349343     pgmRZDynMapGCPageOffInlined(VMMGetCpu(pVM), GCPhys, (void **)(ppv) RTLOG_COMMA_SRC_POS)
     
    362356 * @param   pvPage  The pool page.
    363357 */
    364 #if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
     358#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0
    365359# ifdef LOG_ENABLED
    366360#  define PGM_DYNMAP_UNUSED_HINT(pVCpu, pvPage)  pgmRZDynMapUnusedHint(pVCpu, pvPage, RT_SRC_POS)
     
    390384 * @param   GCVirt      The virtual address of the page to invalidate.
    391385 */
    392 #ifdef IN_RC
    393 # define PGM_INVL_PG(pVCpu, GCVirt)             ASMInvalidatePage((uintptr_t)(GCVirt))
    394 #elif defined(IN_RING0)
     386#ifdef IN_RING0
     387# define PGM_INVL_PG(pVCpu, GCVirt)             HMInvalidatePage(pVCpu, (RTGCPTR)(GCVirt))
     388#elif defined(IN_RING3)
    395389# define PGM_INVL_PG(pVCpu, GCVirt)             HMInvalidatePage(pVCpu, (RTGCPTR)(GCVirt))
    396390#else
    397 # define PGM_INVL_PG(pVCpu, GCVirt)             HMInvalidatePage(pVCpu, (RTGCPTR)(GCVirt))
     391# error "Not IN_RING0 or IN_RING3!"
    398392#endif
    399393
     
    404398 * @param   GCVirt      The virtual address of the page to invalidate.
    405399 */
    406 #ifdef IN_RC
    407 # define PGM_INVL_PG_ALL_VCPU(pVM, GCVirt)      ASMInvalidatePage((uintptr_t)(GCVirt))
    408 #elif defined(IN_RING0)
     400#ifdef IN_RING0
    409401# define PGM_INVL_PG_ALL_VCPU(pVM, GCVirt)      HMInvalidatePageOnAllVCpus(pVM, (RTGCPTR)(GCVirt))
    410402#else
     
    418410 * @param   GCVirt      The virtual address within the page directory to invalidate.
    419411 */
    420 #ifdef IN_RC
    421 # define PGM_INVL_BIG_PG(pVCpu, GCVirt)         ASMReloadCR3()
    422 #elif defined(IN_RING0)
     412#ifdef IN_RING0
    423413# define PGM_INVL_BIG_PG(pVCpu, GCVirt)         HMFlushTlb(pVCpu)
    424414#else
     
    431421 * @param   pVCpu       The cross context virtual CPU structure.
    432422 */
    433 #ifdef IN_RC
    434 # define PGM_INVL_VCPU_TLBS(pVCpu)             ASMReloadCR3()
    435 #elif defined(IN_RING0)
     423#ifdef IN_RING0
    436424# define PGM_INVL_VCPU_TLBS(pVCpu)             HMFlushTlb(pVCpu)
    437425#else
     
    444432 * @param   pVM         The cross context VM structure.
    445433 */
    446 #ifdef IN_RC
    447 # define PGM_INVL_ALL_VCPU_TLBS(pVM)            ASMReloadCR3()
    448 #elif defined(IN_RING0)
     434#ifdef IN_RING0
    449435# define PGM_INVL_ALL_VCPU_TLBS(pVM)            HMFlushTlbOnAllVCpus(pVM)
    450436#else
     
    18691855{
    18701856    /** Pointer to the page. */
    1871 #ifndef IN_RC
    18721857    RTR0PTR                     pvPage;
    1873 #else
    1874     RTRCPTR                     pvPage;
    1875 # if HC_ARCH_BITS == 64
    1876     uint32_t                    u32Alignment2;
    1877 # endif
    1878 #endif
    18791858    /** The mapping cache index. */
    18801859    uint16_t                    iPage;
     
    19621941/** @typedef PPPGMPAGEMAP
    19631942 * Pointer to a page mapper unit pointer for current context. */
    1964 #if defined(IN_RC) && !defined(DOXYGEN_RUNNING)
    1965 // typedef PPGMPAGEGCMAPTLB               PPGMPAGEMAPTLB;
    1966 // typedef PPGMPAGEGCMAPTLBE              PPGMPAGEMAPTLBE;
    1967 // typedef PPGMPAGEGCMAPTLBE             *PPPGMPAGEMAPTLBE;
    1968 # define PGM_PAGEMAPTLB_ENTRIES         PGM_PAGEGCMAPTLB_ENTRIES
    1969 # define PGM_PAGEMAPTLB_IDX(GCPhys)     PGM_PAGEGCMAPTLB_IDX(GCPhys)
    1970  typedef void *                         PPGMPAGEMAP;
    1971  typedef void **                        PPPGMPAGEMAP;
    1972 //#elif IN_RING0
     1943#if defined(IN_RING0) && 0
    19731944// typedef PPGMPAGER0MAPTLB               PPGMPAGEMAPTLB;
    19741945// typedef PPGMPAGER0MAPTLBE              PPGMPAGEMAPTLBE;
     
    24752446 * @remark  There is no need to assert on the result.
    24762447 */
    2477 #if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
     2448#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0
    24782449# define PGMPOOL_PAGE_2_PTR(a_pVM, a_pPage)     pgmPoolMapPageInlined((a_pVM), (a_pPage) RTLOG_COMMA_SRC_POS)
    24792450#elif defined(VBOX_STRICT) || 1 /* temporarily going strict here */
     
    25022473 * @remark  There is no need to assert on the result.
    25032474 */
    2504 #if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
     2475#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0
    25052476# define PGMPOOL_PAGE_2_PTR_V2(a_pVM, a_pVCpu, a_pPage)     pgmPoolMapPageV2Inlined((a_pVM), (a_pVCpu), (a_pPage) RTLOG_COMMA_SRC_POS)
    25062477#else
     
    27942765 * @{
    27952766 */
    2796 #ifdef IN_RC
    2797 # define PGM_CTX(a,b)                   a##RC##b
    2798 # define PGM_CTX_STR(a,b)               a "GC" b
    2799 # define PGM_CTX_DECL(type)             VMMRCDECL(type)
     2767#ifdef IN_RING3
     2768# define PGM_CTX(a,b)                   a##R3##b
     2769# define PGM_CTX_STR(a,b)               a "R3" b
     2770# define PGM_CTX_DECL(type)             DECLCALLBACK(type)
     2771#elif defined(IN_RING0)
     2772# define PGM_CTX(a,b)                   a##R0##b
     2773# define PGM_CTX_STR(a,b)               a "R0" b
     2774# define PGM_CTX_DECL(type)             VMMDECL(type)
    28002775#else
    2801 # ifdef IN_RING3
    2802 #  define PGM_CTX(a,b)                   a##R3##b
    2803 #  define PGM_CTX_STR(a,b)               a "R3" b
    2804 #  define PGM_CTX_DECL(type)             DECLCALLBACK(type)
    2805 # else
    2806 #  define PGM_CTX(a,b)                   a##R0##b
    2807 #  define PGM_CTX_STR(a,b)               a "R0" b
    2808 #  define PGM_CTX_DECL(type)             VMMDECL(type)
    2809 # endif
     2776# error "Not IN_RING3 or IN_RING0!"
    28102777#endif
    28112778
     
    29702937
    29712938/** The length of g_aPgmGuestModeData. */
    2972 #if defined(VBOX_WITH_64_BITS_GUESTS) && !defined(IN_RC)
     2939#ifdef VBOX_WITH_64_BITS_GUESTS
    29732940# define PGM_GUEST_MODE_DATA_ARRAY_SIZE     (PGM_TYPE_AMD64 + 1)
    29742941#else
     
    29972964
    29982965/** The length of g_aPgmShadowModeData. */
    2999 #ifndef IN_RC
    3000 # define PGM_SHADOW_MODE_DATA_ARRAY_SIZE    PGM_TYPE_END
    3001 #else
    3002 # define PGM_SHADOW_MODE_DATA_ARRAY_SIZE    (PGM_TYPE_PAE + 1)
    3003 #endif
     2966#define PGM_SHADOW_MODE_DATA_ARRAY_SIZE     PGM_TYPE_END
    30042967/** The shadow mode data array. */
    30052968extern PGMMODEDATASHW const g_aPgmShadowModeData[PGM_SHADOW_MODE_DATA_ARRAY_SIZE];
     
    30322995
    30332996/** The length of g_aPgmBothModeData. */
    3034 #ifndef IN_RC
    3035 # define PGM_BOTH_MODE_DATA_ARRAY_SIZE      ((PGM_TYPE_END     - PGM_TYPE_FIRST_SHADOW) * PGM_TYPE_END)
    3036 #else
    3037 # define PGM_BOTH_MODE_DATA_ARRAY_SIZE      ((PGM_TYPE_PAE + 1 - PGM_TYPE_FIRST_SHADOW) * PGM_TYPE_END)
    3038 #endif
     2997#define PGM_BOTH_MODE_DATA_ARRAY_SIZE       ((PGM_TYPE_END     - PGM_TYPE_FIRST_SHADOW) * PGM_TYPE_END)
    30392998/** The guest+shadow mode data array. */
    30402999extern PGMMODEDATABTH const g_aPgmBothModeData[PGM_BOTH_MODE_DATA_ARRAY_SIZE];
     
    37883747    uint32_t                        uPadding0;      /**< structure size alignment. */
    37893748
    3790 #if defined(VBOX_WITH_2X_4GB_ADDR_SPACE) || defined(VBOX_WITH_RAW_MODE)
     3749#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE
    37913750    /** Automatically tracked physical memory mapping set.
    37923751     * Ring-0 and strict raw-mode builds. */
     
    40353994bool            pgmHandlerPhysicalIsAll(PVM pVM, RTGCPHYS GCPhys);
    40363995void            pgmHandlerPhysicalResetAliasedPage(PVM pVM, PPGMPAGE pPage, RTGCPHYS GCPhysPage, bool fDoAccounting);
    4037 #ifdef VBOX_WITH_RAW_MODE
    4038 PPGMVIRTHANDLER pgmHandlerVirtualFindByPhysAddr(PVM pVM, RTGCPHYS GCPhys, unsigned *piPage);
    4039 DECLCALLBACK(int) pgmHandlerVirtualResetOne(PAVLROGCPTRNODECORE pNode, void *pvUser);
    4040 # if defined(VBOX_STRICT) || defined(LOG_ENABLED)
    4041 void            pgmHandlerVirtualDumpPhysPages(PVM pVM);
    4042 # else
    4043 #  define pgmHandlerVirtualDumpPhysPages(a) do { } while (0)
    4044 # endif
    4045 #endif /* VBOX_WITH_RAW_MODE */
    40463996DECLCALLBACK(void) pgmR3InfoHandlers(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
    40473997int             pgmR3InitSavedState(PVM pVM, uint64_t cbRam);
     
    41014051
    41024052#endif /* IN_RING3 */
    4103 #if defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0) || defined(IN_RC)
     4053#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0
    41044054int             pgmRZDynMapHCPageCommon(PPGMMAPSET pSet, RTHCPHYS HCPhys, void **ppv RTLOG_COMMA_SRC_POS_DECL);
    41054055int             pgmRZDynMapGCPageCommon(PVM pVM, PVMCPU pVCpu, RTGCPHYS GCPhys, void **ppv RTLOG_COMMA_SRC_POS_DECL);
Note: See TracChangeset for help on using the changeset viewer.

© 2024 Oracle Support Privacy / Do Not Sell My Info Terms of Use Trademark Policy Automated Access Etiquette