VirtualBox

Changeset 80346 in vbox for trunk/src/VBox/VMM/VMMAll


Ignore:
Timestamp:
Aug 19, 2019 7:36:29 PM (6 years ago)
Author:
vboxsync
svn:sync-xref-src-repo-rev:
132811
Message:

VMM,PciRaw: Eliminate duplicate PGVM/PVMCC and PGVMCPU/PVMCPUCC parameters in ring-0 code. butref:9217

File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/src/VBox/VMM/VMMAll/NEMAllNativeTemplate-win.cpp.h

    r80334 r80346  
    3636# define NEMWIN_NEED_GET_REGISTER
    3737# if defined(IN_RING0) || defined(NEM_WIN_USE_HYPERCALLS_FOR_REGISTERS)
    38 #  define NEMWIN_ASSERT_MSG_REG_VAL(a_pVCpu, a_pGVCpu, a_enmReg, a_Expr, a_Msg) \
     38#  define NEMWIN_ASSERT_MSG_REG_VAL(a_pVCpu, a_enmReg, a_Expr, a_Msg) \
    3939    do { \
    4040        HV_REGISTER_VALUE TmpVal; \
    41         nemHCWinGetRegister(a_pVCpu, a_pGVCpu, a_enmReg, &TmpVal); \
     41        nemHCWinGetRegister(a_pVCpu, a_enmReg, &TmpVal); \
    4242        AssertMsg(a_Expr, a_Msg); \
    4343    } while (0)
    4444# else
    45 #  define NEMWIN_ASSERT_MSG_REG_VAL(a_pVCpu, a_pGVCpu, a_enmReg, a_Expr, a_Msg) \
     45#  define NEMWIN_ASSERT_MSG_REG_VAL(a_pVCpu, a_enmReg, a_Expr, a_Msg) \
    4646    do { \
    4747        WHV_REGISTER_VALUE TmpVal; \
     
    5151# endif
    5252#else
    53 # define NEMWIN_ASSERT_MSG_REG_VAL(a_pVCpu, a_pGVCpu, a_enmReg, a_Expr, a_Msg) do { } while (0)
     53# define NEMWIN_ASSERT_MSG_REG_VAL(a_pVCpu, a_enmReg, a_Expr, a_Msg) do { } while (0)
    5454#endif
    5555
     
    5757 * Asserts the correctness of a 64-bit register value in a message/context.
    5858 */
    59 #define NEMWIN_ASSERT_MSG_REG_VAL64(a_pVCpu, a_pGVCpu, a_enmReg, a_u64Val) \
    60     NEMWIN_ASSERT_MSG_REG_VAL(a_pVCpu, a_pGVCpu, a_enmReg, (a_u64Val) == TmpVal.Reg64, \
     59#define NEMWIN_ASSERT_MSG_REG_VAL64(a_pVCpu, a_enmReg, a_u64Val) \
     60    NEMWIN_ASSERT_MSG_REG_VAL(a_pVCpu, a_enmReg, (a_u64Val) == TmpVal.Reg64, \
    6161                              (#a_u64Val "=%#RX64, expected %#RX64\n", (a_u64Val), TmpVal.Reg64))
    6262/** @def NEMWIN_ASSERT_MSG_REG_VAL
    6363 * Asserts the correctness of a segment register value in a message/context.
    6464 */
    65 #define NEMWIN_ASSERT_MSG_REG_SEG(a_pVCpu, a_pGVCpu, a_enmReg, a_SReg) \
    66     NEMWIN_ASSERT_MSG_REG_VAL(a_pVCpu, a_pGVCpu, a_enmReg, \
     65#define NEMWIN_ASSERT_MSG_REG_SEG(a_pVCpu, a_enmReg, a_SReg) \
     66    NEMWIN_ASSERT_MSG_REG_VAL(a_pVCpu, a_enmReg, \
    6767                                 (a_SReg).Base       == TmpVal.Segment.Base \
    6868                              && (a_SReg).Limit      == TmpVal.Segment.Limit \
     
    109109#ifdef IN_RING0
    110110    /** @todo optimize further, caller generally has the physical address. */
    111     PGVM pGVM = GVMMR0FastGetGVMByVM(pVM);
    112     AssertReturn(pGVM, VERR_INVALID_VM_HANDLE);
    113     return nemR0WinMapPages(pGVM, pVM, &pGVM->aCpus[pVCpu->idCpu],
     111    return nemR0WinMapPages(pVM, pVCpu,
    114112                            GCPhysSrc & ~(RTGCPHYS)X86_PAGE_OFFSET_MASK,
    115113                            GCPhysDst & ~(RTGCPHYS)X86_PAGE_OFFSET_MASK,
     
    136134{
    137135# ifdef IN_RING0
    138     PGVM pGVM = GVMMR0FastGetGVMByVM(pVM);
    139     AssertReturn(pGVM, VERR_INVALID_VM_HANDLE);
    140     return nemR0WinUnmapPages(pGVM, &pGVM->aCpus[pVCpu->idCpu], GCPhys & ~(RTGCPHYS)X86_PAGE_OFFSET_MASK, 1);
     136    return nemR0WinUnmapPages(pVM, pVCpu, GCPhys & ~(RTGCPHYS)X86_PAGE_OFFSET_MASK, 1);
    141137# else
    142138    pVCpu->nem.s.Hypercall.UnmapPages.GCPhys    = GCPhys & ~(RTGCPHYS)X86_PAGE_OFFSET_MASK;
     
    398394        ADD_REG64(WHvX64RegisterTscAux, pCtxMsrs->msr.TscAux);
    399395#if 0 /** @todo these registers aren't available? Might explain something.. .*/
    400         const CPUMCPUVENDOR enmCpuVendor = CPUMGetHostCpuVendor(pGVM->pVM);
     396        const CPUMCPUVENDOR enmCpuVendor = CPUMGetHostCpuVendor(pVM);
    401397        if (enmCpuVendor != CPUMCPUVENDOR_AMD)
    402398        {
     
    665661
    666662//#ifdef LOG_ENABLED
    667 //    const CPUMCPUVENDOR enmCpuVendor = CPUMGetHostCpuVendor(pGVM->pVM);
     663//    const CPUMCPUVENDOR enmCpuVendor = CPUMGetHostCpuVendor(pVM);
    668664//#endif
    669665    if (fWhat & CPUMCTX_EXTRN_OTHER_MSRS)
     
    12911287    AssertReturn(g_pfnHvlInvokeHypercall, VERR_NEM_MISSING_KERNEL_API);
    12921288
    1293     pInput->PartitionId = pGVCpu->pGVM->nemr0.s.idHvPartition;
    1294     pInput->VpIndex     = pGVCpu->idCpu;
     1289    pInput->PartitionId = pVCpu->pGVM->nemr0.s.idHvPartition;
     1290    pInput->VpIndex     = pVCpu->idCpu;
    12951291    pInput->fFlags      = 0;
    12961292    pInput->Names[0]    = (HV_REGISTER_NAME)enmReg;
     
    18231819 * @param   pGVM            The global (ring-0) VM structure.
    18241820 * @param   pGVCpu          The global (ring-0) per CPU structure.
     1821 * @param   fWhat           What to import.
     1822 * @param   pszCaller       Who is doing the importing.
     1823 */
     1824DECLINLINE(VBOXSTRICTRC) nemR0WinImportStateStrict(PGVM pGVM, PGVMCPU pGVCpu, uint64_t fWhat, const char *pszCaller)
     1825{
     1826    int rc = nemR0WinImportState(pGVM, pGVCpu, &pGVCpu->cpum.GstCtx, fWhat, true /*fCanUpdateCr3*/);
     1827    if (RT_SUCCESS(rc))
     1828    {
     1829        Assert(rc == VINF_SUCCESS);
     1830        return VINF_SUCCESS;
     1831    }
     1832
     1833    if (rc == VERR_NEM_FLUSH_TLB)
     1834    {
     1835        Log4(("%s/%u: nemR0WinImportState -> %Rrc\n", pszCaller, pGVCpu->idCpu, -rc));
     1836        return -rc;
     1837    }
     1838    RT_NOREF(pszCaller);
     1839    AssertMsgFailedReturn(("%s/%u: nemR0WinImportState failed: %Rrc\n", pszCaller, pGVCpu->idCpu, rc), rc);
     1840}
     1841#endif /* IN_RING0 && NEM_WIN_TEMPLATE_MODE_OWN_RUN_API*/
     1842
     1843#if defined(NEM_WIN_TEMPLATE_MODE_OWN_RUN_API) || defined(IN_RING3)
     1844/**
     1845 * Wrapper around nemR0WinImportStateStrict and nemHCWinCopyStateFromHyperV.
     1846 *
     1847 * Unlike the wrapped APIs, this checks whether it's necessary.
     1848 *
     1849 * @returns VBox strict status code.
    18251850 * @param   pVCpu           The cross context per CPU structure.
    18261851 * @param   fWhat           What to import.
    18271852 * @param   pszCaller       Who is doing the importing.
    18281853 */
    1829 DECLINLINE(VBOXSTRICTRC) nemR0WinImportStateStrict(PGVM pGVM, PGVMCPU pGVCpu, PVMCPUCC pVCpu, uint64_t fWhat, const char *pszCaller)
    1830 {
    1831     int rc = nemR0WinImportState(pGVM, pGVCpu, &pVCpu->cpum.GstCtx, fWhat, true /*fCanUpdateCr3*/);
    1832     if (RT_SUCCESS(rc))
    1833     {
    1834         Assert(rc == VINF_SUCCESS);
    1835         return VINF_SUCCESS;
    1836     }
    1837 
    1838     if (rc == VERR_NEM_FLUSH_TLB)
    1839     {
    1840         Log4(("%s/%u: nemR0WinImportState -> %Rrc\n", pszCaller, pGVCpu->idCpu, -rc));
    1841         return -rc;
    1842     }
    1843     RT_NOREF(pszCaller);
    1844     AssertMsgFailedReturn(("%s/%u: nemR0WinImportState failed: %Rrc\n", pszCaller, pGVCpu->idCpu, rc), rc);
    1845 }
    1846 #endif /* IN_RING0 && NEM_WIN_TEMPLATE_MODE_OWN_RUN_API*/
    1847 
    1848 #if defined(NEM_WIN_TEMPLATE_MODE_OWN_RUN_API) || defined(IN_RING3)
    1849 /**
    1850  * Wrapper around nemR0WinImportStateStrict and nemHCWinCopyStateFromHyperV.
    1851  *
    1852  * Unlike the wrapped APIs, this checks whether it's necessary.
    1853  *
    1854  * @returns VBox strict status code.
    1855  * @param   pGVM            The global (ring-0) VM structure.
    1856  * @param   pGVCpu          The global (ring-0) per CPU structure.
    1857  * @param   fWhat           What to import.
    1858  * @param   pszCaller       Who is doing the importing.
    1859  */
    1860 DECLINLINE(VBOXSTRICTRC) nemHCWinImportStateIfNeededStrict(PVMCPUCC pVCpu, PGVMCPU pGVCpu, uint64_t fWhat, const char *pszCaller)
     1854DECLINLINE(VBOXSTRICTRC) nemHCWinImportStateIfNeededStrict(PVMCPUCC pVCpu, uint64_t fWhat, const char *pszCaller)
    18611855{
    18621856    if (pVCpu->cpum.GstCtx.fExtrn & fWhat)
    18631857    {
    18641858# ifdef IN_RING0
    1865         return nemR0WinImportStateStrict(pGVCpu->pGVM, pGVCpu, pVCpu, fWhat, pszCaller);
     1859        return nemR0WinImportStateStrict(pVCpu->pGVM, pVCpu, fWhat, pszCaller);
    18661860# else
    1867         RT_NOREF(pGVCpu, pszCaller);
     1861        RT_NOREF(pszCaller);
    18681862        int rc = nemHCWinCopyStateFromHyperV(pVCpu->pVMR3, pVCpu, fWhat);
    18691863        AssertRCReturn(rc, rc);
     
    19471941 * @param   pVCpu           The cross context per CPU structure.
    19481942 * @param   pMsg            The message.
    1949  * @param   pGVCpu          The global (ring-0) per CPU structure (NULL in r3).
    19501943 * @sa      nemR3WinHandleExitMemory
    19511944 */
    19521945NEM_TMPL_STATIC VBOXSTRICTRC
    1953 nemHCWinHandleMessageMemory(PVMCC pVM, PVMCPUCC pVCpu, HV_X64_MEMORY_INTERCEPT_MESSAGE const *pMsg, PGVMCPU pGVCpu)
     1946nemHCWinHandleMessageMemory(PVMCC pVM, PVMCPUCC pVCpu, HV_X64_MEMORY_INTERCEPT_MESSAGE const *pMsg)
    19541947{
    19551948    uint64_t const uHostTsc = ASMReadTSC();
     
    20302023    VBOXSTRICTRC rcStrict;
    20312024# ifdef IN_RING0
    2032     rcStrict = nemR0WinImportStateStrict(pGVCpu->pGVM, pGVCpu, pVCpu,
     2025    rcStrict = nemR0WinImportStateStrict(pVM, pVCpu,
    20332026                                         NEM_WIN_CPUMCTX_EXTRN_MASK_FOR_IEM | CPUMCTX_EXTRN_DS | CPUMCTX_EXTRN_ES, "MemExit");
    20342027    if (rcStrict != VINF_SUCCESS)
     
    20372030    rc = nemHCWinCopyStateFromHyperV(pVM, pVCpu, NEM_WIN_CPUMCTX_EXTRN_MASK_FOR_IEM | CPUMCTX_EXTRN_DS | CPUMCTX_EXTRN_ES);
    20382031    AssertRCReturn(rc, rc);
    2039     NOREF(pGVCpu);
    20402032# endif
    20412033
     
    21722164 * @param   pVCpu           The cross context per CPU structure.
    21732165 * @param   pMsg            The message.
    2174  * @param   pGVCpu          The global (ring-0) per CPU structure (NULL in r3).
    21752166 */
    21762167NEM_TMPL_STATIC VBOXSTRICTRC
    2177 nemHCWinHandleMessageIoPort(PVMCC pVM, PVMCPUCC pVCpu, HV_X64_IO_PORT_INTERCEPT_MESSAGE const *pMsg, PGVMCPU pGVCpu)
     2168nemHCWinHandleMessageIoPort(PVMCC pVM, PVMCPUCC pVCpu, HV_X64_IO_PORT_INTERCEPT_MESSAGE const *pMsg)
    21782169{
    21792170    /*
     
    21852176    Assert(   pMsg->Header.InterceptAccessType == HV_INTERCEPT_ACCESS_READ
    21862177           || pMsg->Header.InterceptAccessType == HV_INTERCEPT_ACCESS_WRITE);
    2187     NEMWIN_ASSERT_MSG_REG_SEG(  pVCpu, pGVCpu, HvX64RegisterCs, pMsg->Header.CsSegment);
    2188     NEMWIN_ASSERT_MSG_REG_VAL64(pVCpu, pGVCpu, HvX64RegisterRip, pMsg->Header.Rip);
    2189     NEMWIN_ASSERT_MSG_REG_VAL64(pVCpu, pGVCpu, HvX64RegisterRflags, pMsg->Header.Rflags);
    2190     NEMWIN_ASSERT_MSG_REG_VAL64(pVCpu, pGVCpu, HvX64RegisterCr8, (uint64_t)pMsg->Header.Cr8);
    2191     NEMWIN_ASSERT_MSG_REG_VAL64(pVCpu, pGVCpu, HvX64RegisterRax, pMsg->Rax);
     2178    NEMWIN_ASSERT_MSG_REG_SEG(  pVCpu, HvX64RegisterCs, pMsg->Header.CsSegment);
     2179    NEMWIN_ASSERT_MSG_REG_VAL64(pVCpu, HvX64RegisterRip, pMsg->Header.Rip);
     2180    NEMWIN_ASSERT_MSG_REG_VAL64(pVCpu, HvX64RegisterRflags, pMsg->Header.Rflags);
     2181    NEMWIN_ASSERT_MSG_REG_VAL64(pVCpu, HvX64RegisterCr8, (uint64_t)pMsg->Header.Cr8);
     2182    NEMWIN_ASSERT_MSG_REG_VAL64(pVCpu, HvX64RegisterRax, pMsg->Rax);
    21922183    if (pMsg->AccessInfo.StringOp)
    21932184    {
    2194         NEMWIN_ASSERT_MSG_REG_SEG(  pVCpu, pGVCpu, HvX64RegisterDs,  pMsg->DsSegment);
    2195         NEMWIN_ASSERT_MSG_REG_SEG(  pVCpu, pGVCpu, HvX64RegisterEs,  pMsg->EsSegment);
    2196         NEMWIN_ASSERT_MSG_REG_VAL64(pVCpu, pGVCpu, HvX64RegisterRcx, pMsg->Rcx);
    2197         NEMWIN_ASSERT_MSG_REG_VAL64(pVCpu, pGVCpu, HvX64RegisterRsi, pMsg->Rsi);
    2198         NEMWIN_ASSERT_MSG_REG_VAL64(pVCpu, pGVCpu, HvX64RegisterRdi, pMsg->Rdi);
     2185        NEMWIN_ASSERT_MSG_REG_SEG(  pVCpu, HvX64RegisterDs,  pMsg->DsSegment);
     2186        NEMWIN_ASSERT_MSG_REG_SEG(  pVCpu, HvX64RegisterEs,  pMsg->EsSegment);
     2187        NEMWIN_ASSERT_MSG_REG_VAL64(pVCpu, HvX64RegisterRcx, pMsg->Rcx);
     2188        NEMWIN_ASSERT_MSG_REG_VAL64(pVCpu, HvX64RegisterRsi, pMsg->Rsi);
     2189        NEMWIN_ASSERT_MSG_REG_VAL64(pVCpu, HvX64RegisterRdi, pMsg->Rdi);
    21992190    }
    22002191
     
    23082299            pVCpu->cpum.GstCtx.rsi = pMsg->Rsi;
    23092300# ifdef IN_RING0
    2310             rcStrict = nemR0WinImportStateStrict(pGVCpu->pGVM, pGVCpu, pVCpu, NEM_WIN_CPUMCTX_EXTRN_MASK_FOR_IEM, "IOExit");
     2301            rcStrict = nemR0WinImportStateStrict(pVM, pVCpu, NEM_WIN_CPUMCTX_EXTRN_MASK_FOR_IEM, "IOExit");
    23112302            if (rcStrict != VINF_SUCCESS)
    23122303                return rcStrict;
     
    23142305            int rc = nemHCWinCopyStateFromHyperV(pVM, pVCpu, NEM_WIN_CPUMCTX_EXTRN_MASK_FOR_IEM);
    23152306            AssertRCReturn(rc, rc);
    2316             RT_NOREF(pGVCpu);
    23172307# endif
    23182308
     
    23592349
    23602350# ifdef IN_RING0
    2361     rcStrict = nemR0WinImportStateStrict(pGVCpu->pGVM, pGVCpu, pVCpu, NEM_WIN_CPUMCTX_EXTRN_MASK_FOR_IEM, "IOExit");
     2351    rcStrict = nemR0WinImportStateStrict(pVM, pVCpu, NEM_WIN_CPUMCTX_EXTRN_MASK_FOR_IEM, "IOExit");
    23622352    if (rcStrict != VINF_SUCCESS)
    23632353        return rcStrict;
     
    23652355    int rc = nemHCWinCopyStateFromHyperV(pVM, pVCpu, NEM_WIN_CPUMCTX_EXTRN_MASK_FOR_IEM);
    23662356    AssertRCReturn(rc, rc);
    2367     RT_NOREF(pGVCpu);
    23682357# endif
    23692358
     
    25542543 * @param   pVCpu           The cross context per CPU structure.
    25552544 * @param   pMsg            The message.
    2556  * @param   pGVCpu          The global (ring-0) per CPU structure (NULL in r3).
    25572545 * @sa      nemR3WinHandleExitInterruptWindow
    25582546 */
    25592547NEM_TMPL_STATIC VBOXSTRICTRC
    2560 nemHCWinHandleMessageInterruptWindow(PVMCC pVM, PVMCPUCC pVCpu, HV_X64_INTERRUPT_WINDOW_MESSAGE const *pMsg, PGVMCPU pGVCpu)
     2548nemHCWinHandleMessageInterruptWindow(PVMCC pVM, PVMCPUCC pVCpu, HV_X64_INTERRUPT_WINDOW_MESSAGE const *pMsg)
    25612549{
    25622550    /*
     
    25802568
    25812569    /** @todo call nemHCWinHandleInterruptFF   */
    2582     RT_NOREF(pVM, pGVCpu);
     2570    RT_NOREF(pVM);
    25832571    return VINF_SUCCESS;
    25842572}
     
    26292617 * @param   pVCpu           The cross context per CPU structure.
    26302618 * @param   pMsg            The message.
    2631  * @param   pGVCpu          The global (ring-0) per CPU structure (NULL in r3).
    26322619 * @sa      nemR3WinHandleExitCpuId
    26332620 */
    2634 NEM_TMPL_STATIC VBOXSTRICTRC nemHCWinHandleMessageCpuId(PVMCC pVM, PVMCPUCC pVCpu, HV_X64_CPUID_INTERCEPT_MESSAGE const *pMsg,
    2635                                                         PGVMCPU pGVCpu)
     2621NEM_TMPL_STATIC VBOXSTRICTRC nemHCWinHandleMessageCpuId(PVMCC pVM, PVMCPUCC pVCpu, HV_X64_CPUID_INTERCEPT_MESSAGE const *pMsg)
    26362622{
    26372623    /* Check message register value sanity. */
    2638     NEMWIN_ASSERT_MSG_REG_SEG(  pVCpu, pGVCpu, HvX64RegisterCs, pMsg->Header.CsSegment);
    2639     NEMWIN_ASSERT_MSG_REG_VAL64(pVCpu, pGVCpu, HvX64RegisterRip, pMsg->Header.Rip);
    2640     NEMWIN_ASSERT_MSG_REG_VAL64(pVCpu, pGVCpu, HvX64RegisterRflags, pMsg->Header.Rflags);
    2641     NEMWIN_ASSERT_MSG_REG_VAL64(pVCpu, pGVCpu, HvX64RegisterCr8, (uint64_t)pMsg->Header.Cr8);
    2642     NEMWIN_ASSERT_MSG_REG_VAL64(pVCpu, pGVCpu, HvX64RegisterRax, pMsg->Rax);
    2643     NEMWIN_ASSERT_MSG_REG_VAL64(pVCpu, pGVCpu, HvX64RegisterRcx, pMsg->Rcx);
    2644     NEMWIN_ASSERT_MSG_REG_VAL64(pVCpu, pGVCpu, HvX64RegisterRdx, pMsg->Rdx);
    2645     NEMWIN_ASSERT_MSG_REG_VAL64(pVCpu, pGVCpu, HvX64RegisterRbx, pMsg->Rbx);
     2624    NEMWIN_ASSERT_MSG_REG_SEG(  pVCpu, HvX64RegisterCs, pMsg->Header.CsSegment);
     2625    NEMWIN_ASSERT_MSG_REG_VAL64(pVCpu, HvX64RegisterRip, pMsg->Header.Rip);
     2626    NEMWIN_ASSERT_MSG_REG_VAL64(pVCpu, HvX64RegisterRflags, pMsg->Header.Rflags);
     2627    NEMWIN_ASSERT_MSG_REG_VAL64(pVCpu, HvX64RegisterCr8, (uint64_t)pMsg->Header.Cr8);
     2628    NEMWIN_ASSERT_MSG_REG_VAL64(pVCpu, HvX64RegisterRax, pMsg->Rax);
     2629    NEMWIN_ASSERT_MSG_REG_VAL64(pVCpu, HvX64RegisterRcx, pMsg->Rcx);
     2630    NEMWIN_ASSERT_MSG_REG_VAL64(pVCpu, HvX64RegisterRdx, pMsg->Rdx);
     2631    NEMWIN_ASSERT_MSG_REG_VAL64(pVCpu, HvX64RegisterRbx, pMsg->Rbx);
    26462632
    26472633    /* Do exit history. */
     
    26982684          pMsg->DefaultResultRax, pMsg->DefaultResultRcx, pMsg->DefaultResultRdx, pMsg->DefaultResultRbx));
    26992685# ifdef IN_RING0
    2700     VBOXSTRICTRC rcStrict = nemR0WinImportStateStrict(pGVCpu->pGVM, pGVCpu, pVCpu, NEM_WIN_CPUMCTX_EXTRN_MASK_FOR_IEM, "CpuIdExit");
     2686    VBOXSTRICTRC rcStrict = nemR0WinImportStateStrict(pVM, pVCpu, NEM_WIN_CPUMCTX_EXTRN_MASK_FOR_IEM, "CpuIdExit");
    27012687    if (rcStrict != VINF_SUCCESS)
    27022688        return rcStrict;
     
    27052691    int rc = nemHCWinCopyStateFromHyperV(pVM, pVCpu, NEM_WIN_CPUMCTX_EXTRN_MASK_FOR_IEM);
    27062692    AssertRCReturn(rc, rc);
    2707     RT_NOREF(pGVCpu);
    27082693# endif
    27092694    VBOXSTRICTRC rcStrictExec = EMHistoryExec(pVCpu, pExitRec, 0);
     
    27962781 * @param   pVCpu           The cross context per CPU structure.
    27972782 * @param   pMsg            The message.
    2798  * @param   pGVCpu          The global (ring-0) per CPU structure (NULL in r3).
    27992783 * @sa      nemR3WinHandleExitMsr
    28002784 */
    2801 NEM_TMPL_STATIC VBOXSTRICTRC nemHCWinHandleMessageMsr(PVMCPUCC pVCpu, HV_X64_MSR_INTERCEPT_MESSAGE const *pMsg, PGVMCPU pGVCpu)
     2785NEM_TMPL_STATIC VBOXSTRICTRC nemHCWinHandleMessageMsr(PVMCPUCC pVCpu, HV_X64_MSR_INTERCEPT_MESSAGE const *pMsg)
    28022786{
    28032787    /*
     
    28062790    Assert(   pMsg->Header.InterceptAccessType == HV_INTERCEPT_ACCESS_READ
    28072791           || pMsg->Header.InterceptAccessType == HV_INTERCEPT_ACCESS_WRITE);
    2808     NEMWIN_ASSERT_MSG_REG_SEG(  pVCpu, pGVCpu, HvX64RegisterCs, pMsg->Header.CsSegment);
    2809     NEMWIN_ASSERT_MSG_REG_VAL64(pVCpu, pGVCpu, HvX64RegisterRip, pMsg->Header.Rip);
    2810     NEMWIN_ASSERT_MSG_REG_VAL64(pVCpu, pGVCpu, HvX64RegisterRflags, pMsg->Header.Rflags);
    2811     NEMWIN_ASSERT_MSG_REG_VAL64(pVCpu, pGVCpu, HvX64RegisterCr8, (uint64_t)pMsg->Header.Cr8);
    2812     NEMWIN_ASSERT_MSG_REG_VAL64(pVCpu, pGVCpu, HvX64RegisterRax, pMsg->Rax);
    2813     NEMWIN_ASSERT_MSG_REG_VAL64(pVCpu, pGVCpu, HvX64RegisterRdx, pMsg->Rdx);
     2792    NEMWIN_ASSERT_MSG_REG_SEG(  pVCpu, HvX64RegisterCs, pMsg->Header.CsSegment);
     2793    NEMWIN_ASSERT_MSG_REG_VAL64(pVCpu, HvX64RegisterRip, pMsg->Header.Rip);
     2794    NEMWIN_ASSERT_MSG_REG_VAL64(pVCpu, HvX64RegisterRflags, pMsg->Header.Rflags);
     2795    NEMWIN_ASSERT_MSG_REG_VAL64(pVCpu, HvX64RegisterCr8, (uint64_t)pMsg->Header.Cr8);
     2796    NEMWIN_ASSERT_MSG_REG_VAL64(pVCpu, HvX64RegisterRax, pMsg->Rax);
     2797    NEMWIN_ASSERT_MSG_REG_VAL64(pVCpu, HvX64RegisterRdx, pMsg->Rdx);
    28142798
    28152799    /*
     
    28302814
    28312815        nemHCWinCopyStateFromX64Header(pVCpu, &pMsg->Header);
    2832         rcStrict = nemHCWinImportStateIfNeededStrict(pVCpu, pGVCpu,
     2816        rcStrict = nemHCWinImportStateIfNeededStrict(pVCpu,
    28332817                                                     (!pExitRec ? 0 : IEM_CPUMCTX_EXTRN_MUST_MASK)
    28342818                                                     | CPUMCTX_EXTRN_ALL_MSRS | CPUMCTX_EXTRN_CR0
     
    29302914     * If we get down here, we're supposed to #GP(0).
    29312915     */
    2932     rcStrict = nemHCWinImportStateIfNeededStrict(pVCpu, pGVCpu, NEM_WIN_CPUMCTX_EXTRN_MASK_FOR_IEM | CPUMCTX_EXTRN_ALL_MSRS, "MSR");
     2916    rcStrict = nemHCWinImportStateIfNeededStrict(pVCpu, NEM_WIN_CPUMCTX_EXTRN_MASK_FOR_IEM | CPUMCTX_EXTRN_ALL_MSRS, "MSR");
    29332917    if (rcStrict == VINF_SUCCESS)
    29342918    {
     
    29692953                                                pExit->VpContext.Rip + pExit->VpContext.Cs.Base, ASMReadTSC());
    29702954        nemR3WinCopyStateFromX64Header(pVCpu, &pExit->VpContext);
    2971         rcStrict = nemHCWinImportStateIfNeededStrict(pVCpu, NULL,
     2955        rcStrict = nemHCWinImportStateIfNeededStrict(pVCpu,
    29722956                                                     (!pExitRec ? 0 : IEM_CPUMCTX_EXTRN_MUST_MASK)
    29732957                                                     | CPUMCTX_EXTRN_ALL_MSRS | CPUMCTX_EXTRN_CR0
     
    30563040     * If we get down here, we're supposed to #GP(0).
    30573041     */
    3058     rcStrict = nemHCWinImportStateIfNeededStrict(pVCpu, NULL,
    3059                                                  NEM_WIN_CPUMCTX_EXTRN_MASK_FOR_IEM | CPUMCTX_EXTRN_ALL_MSRS, "MSR");
     3042    rcStrict = nemHCWinImportStateIfNeededStrict(pVCpu, NEM_WIN_CPUMCTX_EXTRN_MASK_FOR_IEM | CPUMCTX_EXTRN_ALL_MSRS, "MSR");
    30603043    if (rcStrict == VINF_SUCCESS)
    30613044    {
     
    31953178 * @param   pVCpu           The cross context per CPU structure.
    31963179 * @param   pMsg            The message.
    3197  * @param   pGVCpu          The global (ring-0) per CPU structure (NULL in r3).
    31983180 * @sa      nemR3WinHandleExitMsr
    31993181 */
    32003182NEM_TMPL_STATIC VBOXSTRICTRC
    3201 nemHCWinHandleMessageException(PVMCPUCC pVCpu, HV_X64_EXCEPTION_INTERCEPT_MESSAGE const *pMsg, PGVMCPU pGVCpu)
     3183nemHCWinHandleMessageException(PVMCPUCC pVCpu, HV_X64_EXCEPTION_INTERCEPT_MESSAGE const *pMsg)
    32023184{
    32033185    /*
     
    32073189           || pMsg->Header.InterceptAccessType == HV_INTERCEPT_ACCESS_WRITE
    32083190           || pMsg->Header.InterceptAccessType == HV_INTERCEPT_ACCESS_EXECUTE);
    3209     NEMWIN_ASSERT_MSG_REG_SEG(  pVCpu, pGVCpu, HvX64RegisterCs, pMsg->Header.CsSegment);
    3210     NEMWIN_ASSERT_MSG_REG_VAL64(pVCpu, pGVCpu, HvX64RegisterRip, pMsg->Header.Rip);
    3211     NEMWIN_ASSERT_MSG_REG_VAL64(pVCpu, pGVCpu, HvX64RegisterRflags, pMsg->Header.Rflags);
    3212     NEMWIN_ASSERT_MSG_REG_VAL64(pVCpu, pGVCpu, HvX64RegisterCr8, (uint64_t)pMsg->Header.Cr8);
    3213     NEMWIN_ASSERT_MSG_REG_SEG(  pVCpu, pGVCpu, HvX64RegisterDs,  pMsg->DsSegment);
    3214     NEMWIN_ASSERT_MSG_REG_SEG(  pVCpu, pGVCpu, HvX64RegisterSs,  pMsg->SsSegment);
    3215     NEMWIN_ASSERT_MSG_REG_VAL64(pVCpu, pGVCpu, HvX64RegisterRax, pMsg->Rax);
    3216     NEMWIN_ASSERT_MSG_REG_VAL64(pVCpu, pGVCpu, HvX64RegisterRcx, pMsg->Rcx);
    3217     NEMWIN_ASSERT_MSG_REG_VAL64(pVCpu, pGVCpu, HvX64RegisterRdx, pMsg->Rdx);
    3218     NEMWIN_ASSERT_MSG_REG_VAL64(pVCpu, pGVCpu, HvX64RegisterRbx, pMsg->Rbx);
    3219     NEMWIN_ASSERT_MSG_REG_VAL64(pVCpu, pGVCpu, HvX64RegisterRsp, pMsg->Rsp);
    3220     NEMWIN_ASSERT_MSG_REG_VAL64(pVCpu, pGVCpu, HvX64RegisterRbp, pMsg->Rbp);
    3221     NEMWIN_ASSERT_MSG_REG_VAL64(pVCpu, pGVCpu, HvX64RegisterRsi, pMsg->Rsi);
    3222     NEMWIN_ASSERT_MSG_REG_VAL64(pVCpu, pGVCpu, HvX64RegisterRdi, pMsg->Rdi);
    3223     NEMWIN_ASSERT_MSG_REG_VAL64(pVCpu, pGVCpu, HvX64RegisterR8,  pMsg->R8);
    3224     NEMWIN_ASSERT_MSG_REG_VAL64(pVCpu, pGVCpu, HvX64RegisterR9,  pMsg->R9);
    3225     NEMWIN_ASSERT_MSG_REG_VAL64(pVCpu, pGVCpu, HvX64RegisterR10, pMsg->R10);
    3226     NEMWIN_ASSERT_MSG_REG_VAL64(pVCpu, pGVCpu, HvX64RegisterR11, pMsg->R11);
    3227     NEMWIN_ASSERT_MSG_REG_VAL64(pVCpu, pGVCpu, HvX64RegisterR12, pMsg->R12);
    3228     NEMWIN_ASSERT_MSG_REG_VAL64(pVCpu, pGVCpu, HvX64RegisterR13, pMsg->R13);
    3229     NEMWIN_ASSERT_MSG_REG_VAL64(pVCpu, pGVCpu, HvX64RegisterR14, pMsg->R14);
    3230     NEMWIN_ASSERT_MSG_REG_VAL64(pVCpu, pGVCpu, HvX64RegisterR15, pMsg->R15);
     3191    NEMWIN_ASSERT_MSG_REG_SEG(  pVCpu, HvX64RegisterCs, pMsg->Header.CsSegment);
     3192    NEMWIN_ASSERT_MSG_REG_VAL64(pVCpu, HvX64RegisterRip, pMsg->Header.Rip);
     3193    NEMWIN_ASSERT_MSG_REG_VAL64(pVCpu, HvX64RegisterRflags, pMsg->Header.Rflags);
     3194    NEMWIN_ASSERT_MSG_REG_VAL64(pVCpu, HvX64RegisterCr8, (uint64_t)pMsg->Header.Cr8);
     3195    NEMWIN_ASSERT_MSG_REG_SEG(  pVCpu, HvX64RegisterDs,  pMsg->DsSegment);
     3196    NEMWIN_ASSERT_MSG_REG_SEG(  pVCpu, HvX64RegisterSs,  pMsg->SsSegment);
     3197    NEMWIN_ASSERT_MSG_REG_VAL64(pVCpu, HvX64RegisterRax, pMsg->Rax);
     3198    NEMWIN_ASSERT_MSG_REG_VAL64(pVCpu, HvX64RegisterRcx, pMsg->Rcx);
     3199    NEMWIN_ASSERT_MSG_REG_VAL64(pVCpu, HvX64RegisterRdx, pMsg->Rdx);
     3200    NEMWIN_ASSERT_MSG_REG_VAL64(pVCpu, HvX64RegisterRbx, pMsg->Rbx);
     3201    NEMWIN_ASSERT_MSG_REG_VAL64(pVCpu, HvX64RegisterRsp, pMsg->Rsp);
     3202    NEMWIN_ASSERT_MSG_REG_VAL64(pVCpu, HvX64RegisterRbp, pMsg->Rbp);
     3203    NEMWIN_ASSERT_MSG_REG_VAL64(pVCpu, HvX64RegisterRsi, pMsg->Rsi);
     3204    NEMWIN_ASSERT_MSG_REG_VAL64(pVCpu, HvX64RegisterRdi, pMsg->Rdi);
     3205    NEMWIN_ASSERT_MSG_REG_VAL64(pVCpu, HvX64RegisterR8,  pMsg->R8);
     3206    NEMWIN_ASSERT_MSG_REG_VAL64(pVCpu, HvX64RegisterR9,  pMsg->R9);
     3207    NEMWIN_ASSERT_MSG_REG_VAL64(pVCpu, HvX64RegisterR10, pMsg->R10);
     3208    NEMWIN_ASSERT_MSG_REG_VAL64(pVCpu, HvX64RegisterR11, pMsg->R11);
     3209    NEMWIN_ASSERT_MSG_REG_VAL64(pVCpu, HvX64RegisterR12, pMsg->R12);
     3210    NEMWIN_ASSERT_MSG_REG_VAL64(pVCpu, HvX64RegisterR13, pMsg->R13);
     3211    NEMWIN_ASSERT_MSG_REG_VAL64(pVCpu, HvX64RegisterR14, pMsg->R14);
     3212    NEMWIN_ASSERT_MSG_REG_VAL64(pVCpu, HvX64RegisterR15, pMsg->R15);
    32313213
    32323214    /*
     
    32433225    if (pMsg->ExceptionVector == X86_XCPT_DB)
    32443226        fWhat |= CPUMCTX_EXTRN_DR0_DR3 | CPUMCTX_EXTRN_DR7 | CPUMCTX_EXTRN_DR6;
    3245     VBOXSTRICTRC rcStrict = nemHCWinImportStateIfNeededStrict(pVCpu, pGVCpu, fWhat, "Xcpt");
     3227    VBOXSTRICTRC rcStrict = nemHCWinImportStateIfNeededStrict(pVCpu, fWhat, "Xcpt");
    32463228    if (rcStrict != VINF_SUCCESS)
    32473229        return rcStrict;
     
    33413323    if (pExit->VpException.ExceptionType == X86_XCPT_DB)
    33423324        fWhat |= CPUMCTX_EXTRN_DR0_DR3 | CPUMCTX_EXTRN_DR7 | CPUMCTX_EXTRN_DR6;
    3343     VBOXSTRICTRC rcStrict = nemHCWinImportStateIfNeededStrict(pVCpu, NULL, fWhat, "Xcpt");
     3325    VBOXSTRICTRC rcStrict = nemHCWinImportStateIfNeededStrict(pVCpu, fWhat, "Xcpt");
    33443326    if (rcStrict != VINF_SUCCESS)
    33453327        return rcStrict;
     
    34313413 * @param   pVCpu           The cross context per CPU structure.
    34323414 * @param   pMsgHdr         The message header.
    3433  * @param   pGVCpu          The global (ring-0) per CPU structure (NULL in r3).
    34343415 * @sa      nemR3WinHandleExitUnrecoverableException
    34353416 */
    34363417NEM_TMPL_STATIC VBOXSTRICTRC
    3437 nemHCWinHandleMessageUnrecoverableException(PVMCPUCC pVCpu, HV_X64_INTERCEPT_MESSAGE_HEADER const *pMsgHdr, PGVMCPU pGVCpu)
     3418nemHCWinHandleMessageUnrecoverableException(PVMCPUCC pVCpu, HV_X64_INTERCEPT_MESSAGE_HEADER const *pMsgHdr)
    34383419{
    34393420    /* Check message register value sanity. */
    3440     NEMWIN_ASSERT_MSG_REG_SEG(  pVCpu, pGVCpu, HvX64RegisterCs, pMsgHdr->CsSegment);
    3441     NEMWIN_ASSERT_MSG_REG_VAL64(pVCpu, pGVCpu, HvX64RegisterRip, pMsgHdr->Rip);
    3442     NEMWIN_ASSERT_MSG_REG_VAL64(pVCpu, pGVCpu, HvX64RegisterRflags, pMsgHdr->Rflags);
    3443     NEMWIN_ASSERT_MSG_REG_VAL64(pVCpu, pGVCpu, HvX64RegisterCr8, (uint64_t)pMsgHdr->Cr8);
     3421    NEMWIN_ASSERT_MSG_REG_SEG(  pVCpu, HvX64RegisterCs, pMsgHdr->CsSegment);
     3422    NEMWIN_ASSERT_MSG_REG_VAL64(pVCpu, HvX64RegisterRip, pMsgHdr->Rip);
     3423    NEMWIN_ASSERT_MSG_REG_VAL64(pVCpu, HvX64RegisterRflags, pMsgHdr->Rflags);
     3424    NEMWIN_ASSERT_MSG_REG_VAL64(pVCpu, HvX64RegisterCr8, (uint64_t)pMsgHdr->Cr8);
    34443425
    34453426# if 0
     
    34583439                     pMsgHdr->Rip + pMsgHdr->CsSegment.Base, ASMReadTSC());
    34593440    nemHCWinCopyStateFromX64Header(pVCpu, pMsgHdr);
    3460     VBOXSTRICTRC rcStrict = nemHCWinImportStateIfNeededStrict(pVCpu, pGVCpu,
    3461                                                               NEM_WIN_CPUMCTX_EXTRN_MASK_FOR_IEM | CPUMCTX_EXTRN_ALL, "TripleExit");
     3441    VBOXSTRICTRC rcStrict = nemHCWinImportStateIfNeededStrict(pVCpu, NEM_WIN_CPUMCTX_EXTRN_MASK_FOR_IEM | CPUMCTX_EXTRN_ALL, "TripleExit");
    34623442    if (rcStrict == VINF_SUCCESS)
    34633443    {
     
    35113491                     pExit->VpContext.Rip + pExit->VpContext.Cs.Base, ASMReadTSC());
    35123492    nemR3WinCopyStateFromX64Header(pVCpu, &pExit->VpContext);
    3513     VBOXSTRICTRC rcStrict = nemHCWinImportStateIfNeededStrict(pVCpu, NULL,
    3514                                                               NEM_WIN_CPUMCTX_EXTRN_MASK_FOR_IEM | CPUMCTX_EXTRN_ALL, "TripleExit");
     3493    VBOXSTRICTRC rcStrict = nemHCWinImportStateIfNeededStrict(pVCpu, NEM_WIN_CPUMCTX_EXTRN_MASK_FOR_IEM | CPUMCTX_EXTRN_ALL, "TripleExit");
    35153494    if (rcStrict == VINF_SUCCESS)
    35163495    {
     
    35493528 * @param   pVCpu           The cross context per CPU structure.
    35503529 * @param   pMappingHeader  The message slot mapping.
    3551  * @param   pGVCpu          The global (ring-0) per CPU structure (NULL in r3).
    35523530 * @sa      nemR3WinHandleExit
    35533531 */
    35543532NEM_TMPL_STATIC VBOXSTRICTRC
    3555 nemHCWinHandleMessage(PVMCC pVM, PVMCPUCC pVCpu, VID_MESSAGE_MAPPING_HEADER volatile *pMappingHeader, PGVMCPU pGVCpu)
     3533nemHCWinHandleMessage(PVMCC pVM, PVMCPUCC pVCpu, VID_MESSAGE_MAPPING_HEADER volatile *pMappingHeader)
    35563534{
    35573535    if (pMappingHeader->enmVidMsgType == VidMessageHypervisorMessage)
     
    35643542                Assert(pMsg->Header.PayloadSize == RT_UOFFSETOF(HV_X64_MEMORY_INTERCEPT_MESSAGE, DsSegment));
    35653543                STAM_REL_COUNTER_INC(&pVCpu->nem.s.StatExitMemUnmapped);
    3566                 return nemHCWinHandleMessageMemory(pVM, pVCpu, &pMsg->X64MemoryIntercept, pGVCpu);
     3544                return nemHCWinHandleMessageMemory(pVM, pVCpu, &pMsg->X64MemoryIntercept);
    35673545
    35683546            case HvMessageTypeGpaIntercept:
    35693547                Assert(pMsg->Header.PayloadSize == RT_UOFFSETOF(HV_X64_MEMORY_INTERCEPT_MESSAGE, DsSegment));
    35703548                STAM_REL_COUNTER_INC(&pVCpu->nem.s.StatExitMemIntercept);
    3571                 return nemHCWinHandleMessageMemory(pVM, pVCpu, &pMsg->X64MemoryIntercept, pGVCpu);
     3549                return nemHCWinHandleMessageMemory(pVM, pVCpu, &pMsg->X64MemoryIntercept);
    35723550
    35733551            case HvMessageTypeX64IoPortIntercept:
    35743552                Assert(pMsg->Header.PayloadSize == sizeof(pMsg->X64IoPortIntercept));
    35753553                STAM_REL_COUNTER_INC(&pVCpu->nem.s.StatExitPortIo);
    3576                 return nemHCWinHandleMessageIoPort(pVM, pVCpu, &pMsg->X64IoPortIntercept, pGVCpu);
     3554                return nemHCWinHandleMessageIoPort(pVM, pVCpu, &pMsg->X64IoPortIntercept);
    35773555
    35783556            case HvMessageTypeX64Halt:
     
    35863564                Assert(pMsg->Header.PayloadSize == sizeof(pMsg->X64InterruptWindow));
    35873565                STAM_REL_COUNTER_INC(&pVCpu->nem.s.StatExitInterruptWindow);
    3588                 return nemHCWinHandleMessageInterruptWindow(pVM, pVCpu, &pMsg->X64InterruptWindow, pGVCpu);
     3566                return nemHCWinHandleMessageInterruptWindow(pVM, pVCpu, &pMsg->X64InterruptWindow);
    35893567
    35903568            case HvMessageTypeX64CpuidIntercept:
    35913569                Assert(pMsg->Header.PayloadSize == sizeof(pMsg->X64CpuIdIntercept));
    35923570                STAM_REL_COUNTER_INC(&pVCpu->nem.s.StatExitCpuId);
    3593                 return nemHCWinHandleMessageCpuId(pVM, pVCpu, &pMsg->X64CpuIdIntercept, pGVCpu);
     3571                return nemHCWinHandleMessageCpuId(pVM, pVCpu, &pMsg->X64CpuIdIntercept);
    35943572
    35953573            case HvMessageTypeX64MsrIntercept:
    35963574                Assert(pMsg->Header.PayloadSize == sizeof(pMsg->X64MsrIntercept));
    35973575                STAM_REL_COUNTER_INC(&pVCpu->nem.s.StatExitMsr);
    3598                 return nemHCWinHandleMessageMsr(pVCpu, &pMsg->X64MsrIntercept, pGVCpu);
     3576                return nemHCWinHandleMessageMsr(pVCpu, &pMsg->X64MsrIntercept);
    35993577
    36003578            case HvMessageTypeX64ExceptionIntercept:
    36013579                Assert(pMsg->Header.PayloadSize == sizeof(pMsg->X64ExceptionIntercept));
    36023580                STAM_REL_COUNTER_INC(&pVCpu->nem.s.StatExitException);
    3603                 return nemHCWinHandleMessageException(pVCpu, &pMsg->X64ExceptionIntercept, pGVCpu);
     3581                return nemHCWinHandleMessageException(pVCpu, &pMsg->X64ExceptionIntercept);
    36043582
    36053583            case HvMessageTypeUnrecoverableException:
    36063584                Assert(pMsg->Header.PayloadSize == sizeof(pMsg->X64InterceptHeader));
    36073585                STAM_REL_COUNTER_INC(&pVCpu->nem.s.StatExitUnrecoverable);
    3608                 return nemHCWinHandleMessageUnrecoverableException(pVCpu, &pMsg->X64InterceptHeader, pGVCpu);
     3586                return nemHCWinHandleMessageUnrecoverableException(pVCpu, &pMsg->X64InterceptHeader);
    36093587
    36103588            case HvMessageTypeInvalidVpRegisterValue:
     
    37123690 * @returns NT status code.
    37133691 * @param   pGVM            The ring-0 VM structure.
    3714  * @param   pGVCpu          The ring-0 CPU structure.
    3715  * @param   pVCpu           The calling cross context CPU structure.
     3692 * @param   pGVCpu          The global (ring-0) per CPU structure.
    37163693 * @param   fFlags          The wait flags.
    37173694 * @param   cMillies        The timeout in milliseconds
    37183695 */
    3719 static NTSTATUS nemR0NtPerformIoCtlMessageSlotHandleAndGetNext(PGVM pGVM, PGVMCPU pGVCpu, PVMCPUCC pVCpu,
    3720                                                                uint32_t fFlags, uint32_t cMillies)
    3721 {
    3722     pVCpu->nem.s.uIoCtlBuf.MsgSlotHandleAndGetNext.iCpu     = pGVCpu->idCpu;
    3723     pVCpu->nem.s.uIoCtlBuf.MsgSlotHandleAndGetNext.fFlags   = fFlags;
    3724     pVCpu->nem.s.uIoCtlBuf.MsgSlotHandleAndGetNext.cMillies = cMillies;
    3725     NTSTATUS rcNt = nemR0NtPerformIoControl(pGVM, pVCpu, pGVM->nemr0.s.IoCtlMessageSlotHandleAndGetNext.uFunction,
    3726                                             &pVCpu->nem.s.uIoCtlBuf.MsgSlotHandleAndGetNext,
     3696static NTSTATUS nemR0NtPerformIoCtlMessageSlotHandleAndGetNext(PGVM pGVM, PGVMCPU pGVCpu, uint32_t fFlags, uint32_t cMillies)
     3697{
     3698    pGVCpu->nem.s.uIoCtlBuf.MsgSlotHandleAndGetNext.iCpu     = pGVCpu->idCpu;
     3699    pGVCpu->nem.s.uIoCtlBuf.MsgSlotHandleAndGetNext.fFlags   = fFlags;
     3700    pGVCpu->nem.s.uIoCtlBuf.MsgSlotHandleAndGetNext.cMillies = cMillies;
     3701    NTSTATUS rcNt = nemR0NtPerformIoControl(pGVM, pGVCpu, pGVM->nemr0.s.IoCtlMessageSlotHandleAndGetNext.uFunction,
     3702                                            &pGVCpu->nem.s.uIoCtlBuf.MsgSlotHandleAndGetNext,
    37273703                                            pGVM->nemr0.s.IoCtlMessageSlotHandleAndGetNext.cbInput,
    37283704                                            NULL, 0);
     
    37403716             || rcNt == STATUS_USER_APC   /* just in case */)
    37413717    {
    3742         DBGFTRACE_CUSTOM(pVCpu->CTX_SUFF(pVM), "IoCtlMessageSlotHandleAndGetNextRestart/1 %#x (f=%#x)", rcNt, fFlags);
    3743         STAM_REL_COUNTER_INC(&pVCpu->nem.s.StatStopCpuPendingAlerts);
     3718        DBGFTRACE_CUSTOM(pGVCpu->CTX_SUFF(pVM), "IoCtlMessageSlotHandleAndGetNextRestart/1 %#x (f=%#x)", rcNt, fFlags);
     3719        STAM_REL_COUNTER_INC(&pGVCpu->nem.s.StatStopCpuPendingAlerts);
    37443720        Assert(fFlags & VID_MSHAGN_F_GET_NEXT_MESSAGE);
    37453721
    3746         pVCpu->nem.s.uIoCtlBuf.MsgSlotHandleAndGetNext.iCpu     = pVCpu->idCpu;
    3747         pVCpu->nem.s.uIoCtlBuf.MsgSlotHandleAndGetNext.fFlags   = fFlags & ~VID_MSHAGN_F_HANDLE_MESSAGE;
    3748         pVCpu->nem.s.uIoCtlBuf.MsgSlotHandleAndGetNext.cMillies = cMillies;
    3749         rcNt = nemR0NtPerformIoControl(pGVM, pVCpu, pGVM->nemr0.s.IoCtlMessageSlotHandleAndGetNext.uFunction,
    3750                                        &pVCpu->nem.s.uIoCtlBuf.MsgSlotHandleAndGetNext,
     3722        pGVCpu->nem.s.uIoCtlBuf.MsgSlotHandleAndGetNext.iCpu     = pGVCpu->idCpu;
     3723        pGVCpu->nem.s.uIoCtlBuf.MsgSlotHandleAndGetNext.fFlags   = fFlags & ~VID_MSHAGN_F_HANDLE_MESSAGE;
     3724        pGVCpu->nem.s.uIoCtlBuf.MsgSlotHandleAndGetNext.cMillies = cMillies;
     3725        rcNt = nemR0NtPerformIoControl(pGVM, pGVCpu, pGVM->nemr0.s.IoCtlMessageSlotHandleAndGetNext.uFunction,
     3726                                       &pGVCpu->nem.s.uIoCtlBuf.MsgSlotHandleAndGetNext,
    37513727                                       pGVM->nemr0.s.IoCtlMessageSlotHandleAndGetNext.cbInput,
    37523728                                       NULL, 0);
    3753         DBGFTRACE_CUSTOM(pVCpu->CTX_SUFF(pVM), "IoCtlMessageSlotHandleAndGetNextRestart/2 %#x", rcNt);
     3729        DBGFTRACE_CUSTOM(pGVM, "IoCtlMessageSlotHandleAndGetNextRestart/2 %#x", rcNt);
    37543730    }
    37553731    return rcNt;
    37563732}
    3757 
    37583733#endif /* IN_RING0 */
    37593734
     
    37743749 *                          exit.
    37753750 * @param   pMappingHeader  The message slot mapping.
    3776  * @param   pGVM            The global (ring-0) VM structure (NULL in r3).
    3777  * @param   pGVCpu          The global (ring-0) per CPU structure (NULL in r3).
    37783751 */
    37793752NEM_TMPL_STATIC VBOXSTRICTRC nemHCWinStopCpu(PVMCC pVM, PVMCPUCC pVCpu, VBOXSTRICTRC rcStrict,
    3780                                              VID_MESSAGE_MAPPING_HEADER volatile *pMappingHeader,
    3781                                              PGVM pGVM, PGVMCPU pGVCpu)
     3753                                             VID_MESSAGE_MAPPING_HEADER volatile *pMappingHeader)
    37823754{
    37833755# ifdef DBGFTRACE_ENABLED
     
    37913763    DBGFTRACE_CUSTOM(pVM, "nemStop#0");
    37923764# ifdef IN_RING0
    3793     pVCpu->nem.s.uIoCtlBuf.idCpu = pGVCpu->idCpu;
    3794     NTSTATUS rcNt = nemR0NtPerformIoControl(pGVM, pVCpu, pGVM->nemr0.s.IoCtlStopVirtualProcessor.uFunction,
     3765    pVCpu->nem.s.uIoCtlBuf.idCpu = pVCpu->idCpu;
     3766    NTSTATUS rcNt = nemR0NtPerformIoControl(pVM, pVCpu, pVM->nemr0.s.IoCtlStopVirtualProcessor.uFunction,
    37953767                                            &pVCpu->nem.s.uIoCtlBuf.idCpu, sizeof(pVCpu->nem.s.uIoCtlBuf.idCpu),
    37963768                                            NULL, 0);
     
    38113783        return rcStrict;
    38123784    }
    3813     RT_NOREF(pGVM, pGVCpu);
    38143785# endif
    38153786
     
    38353806     */
    38363807# ifdef IN_RING0
    3837     rcNt = nemR0NtPerformIoCtlMessageSlotHandleAndGetNext(pGVM, pGVCpu, pVCpu, VID_MSHAGN_F_GET_NEXT_MESSAGE, 30000 /*ms*/);
     3808    rcNt = nemR0NtPerformIoCtlMessageSlotHandleAndGetNext(pVM, pVCpu, VID_MSHAGN_F_GET_NEXT_MESSAGE, 30000 /*ms*/);
    38383809    DBGFTRACE_CUSTOM(pVM, "nemStop#1: %#x / %#x %#x %#x", rcNt, pMappingHeader->enmVidMsgType, pMappingHeader->cbMessage,
    38393810                     pMsgForTrace->Header.MessageType);
     
    38533824    if (enmVidMsgType != VidMessageStopRequestComplete)
    38543825    {
    3855         VBOXSTRICTRC rcStrict2 = nemHCWinHandleMessage(pVM, pVCpu, pMappingHeader, pGVCpu);
     3826        VBOXSTRICTRC rcStrict2 = nemHCWinHandleMessage(pVM, pVCpu, pMappingHeader);
    38563827        if (rcStrict2 != VINF_SUCCESS && RT_SUCCESS(rcStrict))
    38573828            rcStrict = rcStrict2;
     
    38633834         */
    38643835# ifdef IN_RING0
    3865         rcNt = nemR0NtPerformIoCtlMessageSlotHandleAndGetNext(pGVM, pGVCpu, pVCpu,
     3836        rcNt = nemR0NtPerformIoCtlMessageSlotHandleAndGetNext(pVM, pVCpu,
    38663837                                                              VID_MSHAGN_F_HANDLE_MESSAGE | VID_MSHAGN_F_GET_NEXT_MESSAGE,
    38673838                                                              30000 /*ms*/);
     
    38913862         */
    38923863# ifdef IN_RING0
    3893         rcNt = nemR0NtPerformIoCtlMessageSlotHandleAndGetNext(pGVM, pGVCpu, pVCpu, VID_MSHAGN_F_HANDLE_MESSAGE, 30000 /*ms*/);
     3864        rcNt = nemR0NtPerformIoCtlMessageSlotHandleAndGetNext(pVM, pVCpu, VID_MSHAGN_F_HANDLE_MESSAGE, 30000 /*ms*/);
    38943865        DBGFTRACE_CUSTOM(pVM, "nemStop#3: %#x / %#x %#x %#x", rcNt, pMappingHeader->enmVidMsgType,
    38953866                         pMsgForTrace->Header.MessageType, pMappingHeader->cbMessage, pMsgForTrace->Header.MessageType);
     
    39273898 * @param   pVM                 The cross context VM structure.
    39283899 * @param   pVCpu               The cross context per CPU structure.
    3929  * @param   pGVCpu              The global (ring-0) per CPU structure.
    39303900 * @param   pfInterruptWindows  Where to return interrupt window flags.
    39313901 */
    3932 NEM_TMPL_STATIC VBOXSTRICTRC nemHCWinHandleInterruptFF(PVMCC pVM, PVMCPUCC pVCpu, PGVMCPU pGVCpu, uint8_t *pfInterruptWindows)
     3902NEM_TMPL_STATIC VBOXSTRICTRC nemHCWinHandleInterruptFF(PVMCC pVM, PVMCPUCC pVCpu, uint8_t *pfInterruptWindows)
    39333903{
    39343904    Assert(!TRPMHasTrap(pVCpu));
     
    39613931    if (pVCpu->cpum.GstCtx.fExtrn & fNeedExtrn)
    39623932    {
    3963         VBOXSTRICTRC rcStrict = nemHCWinImportStateIfNeededStrict(pVCpu, pGVCpu,
    3964                                                                   NEM_WIN_CPUMCTX_EXTRN_MASK_FOR_IEM_XCPT, "IntFF");
     3933        VBOXSTRICTRC rcStrict = nemHCWinImportStateIfNeededStrict(pVCpu, NEM_WIN_CPUMCTX_EXTRN_MASK_FOR_IEM_XCPT, "IntFF");
    39653934        if (rcStrict != VINF_SUCCESS)
    39663935            return rcStrict;
     
    39773946            && !VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_BLOCK_NMIS))
    39783947        {
    3979             VBOXSTRICTRC rcStrict = nemHCWinImportStateIfNeededStrict(pVCpu, pGVCpu,
    3980                                                                       NEM_WIN_CPUMCTX_EXTRN_MASK_FOR_IEM_XCPT, "NMI");
     3948            VBOXSTRICTRC rcStrict = nemHCWinImportStateIfNeededStrict(pVCpu, NEM_WIN_CPUMCTX_EXTRN_MASK_FOR_IEM_XCPT, "NMI");
    39813949            if (rcStrict == VINF_SUCCESS)
    39823950            {
     
    40003968        {
    40013969            AssertCompile(NEM_WIN_CPUMCTX_EXTRN_MASK_FOR_IEM_XCPT & CPUMCTX_EXTRN_APIC_TPR);
    4002             VBOXSTRICTRC rcStrict = nemHCWinImportStateIfNeededStrict(pVCpu, pGVCpu,
    4003                                                                       NEM_WIN_CPUMCTX_EXTRN_MASK_FOR_IEM_XCPT, "NMI");
     3970            VBOXSTRICTRC rcStrict = nemHCWinImportStateIfNeededStrict(pVCpu, NEM_WIN_CPUMCTX_EXTRN_MASK_FOR_IEM_XCPT, "NMI");
    40043971            if (rcStrict == VINF_SUCCESS)
    40053972            {
     
    40354002 * @param   pVM             The cross context VM structure.
    40364003 * @param   pVCpu           The cross context per CPU structure.
    4037  * @param   pGVM            The ring-0 VM structure (NULL in ring-3).
    4038  * @param   pGVCpu          The ring-0 per CPU structure (NULL in ring-3).
    40394004 */
    4040 NEM_TMPL_STATIC VBOXSTRICTRC nemHCWinRunGC(PVMCC pVM, PVMCPUCC pVCpu, PGVM pGVM, PGVMCPU pGVCpu)
     4005NEM_TMPL_STATIC VBOXSTRICTRC nemHCWinRunGC(PVMCC pVM, PVMCPUCC pVCpu)
    40414006{
    40424007    LogFlow(("NEM/%u: %04x:%08RX64 efl=%#08RX64 <=\n", pVCpu->idCpu, pVCpu->cpum.GstCtx.cs.Sel, pVCpu->cpum.GstCtx.rip, pVCpu->cpum.GstCtx.rflags));
     
    40444009    if (LogIs3Enabled())
    40454010        nemHCWinLogState(pVM, pVCpu);
    4046 # endif
    4047 # ifdef IN_RING0
    4048     Assert(pVCpu->idCpu == pGVCpu->idCpu);
    40494011# endif
    40504012
     
    41024064            {
    41034065                pVCpu->nem.s.fHandleAndGetFlags = 0;
    4104                 rcStrict = nemHCWinStopCpu(pVM, pVCpu, rcStrict, pMappingHeader, pGVM, pGVCpu);
     4066                rcStrict = nemHCWinStopCpu(pVM, pVCpu, rcStrict, pMappingHeader);
    41054067                if (rcStrict == VINF_SUCCESS)
    41064068                { /* likely */ }
     
    41154077
    41164078            /* Try inject interrupt. */
    4117             rcStrict = nemHCWinHandleInterruptFF(pVM, pVCpu, pGVCpu, &pVCpu->nem.s.fDesiredInterruptWindows);
     4079            rcStrict = nemHCWinHandleInterruptFF(pVM, pVCpu, &pVCpu->nem.s.fDesiredInterruptWindows);
    41184080            if (rcStrict == VINF_SUCCESS)
    41194081            { /* likely */ }
     
    41484110# endif
    41494111# ifdef IN_RING0
    4150             int rc2 = nemR0WinExportState(pGVM, pGVCpu, &pVCpu->cpum.GstCtx);
     4112            int rc2 = nemR0WinExportState(pVM, pVCpu, &pVCpu->cpum.GstCtx);
    41514113# else
    41524114            int rc2 = nemHCWinCopyStateToHyperV(pVM, pVCpu);
    4153             RT_NOREF(pGVM, pGVCpu);
    41544115# endif
    41554116            AssertRCReturn(rc2, rc2);
     
    41764137            {
    41774138#  ifdef IN_RING0
    4178                 pVCpu->nem.s.uIoCtlBuf.idCpu = pGVCpu->idCpu;
    4179                 NTSTATUS rcNt = nemR0NtPerformIoControl(pGVM, pVCpu, pGVM->nemr0.s.IoCtlStartVirtualProcessor.uFunction,
     4139                pVCpu->nem.s.uIoCtlBuf.idCpu = pVCpu->idCpu;
     4140                NTSTATUS rcNt = nemR0NtPerformIoControl(pVM, pVCpu, pVM->nemr0.s.IoCtlStartVirtualProcessor.uFunction,
    41804141                                                        &pVCpu->nem.s.uIoCtlBuf.idCpu, sizeof(pVCpu->nem.s.uIoCtlBuf.idCpu),
    41814142                                                        NULL, 0);
    41824143                LogFlow(("NEM/%u: IoCtlStartVirtualProcessor -> %#x\n", pVCpu->idCpu, rcNt));
    4183                 AssertLogRelMsgReturn(NT_SUCCESS(rcNt), ("VidStartVirtualProcessor failed for CPU #%u: %#x\n", pGVCpu->idCpu, rcNt),
     4144                AssertLogRelMsgReturn(NT_SUCCESS(rcNt), ("VidStartVirtualProcessor failed for CPU #%u: %#x\n", pVCpu->idCpu, rcNt),
    41844145                                      VERR_NEM_IPE_5);
    41854146#  else
     
    42114172                    cMsWait = RT_MS_1SEC;
    42124173#  ifdef IN_RING0
    4213                 pVCpu->nem.s.uIoCtlBuf.MsgSlotHandleAndGetNext.iCpu     = pGVCpu->idCpu;
     4174                pVCpu->nem.s.uIoCtlBuf.MsgSlotHandleAndGetNext.iCpu     = pVCpu->idCpu;
    42144175                pVCpu->nem.s.uIoCtlBuf.MsgSlotHandleAndGetNext.fFlags   = pVCpu->nem.s.fHandleAndGetFlags;
    42154176                pVCpu->nem.s.uIoCtlBuf.MsgSlotHandleAndGetNext.cMillies = cMsWait;
    4216                 NTSTATUS rcNt = nemR0NtPerformIoControl(pGVM, pVCpu, pGVM->nemr0.s.IoCtlMessageSlotHandleAndGetNext.uFunction,
     4177                NTSTATUS rcNt = nemR0NtPerformIoControl(pVM, pVCpu, pVM->nemr0.s.IoCtlMessageSlotHandleAndGetNext.uFunction,
    42174178                                                        &pVCpu->nem.s.uIoCtlBuf.MsgSlotHandleAndGetNext,
    4218                                                         pGVM->nemr0.s.IoCtlMessageSlotHandleAndGetNext.cbInput,
     4179                                                        pVM->nemr0.s.IoCtlMessageSlotHandleAndGetNext.cbInput,
    42194180                                                        NULL, 0);
    42204181                VMCPU_CMPXCHG_STATE(pVCpu, VMCPUSTATE_STARTED_EXEC_NEM, VMCPUSTATE_STARTED_EXEC_NEM_WAIT);
     
    42384199                     */
    42394200# ifdef NEM_WIN_TEMPLATE_MODE_OWN_RUN_API
    4240                     rcStrict = nemHCWinHandleMessage(pVM, pVCpu, pMappingHeader, pGVCpu);
     4201                    rcStrict = nemHCWinHandleMessage(pVM, pVCpu, pMappingHeader);
    42414202                    pVCpu->nem.s.fHandleAndGetFlags |= VID_MSHAGN_F_HANDLE_MESSAGE;
    42424203# else
     
    43154276    {
    43164277        pVCpu->nem.s.fHandleAndGetFlags = 0;
    4317         rcStrict = nemHCWinStopCpu(pVM, pVCpu, rcStrict, pMappingHeader, pGVM, pGVCpu);
     4278        rcStrict = nemHCWinStopCpu(pVM, pVCpu, rcStrict, pMappingHeader);
    43184279    }
    43194280# endif
     
    43434304        {
    43444305# ifdef IN_RING0
    4345             int rc2 = nemR0WinImportState(pGVM, pGVCpu, &pVCpu->cpum.GstCtx, fImport | CPUMCTX_EXTRN_NEM_WIN_EVENT_INJECT,
     4306            int rc2 = nemR0WinImportState(pVM, pVCpu, &pVCpu->cpum.GstCtx, fImport | CPUMCTX_EXTRN_NEM_WIN_EVENT_INJECT,
    43464307                                          true /*fCanUpdateCr3*/);
    43474308            if (RT_SUCCESS(rc2))
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