Changeset 80531 in vbox for trunk/include
- Timestamp:
- Sep 1, 2019 11:03:34 PM (6 years ago)
- svn:sync-xref-src-repo-rev:
- 133038
- Location:
- trunk/include
- Files:
-
- 13 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/include/VBox/sup.h
r80216 r80531 1977 1977 SUPR0DECL(int) SUPR0PageFree(PSUPDRVSESSION pSession, RTR3PTR pvR3); 1978 1978 SUPR0DECL(int) SUPR0GipMap(PSUPDRVSESSION pSession, PRTR3PTR ppGipR3, PRTHCPHYS pHCPhysGip); 1979 SUPR0DECL(int) SUPR0LdrLock(PSUPDRVSESSION pSession); 1980 SUPR0DECL(int) SUPR0LdrUnlock(PSUPDRVSESSION pSession); 1981 SUPR0DECL(bool) SUPR0LdrIsLockOwnerByMod(void *hMod, bool fWantToHear); 1982 SUPR0DECL(int) SUPR0LdrModByName(PSUPDRVSESSION pSession, const char *pszName, void **phMod); 1983 SUPR0DECL(int) SUPR0LdrModRetain(PSUPDRVSESSION pSession, void *hMod); 1984 SUPR0DECL(int) SUPR0LdrModRelease(PSUPDRVSESSION pSession, void *hMod); 1979 1985 SUPR0DECL(int) SUPR0GetVTSupport(uint32_t *pfCaps); 1980 1986 SUPR0DECL(int) SUPR0GetHwvirtMsrs(PSUPHWVIRTMSRS pMsrs, uint32_t fCaps, bool fForce); -
trunk/include/VBox/types.h
r80331 r80531 365 365 366 366 367 /** A cross context I/O port range handle. */ 368 typedef uint64_t IOMIOPORTHANDLE; 369 /** Pointer to a cross context I/O port handle. */ 370 typedef IOMIOPORTHANDLE *PIOMIOPORTHANDLE; 371 /** A NIL I/O port handle. */ 372 #define NIL_IOMIOPORTHANDLE ((uint64_t)UINT64_MAX) 373 374 /** A cross context MMIO range handle. */ 375 typedef uint64_t IOMMMIOHANDLE; 376 /** Pointer to a cross context MMIO handle. */ 377 typedef IOMMMIOHANDLE *PIOMMMIOHANDLE; 378 /** A NIL MMIO handle. */ 379 #define NIL_IOMMMIOHANDLE ((uint64_t)UINT64_MAX) 380 367 381 /** Pointer to a PDM Base Interface. */ 368 382 typedef struct PDMIBASE *PPDMIBASE; … … 370 384 typedef PPDMIBASE *PPPDMIBASE; 371 385 372 /** Pointer to a PDM Device Instance. */ 373 typedef struct PDMDEVINS *PPDMDEVINS; 374 /** Pointer to a pointer to a PDM Device Instance. */ 386 /** Pointer to a PDM device instance for the current context. */ 387 #ifdef IN_RING3 388 typedef struct PDMDEVINSR3 *PPDMDEVINS; 389 #elif defined(IN_RING0) || defined(DOXYGEN_RUNNING) 390 typedef struct PDMDEVINSR0 *PPDMDEVINS; 391 #else 392 typedef struct PDMDEVINSRC *PPDMDEVINS; 393 #endif 394 /** Pointer to a pointer a PDM device instance for the current context. */ 375 395 typedef PPDMDEVINS *PPPDMDEVINS; 376 /** R3 pointer to a PDM Device Instance. */377 typedef R3PTRTYPE( PPDMDEVINS) PPDMDEVINSR3;378 /** R0 pointer to a PDM Device Instance. */379 typedef R0PTRTYPE( PPDMDEVINS) PPDMDEVINSR0;380 /** RC pointer to a PDM Device Instance. */381 typedef RCPTRTYPE( PPDMDEVINS) PPDMDEVINSRC;396 /** R3 pointer to a PDM device instance. */ 397 typedef R3PTRTYPE(struct PDMDEVINSR3 *) PPDMDEVINSR3; 398 /** R0 pointer to a PDM device instance. */ 399 typedef R0PTRTYPE(struct PDMDEVINSR0 *) PPDMDEVINSR0; 400 /** RC pointer to a PDM device instance. */ 401 typedef RCPTRTYPE(struct PDMDEVINSRC *) PPDMDEVINSRC; 382 402 383 403 /** Pointer to a PDM PCI device structure. */ … … 431 451 432 452 /** Pointer to a timer. */ 433 typedef CTX_SUFF(PTMTIMER) 453 typedef CTX_SUFF(PTMTIMER) PTMTIMER; 434 454 /** Pointer to a pointer to a timer. */ 435 typedef PTMTIMER *PPTMTIMER; 455 typedef PTMTIMER *PPTMTIMER; 456 457 /** A cross context timer handle. */ 458 typedef uint64_t TMTIMERHANDLE; 459 /** Pointer to a cross context timer handle. */ 460 typedef TMTIMERHANDLE *PTMTIMERHANDLE; 461 /** A NIL timer handle. */ 462 #define NIL_TMTIMERHANDLE ((uint64_t)UINT64_MAX) 436 463 437 464 /** SSM Operation handle. */ -
trunk/include/VBox/vmm/apic.h
r80281 r80531 157 157 RT_C_DECLS_BEGIN 158 158 159 #ifdef IN_RING3 160 /** @defgroup grp_apic_r3 The APIC Host Context Ring-3 API 161 * @{ 162 */ 163 VMMR3_INT_DECL(int) APICR3RegisterDevice(struct PDMDEVREGCB *pCallbacks); 164 VMMR3_INT_DECL(void) APICR3InitIpi(PVMCPU pVCpu); 165 VMMR3_INT_DECL(void) APICR3HvEnable(PVM pVM); 166 /** @} */ 167 #endif /* IN_RING3 */ 159 #ifdef VBOX_INCLUDED_vmm_pdmdev_h 160 extern const PDMDEVREG g_DeviceAPIC; 161 #endif 168 162 169 163 /* These functions are exported as they are called from external modules (recompiler). */ … … 202 196 /** @} */ 203 197 198 #ifdef IN_RING3 199 /** @defgroup grp_apic_r3 The APIC Host Context Ring-3 API 200 * @{ 201 */ 202 VMMR3_INT_DECL(int) APICR3RegisterDevice(struct PDMDEVREGCB *pCallbacks); 203 VMMR3_INT_DECL(void) APICR3InitIpi(PVMCPU pVCpu); 204 VMMR3_INT_DECL(void) APICR3HvEnable(PVM pVM); 205 /** @} */ 206 #endif /* IN_RING3 */ 207 204 208 RT_C_DECLS_END 205 209 -
trunk/include/VBox/vmm/gvm.h
r80331 r80531 197 197 } rawpci; 198 198 199 union 200 { 201 #if defined(VMM_INCLUDED_SRC_include_PDMInternal_h) && defined(IN_RING0) 202 struct PDMR0PERVM s; 203 #endif 204 uint8_t padding[1536]; 205 } pdmr0; 206 199 207 /** Padding so aCpus starts on a page boundrary. */ 200 208 #ifdef VBOX_WITH_NEM_R0 201 uint8_t abPadding2[4096 - 64 - 256 - 512 - 256 - 64 - sizeof(PGVMCPU) * VMM_MAX_CPU_COUNT];202 #else 203 uint8_t abPadding2[4096 - 64 - 256 - 512 - 64 - sizeof(PGVMCPU) * VMM_MAX_CPU_COUNT];209 uint8_t abPadding2[4096 - 64 - 256 - 512 - 256 - 64 - 1536 - sizeof(PGVMCPU) * VMM_MAX_CPU_COUNT]; 210 #else 211 uint8_t abPadding2[4096 - 64 - 256 - 512 - 64 - 1536 - sizeof(PGVMCPU) * VMM_MAX_CPU_COUNT]; 204 212 #endif 205 213 … … 223 231 #endif 224 232 AssertCompileMemberAlignment(GVM, rawpci, 64); 233 AssertCompileMemberAlignment(GVM, pdmr0, 64); 225 234 AssertCompileMemberAlignment(GVM, aCpus, 4096); 226 235 AssertCompileSizeAlignment(GVM, 4096); -
trunk/include/VBox/vmm/pdmapi.h
r80346 r80531 131 131 VMMR3DECL(int) PDMR3LdrEnumModules(PVM pVM, PFNPDMR3ENUM pfnCallback, void *pvArg); 132 132 VMMR3_INT_DECL(void) PDMR3LdrRelocateU(PUVM pUVM, RTGCINTPTR offDelta); 133 VMMR3_INT_DECL(int) PDMR3LdrLoadR0(PUVM pUVM, const char *pszModule); 133 134 VMMR3_INT_DECL(int) PDMR3LdrGetSymbolR3(PVM pVM, const char *pszModule, const char *pszSymbol, void **ppvValue); 134 135 VMMR3DECL(int) PDMR3LdrGetSymbolR0(PVM pVM, const char *pszModule, const char *pszSymbol, PRTR0PTR ppvValue); … … 190 191 * @{ 191 192 */ 193 VMMR0_INT_DECL(void) PDMR0Init(void *hMod); 194 VMMR0DECL(int) PDMR0DeviceRegisterModule(void *hMod, struct PDMDEVMODREGR0 *pModReg); 195 VMMR0DECL(int) PDMR0DeviceDeregisterModule(void *hMod, struct PDMDEVMODREGR0 *pModReg); 196 197 VMMR0_INT_DECL(void) PDMR0InitPerVMData(PGVM pGVM); 198 VMMR0_INT_DECL(void) PDMR0CleanupVM(PGVM pGVM); 192 199 193 200 /** … … 239 246 VMMR0_INT_DECL(int) PDMR0DeviceCallReqHandler(PGVM pGVM, PPDMDEVICECALLREQHANDLERREQ pReq); 240 247 248 249 /** 250 * Request buffer for PDMR0DeviceCreateReqHandler / VMMR0_DO_PDM_DEVICE_CREATE. 251 * @see PDMR0DeviceCreateReqHandler. 252 */ 253 typedef struct PDMDEVICECREATEREQ 254 { 255 /** The header. */ 256 SUPVMMR0REQHDR Hdr; 257 /** Out: Where to return the address of the ring-3 device instance. */ 258 PPDMDEVINSR3 pDevInsR3; 259 260 /** Copy of PDMDEVREGR3::fFlags for matching with PDMDEVREGR0::fFlags. */ 261 uint32_t fFlags; 262 /** Copy of PDMDEVREGR3::fClass for matching with PDMDEVREGR0::fFlags. */ 263 uint32_t fClass; 264 /** Copy of PDMDEVREGR3::cMaxInstances for matching with 265 * PDMDEVREGR0::cMaxInstances. */ 266 uint32_t cMaxInstances; 267 /** Copy of PDMDEVREGR3::uSharedVersion for matching with 268 * PDMDEVREGR0::uSharedVersion. */ 269 uint32_t uSharedVersion; 270 /** Copy of PDMDEVREGR3::cbInstanceShared for matching with 271 * PDMDEVREGR0::cbInstanceShared. */ 272 uint32_t cbInstanceShared; 273 /** Copy of PDMDEVREGR3::cbInstanceCC. */ 274 uint32_t cbInstanceR3; 275 /** Copy of PDMDEVREGR3::cbInstanceRC for matching with 276 * PDMDEVREGR0::cbInstanceRC. */ 277 uint32_t cbInstanceRC; 278 279 /** The device instance ordinal. */ 280 uint32_t iInstance; 281 /** Set if the raw-mode component is desired. */ 282 bool fRCEnabled; 283 /** Explicit padding. */ 284 bool afReserved[3]; 285 286 /** In: Device name. */ 287 char szDevName[32]; 288 /** In: The module name (no path). */ 289 char szModName[32]; 290 } PDMDEVICECREATEREQ; 291 /** Pointer to a PDMR0DeviceCreate / VMMR0_DO_PDM_DEVICE_CREATE request buffer. */ 292 typedef PDMDEVICECREATEREQ *PPDMDEVICECREATEREQ; 293 294 VMMR0_INT_DECL(int) PDMR0DeviceCreateReqHandler(PGVM pGVM, PPDMDEVICECREATEREQ pReq); 295 296 /** 297 * The ring-0 device call to make. 298 */ 299 typedef enum PDMDEVICEGENCALL 300 { 301 PDMDEVICEGENCALL_INVALID = 0, 302 PDMDEVICEGENCALL_CONSTRUCT, 303 PDMDEVICEGENCALL_DESTRUCT, 304 PDMDEVICEGENCALL_END, 305 PDMDEVICEGENCALL_32BIT_HACK = 0x7fffffff 306 } PDMDEVICEGENCALL; 307 308 /** 309 * Request buffer for PDMR0DeviceGenCallReqHandler / VMMR0_DO_PDM_DEVICE_GEN_CALL. 310 * @see PDMR0DeviceGenCallReqHandler. 311 */ 312 typedef struct PDMDEVICEGENCALLREQ 313 { 314 /** The header. */ 315 SUPVMMR0REQHDR Hdr; 316 /** The ring-3 device instance. */ 317 PPDMDEVINSR3 pDevInsR3; 318 /** The ring-0 device handle. */ 319 uint32_t idxR0Device; 320 /** The call to make. */ 321 PDMDEVICEGENCALL enmCall; 322 } PDMDEVICEGENCALLREQ; 323 /** Pointer to a PDMR0DeviceGenCallReqHandler / VMMR0_DO_PDM_DEVICE_GEN_CALL request buffer. */ 324 typedef PDMDEVICEGENCALLREQ *PPDMDEVICEGENCALLREQ; 325 326 VMMR0_INT_DECL(int) PDMR0DeviceGenCallReqHandler(PGVM pGVM, PPDMDEVICEGENCALLREQ pReq); 327 328 /** 329 * Request buffer for PDMR0DeviceCompatSetCritSectReqHandler / VMMR0_DO_PDM_DEVICE_COMPAT_SET_CRITSECT 330 * @see PDMR0DeviceCompatSetCritSectReqHandler. 331 */ 332 typedef struct PDMDEVICECOMPATSETCRITSECTREQ 333 { 334 /** The header. */ 335 SUPVMMR0REQHDR Hdr; 336 /** The ring-3 device instance. */ 337 PPDMDEVINSR3 pDevInsR3; 338 /** The ring-0 device handle. */ 339 uint32_t idxR0Device; 340 /** The critical section address (ring-3). */ 341 R3PTRTYPE(PPDMCRITSECT) pCritSectR3; 342 } PDMDEVICECOMPATSETCRITSECTREQ; 343 /** Pointer to a PDMR0DeviceGenCallReqHandler / VMMR0_DO_PDM_DEVICE_GEN_CALL request buffer. */ 344 typedef PDMDEVICECOMPATSETCRITSECTREQ *PPDMDEVICECOMPATSETCRITSECTREQ; 345 346 VMMR0_INT_DECL(int) PDMR0DeviceCompatSetCritSectReqHandler(PGVM pGVM, PPDMDEVICECOMPATSETCRITSECTREQ pReq); 347 348 /** 349 * Request buffer for PDMR0DeviceCompatRegPciDevReqHandler / VMMR0_DO_PDM_DEVICE_COMPAT_REG_PCIDEV 350 * @see PDMR0DeviceCompatRegPciDevReqHandler. 351 */ 352 typedef struct PDMDEVICECOMPATREGPCIDEVREQ 353 { 354 /** The header. */ 355 SUPVMMR0REQHDR Hdr; 356 /** The ring-3 device instance. */ 357 PPDMDEVINSR3 pDevInsR3; 358 /** The ring-0 device handle. */ 359 uint32_t idxR0Device; 360 /** The PCI device address (ring-3). */ 361 R3PTRTYPE(PPDMPCIDEV) pPciDevR3; 362 } PDMDEVICECOMPATREGPCIDEVREQ; 363 /** Pointer to a PDMR0DeviceGenCallReqHandler / VMMR0_DO_PDM_DEVICE_GEN_CALL request buffer. */ 364 typedef PDMDEVICECOMPATREGPCIDEVREQ *PPDMDEVICECOMPATREGPCIDEVREQ; 365 366 VMMR0_INT_DECL(int) PDMR0DeviceCompatRegPciDevReqHandler(PGVM pGVM, PPDMDEVICECOMPATREGPCIDEVREQ pReq); 367 241 368 /** @} */ 242 369 -
trunk/include/VBox/vmm/pdmdev.h
r80253 r80531 46 46 #include <VBox/err.h> /* VINF_EM_DBG_STOP, also 120+ source files expecting this. */ 47 47 #include <iprt/stdarg.h> 48 #include <iprt/list.h> 48 49 49 50 … … 305 306 * This structure is used when registering a device from VBoxInitDevices() in HC 306 307 * Ring-3. PDM will continue use till the VM is terminated. 307 */ 308 typedef struct PDMDEVREG 309 { 310 /** Structure version. PDM_DEVREG_VERSION defines the current version. */ 308 * 309 * @note The first part is the same in every context. 310 */ 311 typedef struct PDMDEVREGR3 312 { 313 /** Structure version. PDM_DEVREGR3_VERSION defines the current version. */ 311 314 uint32_t u32Version; 312 /** Device name. */ 315 /** Reserved, must be zero. */ 316 uint32_t uReserved0; 317 /** Device name, must match the ring-3 one. */ 313 318 char szName[32]; 314 /** Name of the raw-mode context module (no path).315 * Only evalutated if PDM_DEVREG_FLAGS_RC is set. */316 char szRCMod[32];317 /** Name of the ring-0 module (no path).318 * Only evalutated if PDM_DEVREG_FLAGS_R0 is set. */319 char szR0Mod[32];320 /** The description of the device. The UTF-8 string pointed to shall, like this structure,321 * remain unchanged from registration till VM destruction. */322 const char *pszDescription;323 324 319 /** Flags, combination of the PDM_DEVREG_FLAGS_* \#defines. */ 325 320 uint32_t fFlags; … … 328 323 /** Maximum number of instances (per VM). */ 329 324 uint32_t cMaxInstances; 325 /** The shared data structure version number. */ 326 uint32_t uSharedVersion; 330 327 /** Size of the instance data. */ 331 uint32_t cbInstance; 328 uint32_t cbInstanceShared; 329 /** Size of the ring-0 instance data. */ 330 uint32_t cbInstanceCC; 331 /** Size of the raw-mode instance data. */ 332 uint32_t cbInstanceRC; 333 /** Reserved, must be zero. */ 334 uint32_t uReserved1; 335 /** The description of the device. The UTF-8 string pointed to shall, like this structure, 336 * remain unchanged from registration till VM destruction. */ 337 const char *pszDescription; 338 339 /** Name of the raw-mode context module (no path). 340 * Only evalutated if PDM_DEVREG_FLAGS_RC is set. */ 341 const char *pszRCMod; 342 /** Name of the ring-0 module (no path). 343 * Only evalutated if PDM_DEVREG_FLAGS_R0 is set. */ 344 const char *pszR0Mod; 332 345 333 346 /** Construct instance - required. */ … … 339 352 * Critical section NOT entered. */ 340 353 PFNPDMDEVRELOCATE pfnRelocate; 341 342 354 /** 343 355 * Memory setup callback. … … 348 360 */ 349 361 DECLR3CALLBACKMEMBER(void, pfnMemSetup, (PPDMDEVINS pDevIns, PDMDEVMEMSETUPCTX enmCtx)); 350 351 362 /** Power on notification - optional. 352 363 * Critical section is entered. */ … … 379 390 * Critical section is entered. */ 380 391 PFNPDMDEVSOFTRESET pfnSoftReset; 392 393 /** @name Reserved for future extensions, must be zero. 394 * @{ */ 395 DECLR3CALLBACKMEMBER(int, pfnReserved0, (PPDMDEVINS pDevIns)); 396 DECLR3CALLBACKMEMBER(int, pfnReserved1, (PPDMDEVINS pDevIns)); 397 DECLR3CALLBACKMEMBER(int, pfnReserved2, (PPDMDEVINS pDevIns)); 398 DECLR3CALLBACKMEMBER(int, pfnReserved3, (PPDMDEVINS pDevIns)); 399 DECLR3CALLBACKMEMBER(int, pfnReserved4, (PPDMDEVINS pDevIns)); 400 DECLR3CALLBACKMEMBER(int, pfnReserved5, (PPDMDEVINS pDevIns)); 401 DECLR3CALLBACKMEMBER(int, pfnReserved6, (PPDMDEVINS pDevIns)); 402 DECLR3CALLBACKMEMBER(int, pfnReserved7, (PPDMDEVINS pDevIns)); 403 /** @} */ 404 381 405 /** Initialization safty marker. */ 382 406 uint32_t u32VersionEnd; 383 } PDMDEVREG ;407 } PDMDEVREGR3; 384 408 /** Pointer to a PDM Device Structure. */ 385 typedef PDMDEVREG *PPDMDEVREG;409 typedef PDMDEVREGR3 *PPDMDEVREGR3; 386 410 /** Const pointer to a PDM Device Structure. */ 387 typedef PDMDEVREG const *PCPDMDEVREG;388 389 /** Current DEVREG version number. */ 390 #define PDM_DEVREG_VERSION PDM_VERSION_MAKE(0xffff, 2, 1) 411 typedef PDMDEVREGR3 const *PCPDMDEVREGR3; 412 /** Current DEVREGR3 version number. */ 413 #define PDM_DEVREGR3_VERSION PDM_VERSION_MAKE(0xffff, 3, 0) 414 391 415 392 416 /** PDM Device Flags. 393 417 * @{ */ 418 /** This flag is used to indicate that the device has a R0 component. */ 419 #define PDM_DEVREG_FLAGS_R0 UINT32_C(0x00000001) 420 /** Requires the ring-0 component, ignore configuration values. */ 421 #define PDM_DEVREG_FLAGS_REQUIRE_R0 UINT32_C(0x00000002) 422 /** Requires the ring-0 component, ignore configuration values. */ 423 #define PDM_DEVREG_FLAGS_OPT_IN_R0 UINT32_C(0x00000004) 424 394 425 /** This flag is used to indicate that the device has a RC component. */ 395 #define PDM_DEVREG_FLAGS_RC 0x00000001 396 /** This flag is used to indicate that the device has a R0 component. */ 397 #define PDM_DEVREG_FLAGS_R0 0x00000002 426 #define PDM_DEVREG_FLAGS_RC UINT32_C(0x00000010) 427 /** Requires the raw-mode component, ignore configuration values. */ 428 #define PDM_DEVREG_FLAGS_REQUIRE_RC UINT32_C(0x00000020) 429 /** Requires the raw-mode component, ignore configuration values. */ 430 #define PDM_DEVREG_FLAGS_OPT_IN_RC UINT32_C(0x00000040) 398 431 399 432 /** @def PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 400 * The bit count for the current host. */ 433 * The bit count for the current host. 434 * @note Superfluous, but still around for hysterical raisins. */ 401 435 #if HC_ARCH_BITS == 32 402 # define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000010436 # define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT UINT32_C(0x00000100) 403 437 #elif HC_ARCH_BITS == 64 404 # define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000020438 # define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT UINT32_C(0x00000200) 405 439 #else 406 440 # error Unsupported HC_ARCH_BITS value. 407 441 #endif 408 442 /** The host bit count mask. */ 409 #define PDM_DEVREG_FLAGS_HOST_BITS_MASK 0x00000030443 #define PDM_DEVREG_FLAGS_HOST_BITS_MASK UINT32_C(0x00000300) 410 444 411 445 /** The device support only 32-bit guests. */ 412 #define PDM_DEVREG_FLAGS_GUEST_BITS_32 0x00000100446 #define PDM_DEVREG_FLAGS_GUEST_BITS_32 UINT32_C(0x00001000) 413 447 /** The device support only 64-bit guests. */ 414 #define PDM_DEVREG_FLAGS_GUEST_BITS_64 0x00000200448 #define PDM_DEVREG_FLAGS_GUEST_BITS_64 UINT32_C(0x00002000) 415 449 /** The device support both 32-bit & 64-bit guests. */ 416 #define PDM_DEVREG_FLAGS_GUEST_BITS_32_64 0x00000300450 #define PDM_DEVREG_FLAGS_GUEST_BITS_32_64 UINT32_C(0x00003000) 417 451 /** @def PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT 418 452 * The guest bit count for the current compilation. */ 419 453 #if GC_ARCH_BITS == 32 420 # define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_32454 # define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_32 421 455 #elif GC_ARCH_BITS == 64 422 # define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_32_64456 # define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_32_64 423 457 #else 424 458 # error Unsupported GC_ARCH_BITS value. 425 459 #endif 426 460 /** The guest bit count mask. */ 427 #define PDM_DEVREG_FLAGS_GUEST_BITS_MASK 0x00000300461 #define PDM_DEVREG_FLAGS_GUEST_BITS_MASK UINT32_C(0x00003000) 428 462 429 463 /** A convenience. */ 430 #define PDM_DEVREG_FLAGS_DEFAULT_BITS (PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT | PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT) 431 432 /** Indicates that the devices support PAE36 on a 32-bit guest. */ 433 #define PDM_DEVREG_FLAGS_PAE36 0x00001000 464 #define PDM_DEVREG_FLAGS_DEFAULT_BITS (PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT | PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT) 434 465 435 466 /** Indicates that the device needs to be notified before the drivers when suspending. */ 436 #define PDM_DEVREG_FLAGS_FIRST_SUSPEND_NOTIFICATION 0x00002000 437 467 #define PDM_DEVREG_FLAGS_FIRST_SUSPEND_NOTIFICATION UINT32_C(0x00010000) 438 468 /** Indicates that the device needs to be notified before the drivers when powering off. */ 439 #define PDM_DEVREG_FLAGS_FIRST_POWEROFF_NOTIFICATION 0x00004000 440 469 #define PDM_DEVREG_FLAGS_FIRST_POWEROFF_NOTIFICATION UINT32_C(0x00020000) 441 470 /** Indicates that the device needs to be notified before the drivers when resetting. */ 442 #define PDM_DEVREG_FLAGS_FIRST_RESET_NOTIFICATION 0x00008000 471 #define PDM_DEVREG_FLAGS_FIRST_RESET_NOTIFICATION UINT32_C(0x00040000) 472 473 /** This flag is used to indicate that the device has been converted to the 474 * new device style. */ 475 #define PDM_DEVREG_FLAGS_NEW_STYLE UINT32_C(0x80000000) 476 443 477 /** @} */ 444 478 … … 490 524 491 525 526 /** 527 * PDM Device Registration Structure, ring-0. 528 * 529 * This structure is used when registering a device from VBoxInitDevices() in HC 530 * Ring-0. PDM will continue use till the VM is terminated. 531 */ 532 typedef struct PDMDEVREGR0 533 { 534 /** Structure version. PDM_DEVREGR0_VERSION defines the current version. */ 535 uint32_t u32Version; 536 /** Reserved, must be zero. */ 537 uint32_t uReserved0; 538 /** Device name, must match the ring-3 one. */ 539 char szName[32]; 540 /** Flags, combination of the PDM_DEVREG_FLAGS_* \#defines. */ 541 uint32_t fFlags; 542 /** Device class(es), combination of the PDM_DEVREG_CLASS_* \#defines. */ 543 uint32_t fClass; 544 /** Maximum number of instances (per VM). */ 545 uint32_t cMaxInstances; 546 /** The shared data structure version number. */ 547 uint32_t uSharedVersion; 548 /** Size of the instance data. */ 549 uint32_t cbInstanceShared; 550 /** Size of the ring-0 instance data. */ 551 uint32_t cbInstanceCC; 552 /** Size of the raw-mode instance data. */ 553 uint32_t cbInstanceRC; 554 /** Reserved, must be zero. */ 555 uint32_t uReserved1; 556 /** The description of the device. The UTF-8 string pointed to shall, like this structure, 557 * remain unchanged from registration till VM destruction. */ 558 const char *pszDescription; 559 560 /** 561 * Early construction callback (optional). 562 * 563 * This is called right after the device instance structure has been allocated 564 * and before the ring-3 constructor gets called. 565 * 566 * @returns VBox status code. 567 * @param pDevIns The device instance data. 568 * @note The destructure is always called, regardless of the return status. 569 */ 570 DECLR0CALLBACKMEMBER(int, pfnEarlyConstruct, (PPDMDEVINS pDevIns)); 571 572 /** 573 * Regular construction callback (optional). 574 * 575 * This is called after (or during) the ring-3 constructor. 576 * 577 * @returns VBox status code. 578 * @param pDevIns The device instance data. 579 * @note The destructure is always called, regardless of the return status. 580 */ 581 DECLR0CALLBACKMEMBER(int, pfnConstruct, (PPDMDEVINS pDevIns)); 582 583 /** 584 * Destructor (optional). 585 * 586 * This is called after the ring-3 destruction. This is not called if ring-3 587 * fails to trigger it (e.g. process is killed or crashes). 588 * 589 * @param pDevIns The device instance data. 590 */ 591 DECLR0CALLBACKMEMBER(void, pfnDestruct, (PPDMDEVINS pDevIns)); 592 593 /** 594 * Final destructor (optional). 595 * 596 * This is called right before the memory is freed, which happens when the 597 * VM/GVM object is destroyed. This is always called. 598 * 599 * @param pDevIns The device instance data. 600 */ 601 DECLR0CALLBACKMEMBER(void, pfnFinalDestruct, (PPDMDEVINS pDevIns)); 602 603 /** 604 * Generic request handler (optional). 605 * 606 * @param pDevIns The device instance data. 607 * @param uReq Device specific request. 608 * @param uArg Request argument. 609 */ 610 DECLR0CALLBACKMEMBER(int, pfnRequest, (PPDMDEVINS pDevIns, uint32_t uReq, uint64_t uArg)); 611 612 /** @name Reserved for future extensions, must be zero. 613 * @{ */ 614 DECLR0CALLBACKMEMBER(int, pfnReserved0, (PPDMDEVINS pDevIns)); 615 DECLR0CALLBACKMEMBER(int, pfnReserved1, (PPDMDEVINS pDevIns)); 616 DECLR0CALLBACKMEMBER(int, pfnReserved2, (PPDMDEVINS pDevIns)); 617 DECLR0CALLBACKMEMBER(int, pfnReserved3, (PPDMDEVINS pDevIns)); 618 DECLR0CALLBACKMEMBER(int, pfnReserved4, (PPDMDEVINS pDevIns)); 619 DECLR0CALLBACKMEMBER(int, pfnReserved5, (PPDMDEVINS pDevIns)); 620 DECLR0CALLBACKMEMBER(int, pfnReserved6, (PPDMDEVINS pDevIns)); 621 DECLR0CALLBACKMEMBER(int, pfnReserved7, (PPDMDEVINS pDevIns)); 622 /** @} */ 623 624 /** Initialization safty marker. */ 625 uint32_t u32VersionEnd; 626 } PDMDEVREGR0; 627 /** Pointer to a ring-0 PDM device registration structure. */ 628 typedef PDMDEVREGR0 *PPDMDEVREGR0; 629 /** Pointer to a const ring-0 PDM device registration structure. */ 630 typedef PDMDEVREGR0 const *PCPDMDEVREGR0; 631 /** Current DEVREGR0 version number. */ 632 #define PDM_DEVREGR0_VERSION PDM_VERSION_MAKE(0xff80, 1, 0) 633 634 635 /** 636 * PDM Device Registration Structure, raw-mode 637 * 638 * At the moment, this structure is mostly here to match the other two contexts. 639 */ 640 typedef struct PDMDEVREGRC 641 { 642 /** Structure version. PDM_DEVREGRC_VERSION defines the current version. */ 643 uint32_t u32Version; 644 /** Reserved, must be zero. */ 645 uint32_t uReserved0; 646 /** Device name, must match the ring-3 one. */ 647 char szName[32]; 648 /** Flags, combination of the PDM_DEVREG_FLAGS_* \#defines. */ 649 uint32_t fFlags; 650 /** Device class(es), combination of the PDM_DEVREG_CLASS_* \#defines. */ 651 uint32_t fClass; 652 /** Maximum number of instances (per VM). */ 653 uint32_t cMaxInstances; 654 /** The shared data structure version number. */ 655 uint32_t uSharedVersion; 656 /** Size of the instance data. */ 657 uint32_t cbInstanceShared; 658 /** Size of the ring-0 instance data. */ 659 uint32_t cbInstanceCC; 660 /** Size of the raw-mode instance data. */ 661 uint32_t cbInstanceRC; 662 /** Reserved, must be zero. */ 663 uint32_t uReserved1; 664 /** The description of the device. The UTF-8 string pointed to shall, like this structure, 665 * remain unchanged from registration till VM destruction. */ 666 const char *pszDescription; 667 668 /** 669 * Constructor callback. 670 * 671 * This is called much later than both the ring-0 and ring-3 constructors, since 672 * raw-mode v2 require a working VMM to run actual code. 673 * 674 * @returns VBox status code. 675 * @param pDevIns The device instance data. 676 * @note The destructure is always called, regardless of the return status. 677 */ 678 DECLRGCALLBACKMEMBER(int, pfnConstruct, (PPDMDEVINS pDevIns)); 679 680 /** @name Reserved for future extensions, must be zero. 681 * @{ */ 682 DECLRCCALLBACKMEMBER(int, pfnReserved0, (PPDMDEVINS pDevIns)); 683 DECLRCCALLBACKMEMBER(int, pfnReserved1, (PPDMDEVINS pDevIns)); 684 DECLRCCALLBACKMEMBER(int, pfnReserved2, (PPDMDEVINS pDevIns)); 685 DECLRCCALLBACKMEMBER(int, pfnReserved3, (PPDMDEVINS pDevIns)); 686 DECLRCCALLBACKMEMBER(int, pfnReserved4, (PPDMDEVINS pDevIns)); 687 DECLRCCALLBACKMEMBER(int, pfnReserved5, (PPDMDEVINS pDevIns)); 688 DECLRCCALLBACKMEMBER(int, pfnReserved6, (PPDMDEVINS pDevIns)); 689 DECLRCCALLBACKMEMBER(int, pfnReserved7, (PPDMDEVINS pDevIns)); 690 /** @} */ 691 692 /** Initialization safty marker. */ 693 uint32_t u32VersionEnd; 694 } PDMDEVREGRC; 695 /** Pointer to a raw-mode PDM device registration structure. */ 696 typedef PDMDEVREGRC *PPDMDEVREGRC; 697 /** Pointer to a const raw-mode PDM device registration structure. */ 698 typedef PDMDEVREGRC const *PCPDMDEVREGRC; 699 /** Current DEVREGRC version number. */ 700 #define PDM_DEVREGRC_VERSION PDM_VERSION_MAKE(0xff81, 1, 0) 701 702 703 704 /** @def PDM_DEVREG_VERSION 705 * Current DEVREG version number. */ 706 /** @typedef PDMDEVREGR3 707 * A current context PDM device registration structure. */ 708 /** @typedef PPDMDEVREGR3 709 * Pointer to a current context PDM device registration structure. */ 710 /** @typedef PCPDMDEVREGR3 711 * Pointer to a const current context PDM device registration structure. */ 712 #if defined(IN_RING3) || defined(DOXYGEN_RUNNING) 713 # define PDM_DEVREG_VERSION PDM_DEVREGR3_VERSION 714 typedef PDMDEVREGR3 PDMDEVREG; 715 typedef PPDMDEVREGR3 PPDMDEVREG; 716 typedef PCPDMDEVREGR3 PCPDMDEVREG; 717 #elif defined(IN_RING0) 718 # define PDM_DEVREG_VERSION PDM_DEVREGR0_VERSION 719 typedef PDMDEVREGR0 PDMDEVREG; 720 typedef PPDMDEVREGR0 PPDMDEVREG; 721 typedef PCPDMDEVREGR0 PCPDMDEVREG; 722 #elif defined(IN_RC) 723 # define PDM_DEVREG_VERSION PDM_DEVREGRC_VERSION 724 typedef PDMDEVREGRC PDMDEVREG; 725 typedef PPDMDEVREGRC PPDMDEVREG; 726 typedef PCPDMDEVREGRC PCPDMDEVREG; 727 #else 728 # error "Not IN_RING3, IN_RING0 or IN_RC" 729 #endif 730 731 732 /** 733 * Device registrations for ring-0 modules. 734 * 735 * This structure is used directly and must therefore reside in persistent 736 * memory (i.e. the data section). 737 */ 738 typedef struct PDMDEVMODREGR0 739 { 740 /** The structure version (PDM_DEVMODREGR0_VERSION). */ 741 uint32_t u32Version; 742 /** Number of devices in the array papDevRegs points to. */ 743 uint32_t cDevRegs; 744 /** Pointer to device registration structures. */ 745 PCPDMDEVREGR0 *papDevRegs; 746 /** The ring-0 module handle - PDM internal, fingers off. */ 747 void *hMod; 748 /** List entry - PDM internal, fingers off. */ 749 RTLISTNODE ListEntry; 750 } PDMDEVMODREGR0; 751 /** Pointer to device registriations for a ring-0 module. */ 752 typedef PDMDEVMODREGR0 *PPDMDEVMODREGR0; 753 /** Current PDMDEVMODREGR0 version number. */ 754 #define PDM_DEVMODREGR0_VERSION PDM_VERSION_MAKE(0xff85, 1, 0) 755 756 492 757 /** @name IRQ Level for use with the *SetIrq APIs. 493 758 * @{ … … 1890 2155 1891 2156 /** Current PDMDEVHLPR3 version number. */ 1892 #define PDM_DEVHLPR3_VERSION PDM_VERSION_MAKE_PP(0xffe7, 2 3, 0)2157 #define PDM_DEVHLPR3_VERSION PDM_VERSION_MAKE_PP(0xffe7, 24, 0) 1893 2158 1894 2159 /** … … 1899 2164 /** Structure version. PDM_DEVHLPR3_VERSION defines the current version. */ 1900 2165 uint32_t u32Version; 2166 2167 /** 2168 * Creates a range of I/O ports for a device. 2169 * 2170 * The I/O port range must be mapped in a separately call. Any ring-0 and 2171 * raw-mode context callback handlers needs to be set up in the respective 2172 * contexts. 2173 * 2174 * @returns VBox status. 2175 * @param pDevIns The device instance to register the ports with. 2176 * @param cPorts Number of ports to register. 2177 * @param fFlag Reserved, MBZ. 2178 * @param pPciDev The PCI device the range is associated with, if 2179 * applicable. 2180 * @param iPciRegion The PCI device region in the high 16-bit word and 2181 * sub-region in the low 16-bit word. UINT32_MAX if NA. 2182 * @param pfnOut Pointer to function which is gonna handle OUT 2183 * operations. Optional. 2184 * @param pfnIn Pointer to function which is gonna handle IN operations. 2185 * Optional. 2186 * @param pfnOutStr Pointer to function which is gonna handle string OUT 2187 * operations. Optional. 2188 * @param pfnInStr Pointer to function which is gonna handle string IN 2189 * operations. Optional. 2190 * @param pvUser User argument to pass to the callbacks. 2191 * @param pszDesc Pointer to description string. This must not be freed. 2192 * @param phIoPorts Where to return the I/O port range handle. 2193 * 2194 * @remarks Caller enters the device critical section prior to invoking the 2195 * registered callback methods. 2196 * 2197 * @sa PDMDevHlpIoPortSetUpContext, PDMDevHlpIoPortMap, 2198 * PDMDevHlpIoPortUnmap. 2199 */ 2200 DECLR3CALLBACKMEMBER(int, pfnIoPortCreateEx,(PPDMDEVINS pDevIns, RTIOPORT cPorts, 2201 uint32_t fFlags, PPDMPCIDEV pPciDev, uint32_t iPciRegion, 2202 PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn, 2203 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, 2204 RTR3PTR pvUser, const char *pszDesc, PIOMIOPORTHANDLE phIoPorts)); 2205 2206 /** 2207 * Maps an I/O port range. 2208 * 2209 * @returns VBox status. 2210 * @param pDevIns The device instance to register the ports with. 2211 * @param hIoPorts The I/O port range handle. 2212 * @param Port Where to map the range. 2213 * @sa PDMDevHlpIoPortUnmap, PDMDevHlpIoPortSetUpContext, 2214 * PDMDevHlpIoPortCreate, PDMDevHlpIoPortCreateEx. 2215 */ 2216 DECLR3CALLBACKMEMBER(int, pfnIoPortMap,(PPDMDEVINS pDevIns, IOMIOPORTHANDLE hIoPorts, RTIOPORT Port)); 2217 2218 /** 2219 * Unmaps an I/O port range. 2220 * 2221 * @returns VBox status. 2222 * @param pDevIns The device instance to register the ports with. 2223 * @param hIoPorts The I/O port range handle. 2224 * @sa PDMDevHlpIoPortMap, PDMDevHlpIoPortSetUpContext, 2225 * PDMDevHlpIoPortCreate, PDMDevHlpIoPortCreateEx. 2226 */ 2227 DECLR3CALLBACKMEMBER(int, pfnIoPortUnmap,(PPDMDEVINS pDevIns, IOMIOPORTHANDLE hIoPorts)); 1901 2228 1902 2229 /** … … 1919 2246 * @remarks Caller enters the device critical section prior to invoking the 1920 2247 * registered callback methods. 2248 * @deprecated 1921 2249 */ 1922 2250 DECLR3CALLBACKMEMBER(int, pfnIOPortRegister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTHCPTR pvUser, … … 1945 2273 * @remarks Caller enters the device critical section prior to invoking the 1946 2274 * registered callback methods. 2275 * @deprecated 1947 2276 */ 1948 2277 DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterRC,(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTRCPTR pvUser, … … 1968 2297 * @remarks Caller enters the device critical section prior to invoking the 1969 2298 * registered callback methods. 2299 * @deprecated 1970 2300 */ 1971 2301 DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterR0,(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTR0PTR pvUser, … … 1984 2314 */ 1985 2315 DECLR3CALLBACKMEMBER(int, pfnIOPortDeregister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts)); 2316 2317 /** 2318 * Creates a memory mapped I/O (MMIO) region for a device. 2319 * 2320 * The MMIO region must be mapped in a separately call. Any ring-0 and 2321 * raw-mode context callback handlers needs to be set up in the respective 2322 * contexts. 2323 * 2324 * @returns VBox status. 2325 * @param pDevIns The device instance to register the ports with. 2326 * @param cbRegion The size of the region in bytes. 2327 * @param fFlag Reserved, MBZ. 2328 * @param pPciDev The PCI device the range is associated with, if 2329 * applicable. 2330 * @param iPciRegion The PCI device region in the high 16-bit word and 2331 * sub-region in the low 16-bit word. UINT32_MAX if NA. 2332 * @param pfnWrite Pointer to function which is gonna handle Write 2333 * operations. 2334 * @param pfnRead Pointer to function which is gonna handle Read 2335 * operations. 2336 * @param pfnFill Pointer to function which is gonna handle Fill/memset 2337 * operations. (optional) 2338 * @param pvUser User argument to pass to the callbacks. 2339 * @param pszDesc Pointer to description string. This must not be freed. 2340 * @param phRegion Where to return the MMIO region handle. 2341 * 2342 * @remarks Caller enters the device critical section prior to invoking the 2343 * registered callback methods. 2344 * 2345 * @sa PDMDevHlpMmioSetUpContext, PDMDevHlpMmioMap, PDMDevHlpMmioUnmap. 2346 */ 2347 DECLR3CALLBACKMEMBER(int, pfnMmioCreateEx,(PPDMDEVINS pDevIns, RTGCPHYS cbRegion, 2348 uint32_t fFlags, PPDMPCIDEV pPciDev, uint32_t iPciRegion, 2349 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill, 2350 void *pvUser, const char *pszDesc, PIOMMMIOHANDLE phRegion)); 2351 2352 /** 2353 * Maps a memory mapped I/O (MMIO) region. 2354 * 2355 * @returns VBox status. 2356 * @param pDevIns The device instance the region is associated with. 2357 * @param hRegion The MMIO region handle. 2358 * @param GCPhys Where to map the region. 2359 * @sa PDMDevHlpMmioUnmap, PDMDevHlpMmioCreate, PDMDevHlpMmioCreateEx, 2360 * PDMDevHlpMmioSetUpContext 2361 */ 2362 DECLR3CALLBACKMEMBER(int, pfnMmioMap,(PPDMDEVINS pDevIns, IOMMMIOHANDLE hRegion, RTGCPHYS GCPhys)); 2363 2364 /** 2365 * Maps a memory mapped I/O (MMIO) region. 2366 * 2367 * @returns VBox status. 2368 * @param pDevIns The device instance the region is associated with. 2369 * @param hRegion The MMIO region handle. 2370 * @sa PDMDevHlpMmioMap, PDMDevHlpMmioCreate, PDMDevHlpMmioCreateEx, 2371 * PDMDevHlpMmioSetUpContext 2372 */ 2373 DECLR3CALLBACKMEMBER(int, pfnMmioUnmap,(PPDMDEVINS pDevIns, IOMMMIOHANDLE hRegion)); 2374 2375 /** 2376 * Reduces the length of a MMIO range. 2377 * 2378 * This is for implementations of PDMPCIDEV::pfnRegionLoadChangeHookR3 and will 2379 * only work during saved state restore. It will not call the PCI bus code, as 2380 * that is expected to restore the saved resource configuration. 2381 * 2382 * It just adjusts the mapping length of the region so that when pfnMmioMap is 2383 * called it will only map @a cbRegion bytes and not the value set during 2384 * registration. 2385 * 2386 * @return VBox status code. 2387 * @param pDevIns The device owning the range. 2388 * @param hRegion The MMIO region handle. 2389 * @param cbRegion The new size, must be smaller. 2390 */ 2391 DECLR3CALLBACKMEMBER(int, pfnMmioReduce,(PPDMDEVINS pDevIns, IOMMMIOHANDLE hRegion, RTGCPHYS cbRegion)); 1986 2392 1987 2393 /** … … 2004 2410 * @remarks Caller enters the device critical section prior to invoking the 2005 2411 * registered callback methods. 2412 * @deprecated 2006 2413 */ 2007 2414 DECLR3CALLBACKMEMBER(int, pfnMMIORegister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTGCPHYS cbRange, RTHCPTR pvUser, … … 2026 2433 * @remarks Caller enters the device critical section prior to invoking the 2027 2434 * registered callback methods. 2435 * @deprecated 2028 2436 */ 2029 2437 DECLR3CALLBACKMEMBER(int, pfnMMIORegisterRC,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTGCPHYS cbRange, RTRCPTR pvUser, … … 2047 2455 * @remarks Caller enters the device critical section prior to invoking the 2048 2456 * registered callback methods. 2457 * @deprecated 2049 2458 */ 2050 2459 DECLR3CALLBACKMEMBER(int, pfnMMIORegisterR0,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTGCPHYS cbRange, RTR0PTR pvUser, … … 2060 2469 * @param GCPhysStart First physical address in the range. 2061 2470 * @param cbRange The size of the range (in bytes). 2471 * @deprecated 2062 2472 */ 2063 2473 DECLR3CALLBACKMEMBER(int, pfnMMIODeregister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTGCPHYS cbRange)); … … 2066 2476 * Allocate and register a MMIO2 region. 2067 2477 * 2068 * As mentioned elsewhere, MMIO2 is just RAM spelled differently. It's2069 * RAM associated with a device. It is also non-shared memory with a2070 * permanentring-3 mapping and page backing (presently).2478 * As mentioned elsewhere, MMIO2 is just RAM spelled differently. It's RAM 2479 * associated with a device. It is also non-shared memory with a permanent 2480 * ring-3 mapping and page backing (presently). 2071 2481 * 2072 2482 * @returns VBox status. … … 2133 2543 * @sa PDMDevHlpMMIOExMap, PDMDevHlpMMIOExUnmap, PDMDevHlpMMIOExDeregister, 2134 2544 * PDMDevHlpMMIORegisterEx 2545 * @deprecated 2135 2546 */ 2136 2547 DECLR3CALLBACKMEMBER(int, pfnMMIOExPreRegister,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion, RTGCPHYS cbRegion, … … 2152 2563 * @param iRegion The region number used during registration. 2153 2564 * @thread EMT. 2565 * @deprecated for MMIO 2154 2566 */ 2155 2567 DECLR3CALLBACKMEMBER(int, pfnMMIOExDeregister,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion)); … … 2171 2583 * @param GCPhys The physical address to map it at. 2172 2584 * @thread EMT. 2585 * @deprecated for MMIO 2173 2586 */ 2174 2587 DECLR3CALLBACKMEMBER(int, pfnMMIOExMap,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion, RTGCPHYS GCPhys)); … … 2184 2597 * @param GCPhys The physical address it's currently mapped at. 2185 2598 * @thread EMT. 2599 * @deprecated for MMIO 2186 2600 */ 2187 2601 DECLR3CALLBACKMEMBER(int, pfnMMIOExUnmap,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion, RTGCPHYS GCPhys)); … … 2317 2731 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone)); 2318 2732 2733 /** @name Exported SSM Functions 2734 * @{ */ 2735 DECLR3CALLBACKMEMBER(int, pfnSSMPutStruct,(PSSMHANDLE pSSM, const void *pvStruct, PCSSMFIELD paFields)); 2736 DECLR3CALLBACKMEMBER(int, pfnSSMPutStructEx,(PSSMHANDLE pSSM, const void *pvStruct, size_t cbStruct, uint32_t fFlags, PCSSMFIELD paFields, void *pvUser)); 2737 DECLR3CALLBACKMEMBER(int, pfnSSMPutBool,(PSSMHANDLE pSSM, bool fBool)); 2738 DECLR3CALLBACKMEMBER(int, pfnSSMPutU8,(PSSMHANDLE pSSM, uint8_t u8)); 2739 DECLR3CALLBACKMEMBER(int, pfnSSMPutS8,(PSSMHANDLE pSSM, int8_t i8)); 2740 DECLR3CALLBACKMEMBER(int, pfnSSMPutU16,(PSSMHANDLE pSSM, uint16_t u16)); 2741 DECLR3CALLBACKMEMBER(int, pfnSSMPutS16,(PSSMHANDLE pSSM, int16_t i16)); 2742 DECLR3CALLBACKMEMBER(int, pfnSSMPutU32,(PSSMHANDLE pSSM, uint32_t u32)); 2743 DECLR3CALLBACKMEMBER(int, pfnSSMPutS32,(PSSMHANDLE pSSM, int32_t i32)); 2744 DECLR3CALLBACKMEMBER(int, pfnSSMPutU64,(PSSMHANDLE pSSM, uint64_t u64)); 2745 DECLR3CALLBACKMEMBER(int, pfnSSMPutS64,(PSSMHANDLE pSSM, int64_t i64)); 2746 DECLR3CALLBACKMEMBER(int, pfnSSMPutU128,(PSSMHANDLE pSSM, uint128_t u128)); 2747 DECLR3CALLBACKMEMBER(int, pfnSSMPutS128,(PSSMHANDLE pSSM, int128_t i128)); 2748 DECLR3CALLBACKMEMBER(int, pfnSSMPutUInt,(PSSMHANDLE pSSM, RTUINT u)); 2749 DECLR3CALLBACKMEMBER(int, pfnSSMPutSInt,(PSSMHANDLE pSSM, RTINT i)); 2750 DECLR3CALLBACKMEMBER(int, pfnSSMPutGCUInt,(PSSMHANDLE pSSM, RTGCUINT u)); 2751 DECLR3CALLBACKMEMBER(int, pfnSSMPutGCUIntReg,(PSSMHANDLE pSSM, RTGCUINTREG u)); 2752 DECLR3CALLBACKMEMBER(int, pfnSSMPutGCPhys32,(PSSMHANDLE pSSM, RTGCPHYS32 GCPhys)); 2753 DECLR3CALLBACKMEMBER(int, pfnSSMPutGCPhys64,(PSSMHANDLE pSSM, RTGCPHYS64 GCPhys)); 2754 DECLR3CALLBACKMEMBER(int, pfnSSMPutGCPhys,(PSSMHANDLE pSSM, RTGCPHYS GCPhys)); 2755 DECLR3CALLBACKMEMBER(int, pfnSSMPutGCPtr,(PSSMHANDLE pSSM, RTGCPTR GCPtr)); 2756 DECLR3CALLBACKMEMBER(int, pfnSSMPutGCUIntPtr,(PSSMHANDLE pSSM, RTGCUINTPTR GCPtr)); 2757 DECLR3CALLBACKMEMBER(int, pfnSSMPutRCPtr,(PSSMHANDLE pSSM, RTRCPTR RCPtr)); 2758 DECLR3CALLBACKMEMBER(int, pfnSSMPutIOPort,(PSSMHANDLE pSSM, RTIOPORT IOPort)); 2759 DECLR3CALLBACKMEMBER(int, pfnSSMPutSel,(PSSMHANDLE pSSM, RTSEL Sel)); 2760 DECLR3CALLBACKMEMBER(int, pfnSSMPutMem,(PSSMHANDLE pSSM, const void *pv, size_t cb)); 2761 DECLR3CALLBACKMEMBER(int, pfnSSMPutStrZ,(PSSMHANDLE pSSM, const char *psz)); 2762 DECLR3CALLBACKMEMBER(int, pfnSSMGetStruct,(PSSMHANDLE pSSM, void *pvStruct, PCSSMFIELD paFields)); 2763 DECLR3CALLBACKMEMBER(int, pfnSSMGetStructEx,(PSSMHANDLE pSSM, void *pvStruct, size_t cbStruct, uint32_t fFlags, PCSSMFIELD paFields, void *pvUser)); 2764 DECLR3CALLBACKMEMBER(int, pfnSSMGetBool,(PSSMHANDLE pSSM, bool *pfBool)); 2765 DECLR3CALLBACKMEMBER(int, pfnSSMGetU8,(PSSMHANDLE pSSM, uint8_t *pu8)); 2766 DECLR3CALLBACKMEMBER(int, pfnSSMGetS8,(PSSMHANDLE pSSM, int8_t *pi8)); 2767 DECLR3CALLBACKMEMBER(int, pfnSSMGetU16,(PSSMHANDLE pSSM, uint16_t *pu16)); 2768 DECLR3CALLBACKMEMBER(int, pfnSSMGetS16,(PSSMHANDLE pSSM, int16_t *pi16)); 2769 DECLR3CALLBACKMEMBER(int, pfnSSMGetU32,(PSSMHANDLE pSSM, uint32_t *pu32)); 2770 DECLR3CALLBACKMEMBER(int, pfnSSMGetS32,(PSSMHANDLE pSSM, int32_t *pi32)); 2771 DECLR3CALLBACKMEMBER(int, pfnSSMGetU64,(PSSMHANDLE pSSM, uint64_t *pu64)); 2772 DECLR3CALLBACKMEMBER(int, pfnSSMGetS64,(PSSMHANDLE pSSM, int64_t *pi64)); 2773 DECLR3CALLBACKMEMBER(int, pfnSSMGetU128,(PSSMHANDLE pSSM, uint128_t *pu128)); 2774 DECLR3CALLBACKMEMBER(int, pfnSSMGetS128,(PSSMHANDLE pSSM, int128_t *pi128)); 2775 DECLR3CALLBACKMEMBER(int, pfnSSMGetUInt,(PSSMHANDLE pSSM, PRTUINT pu)); 2776 DECLR3CALLBACKMEMBER(int, pfnSSMGetSInt,(PSSMHANDLE pSSM, PRTINT pi)); 2777 DECLR3CALLBACKMEMBER(int, pfnSSMGetGCUInt,(PSSMHANDLE pSSM, PRTGCUINT pu)); 2778 DECLR3CALLBACKMEMBER(int, pfnSSMGetGCUIntReg,(PSSMHANDLE pSSM, PRTGCUINTREG pu)); 2779 DECLR3CALLBACKMEMBER(int, pfnSSMGetGCPhys32,(PSSMHANDLE pSSM, PRTGCPHYS32 pGCPhys)); 2780 DECLR3CALLBACKMEMBER(int, pfnSSMGetGCPhys64,(PSSMHANDLE pSSM, PRTGCPHYS64 pGCPhys)); 2781 DECLR3CALLBACKMEMBER(int, pfnSSMGetGCPhys,(PSSMHANDLE pSSM, PRTGCPHYS pGCPhys)); 2782 DECLR3CALLBACKMEMBER(int, pfnSSMGetGCPtr,(PSSMHANDLE pSSM, PRTGCPTR pGCPtr)); 2783 DECLR3CALLBACKMEMBER(int, pfnSSMGetGCUIntPtr,(PSSMHANDLE pSSM, PRTGCUINTPTR pGCPtr)); 2784 DECLR3CALLBACKMEMBER(int, pfnSSMGetRCPtr,(PSSMHANDLE pSSM, PRTRCPTR pRCPtr)); 2785 DECLR3CALLBACKMEMBER(int, pfnSSMGetIOPort,(PSSMHANDLE pSSM, PRTIOPORT pIOPort)); 2786 DECLR3CALLBACKMEMBER(int, pfnSSMGetSel,(PSSMHANDLE pSSM, PRTSEL pSel)); 2787 DECLR3CALLBACKMEMBER(int, pfnSSMGetMem,(PSSMHANDLE pSSM, void *pv, size_t cb)); 2788 DECLR3CALLBACKMEMBER(int, pfnSSMGetStrZ,(PSSMHANDLE pSSM, char *psz, size_t cbMax)); 2789 DECLR3CALLBACKMEMBER(int, pfnSSMGetStrZEx,(PSSMHANDLE pSSM, char *psz, size_t cbMax, size_t *pcbStr)); 2790 DECLR3CALLBACKMEMBER(int, pfnSSMSkip,(PSSMHANDLE pSSM, size_t cb)); 2791 DECLR3CALLBACKMEMBER(int, pfnSSMSkipToEndOfUnit,(PSSMHANDLE pSSM)); 2792 DECLR3CALLBACKMEMBER(int, pfnSSMSetLoadError,(PSSMHANDLE pSSM, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...) RT_IPRT_FORMAT_ATTR(6, 7)); 2793 DECLR3CALLBACKMEMBER(int, pfnSSMSetLoadErrorV,(PSSMHANDLE pSSM, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va) RT_IPRT_FORMAT_ATTR(6, 0)); 2794 DECLR3CALLBACKMEMBER(int, pfnSSMSetCfgError,(PSSMHANDLE pSSM, RT_SRC_POS_DECL, const char *pszFormat, ...) RT_IPRT_FORMAT_ATTR(5, 6)); 2795 DECLR3CALLBACKMEMBER(int, pfnSSMSetCfgErrorV,(PSSMHANDLE pSSM, RT_SRC_POS_DECL, const char *pszFormat, va_list va) RT_IPRT_FORMAT_ATTR(5, 0)); 2796 DECLR3CALLBACKMEMBER(int, pfnSSMHandleGetStatus,(PSSMHANDLE pSSM)); 2797 DECLR3CALLBACKMEMBER(SSMAFTER, pfnSSMHandleGetAfter,(PSSMHANDLE pSSM)); 2798 DECLR3CALLBACKMEMBER(bool, pfnSSMHandleIsLiveSave,(PSSMHANDLE pSSM)); 2799 DECLR3CALLBACKMEMBER(uint32_t, pfnSSMHandleMaxDowntime,(PSSMHANDLE pSSM)); 2800 DECLR3CALLBACKMEMBER(uint32_t, pfnSSMHandleHostBits,(PSSMHANDLE pSSM)); 2801 DECLR3CALLBACKMEMBER(uint32_t, pfnSSMHandleRevision,(PSSMHANDLE pSSM)); 2802 DECLR3CALLBACKMEMBER(uint32_t, pfnSSMHandleVersion,(PSSMHANDLE pSSM)); 2803 /** @} */ 2804 2319 2805 /** 2320 2806 * Creates a timer. … … 2336 2822 2337 2823 /** 2824 * Creates a timer w/ a cross context handle. 2825 * 2826 * @returns VBox status. 2827 * @param pDevIns The device instance. 2828 * @param enmClock The clock to use on this timer. 2829 * @param pfnCallback Callback function. 2830 * @param pvUser User argument for the callback. 2831 * @param fFlags Flags, see TMTIMER_FLAGS_*. 2832 * @param pszDesc Pointer to description string which must stay around 2833 * until the timer is fully destroyed (i.e. a bit after TMTimerDestroy()). 2834 * @param phTimer Where to store the timer handle on success. 2835 * @remarks Caller enters the device critical section prior to invoking the 2836 * callback. 2837 */ 2838 DECLR3CALLBACKMEMBER(int, pfnTimerCreate,(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, 2839 void *pvUser, uint32_t fFlags, const char *pszDesc, PTMTIMERHANDLE phTimer)); 2840 2841 /** 2842 * Translates a timer handle to a pointer. 2843 * 2844 * @returns The time address. 2845 * @param pDevIns The device instance. 2846 * @param hTimer The timer handle. 2847 */ 2848 DECLR3CALLBACKMEMBER(PTMTIMERR3, pfnTimerToPtr,(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer)); 2849 2850 /** @name Timer handle method wrappers 2851 * @{ */ 2852 DECLR3CALLBACKMEMBER(uint64_t, pfnTimerFromMicro,(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer, uint64_t cMicroSecs)); 2853 DECLR3CALLBACKMEMBER(uint64_t, pfnTimerFromMilli,(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer, uint64_t cMilliSecs)); 2854 DECLR3CALLBACKMEMBER(uint64_t, pfnTimerFromNano,(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer, uint64_t cNanoSecs)); 2855 DECLR3CALLBACKMEMBER(uint64_t, pfnTimerGet,(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer)); 2856 DECLR3CALLBACKMEMBER(uint64_t, pfnTimerGetFreq,(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer)); 2857 DECLR3CALLBACKMEMBER(uint64_t, pfnTimerGetNano,(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer)); 2858 DECLR3CALLBACKMEMBER(bool, pfnTimerIsActive,(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer)); 2859 DECLR3CALLBACKMEMBER(bool, pfnTimerIsLockOwner,(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer)); 2860 DECLR3CALLBACKMEMBER(int, pfnTimerLock,(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer, int rcBusy)); 2861 DECLR3CALLBACKMEMBER(int, pfnTimerSet,(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer, uint64_t uExpire)); 2862 DECLR3CALLBACKMEMBER(int, pfnTimerSetFrequencyHint,(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer, uint32_t uHz)); 2863 DECLR3CALLBACKMEMBER(int, pfnTimerSetMicro,(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer, uint64_t cMicrosToNext)); 2864 DECLR3CALLBACKMEMBER(int, pfnTimerSetMillies,(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer, uint64_t cMilliesToNext)); 2865 DECLR3CALLBACKMEMBER(int, pfnTimerSetNano,(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer, uint64_t cNanosToNext)); 2866 DECLR3CALLBACKMEMBER(int, pfnTimerSetRelative,(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer, uint64_t cTicksToNext, uint64_t *pu64Now)); 2867 DECLR3CALLBACKMEMBER(int, pfnTimerStop,(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer)); 2868 DECLR3CALLBACKMEMBER(void, pfnTimerUnlock,(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer)); 2869 DECLR3CALLBACKMEMBER(int, pfnTimerSave,(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer, PSSMHANDLE pSSM)); 2870 DECLR3CALLBACKMEMBER(int, pfnTimerLoad,(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer, PSSMHANDLE pSSM)); 2871 /** @} */ 2872 2873 /** 2338 2874 * Get the real world UTC time adjusted for VM lag, user offset and warpdrive. 2339 2875 * … … 2343 2879 */ 2344 2880 DECLR3CALLBACKMEMBER(PRTTIMESPEC, pfnTMUtcNow,(PPDMDEVINS pDevIns, PRTTIMESPEC pTime)); 2881 2882 /** @name Exported CFGM Functions. 2883 * @{ */ 2884 DECLR3CALLBACKMEMBER(bool, pfnCFGMExists,( PCFGMNODE pNode, const char *pszName)); 2885 DECLR3CALLBACKMEMBER(int, pfnCFGMQueryType,( PCFGMNODE pNode, const char *pszName, PCFGMVALUETYPE penmType)); 2886 DECLR3CALLBACKMEMBER(int, pfnCFGMQuerySize,( PCFGMNODE pNode, const char *pszName, size_t *pcb)); 2887 DECLR3CALLBACKMEMBER(int, pfnCFGMQueryInteger,( PCFGMNODE pNode, const char *pszName, uint64_t *pu64)); 2888 DECLR3CALLBACKMEMBER(int, pfnCFGMQueryIntegerDef,( PCFGMNODE pNode, const char *pszName, uint64_t *pu64, uint64_t u64Def)); 2889 DECLR3CALLBACKMEMBER(int, pfnCFGMQueryString,( PCFGMNODE pNode, const char *pszName, char *pszString, size_t cchString)); 2890 DECLR3CALLBACKMEMBER(int, pfnCFGMQueryStringDef,( PCFGMNODE pNode, const char *pszName, char *pszString, size_t cchString, const char *pszDef)); 2891 DECLR3CALLBACKMEMBER(int, pfnCFGMQueryBytes,( PCFGMNODE pNode, const char *pszName, void *pvData, size_t cbData)); 2892 DECLR3CALLBACKMEMBER(int, pfnCFGMQueryU64,( PCFGMNODE pNode, const char *pszName, uint64_t *pu64)); 2893 DECLR3CALLBACKMEMBER(int, pfnCFGMQueryU64Def,( PCFGMNODE pNode, const char *pszName, uint64_t *pu64, uint64_t u64Def)); 2894 DECLR3CALLBACKMEMBER(int, pfnCFGMQueryS64,( PCFGMNODE pNode, const char *pszName, int64_t *pi64)); 2895 DECLR3CALLBACKMEMBER(int, pfnCFGMQueryS64Def,( PCFGMNODE pNode, const char *pszName, int64_t *pi64, int64_t i64Def)); 2896 DECLR3CALLBACKMEMBER(int, pfnCFGMQueryU32,( PCFGMNODE pNode, const char *pszName, uint32_t *pu32)); 2897 DECLR3CALLBACKMEMBER(int, pfnCFGMQueryU32Def,( PCFGMNODE pNode, const char *pszName, uint32_t *pu32, uint32_t u32Def)); 2898 DECLR3CALLBACKMEMBER(int, pfnCFGMQueryS32,( PCFGMNODE pNode, const char *pszName, int32_t *pi32)); 2899 DECLR3CALLBACKMEMBER(int, pfnCFGMQueryS32Def,( PCFGMNODE pNode, const char *pszName, int32_t *pi32, int32_t i32Def)); 2900 DECLR3CALLBACKMEMBER(int, pfnCFGMQueryU16,( PCFGMNODE pNode, const char *pszName, uint16_t *pu16)); 2901 DECLR3CALLBACKMEMBER(int, pfnCFGMQueryU16Def,( PCFGMNODE pNode, const char *pszName, uint16_t *pu16, uint16_t u16Def)); 2902 DECLR3CALLBACKMEMBER(int, pfnCFGMQueryS16,( PCFGMNODE pNode, const char *pszName, int16_t *pi16)); 2903 DECLR3CALLBACKMEMBER(int, pfnCFGMQueryS16Def,( PCFGMNODE pNode, const char *pszName, int16_t *pi16, int16_t i16Def)); 2904 DECLR3CALLBACKMEMBER(int, pfnCFGMQueryU8,( PCFGMNODE pNode, const char *pszName, uint8_t *pu8)); 2905 DECLR3CALLBACKMEMBER(int, pfnCFGMQueryU8Def,( PCFGMNODE pNode, const char *pszName, uint8_t *pu8, uint8_t u8Def)); 2906 DECLR3CALLBACKMEMBER(int, pfnCFGMQueryS8,( PCFGMNODE pNode, const char *pszName, int8_t *pi8)); 2907 DECLR3CALLBACKMEMBER(int, pfnCFGMQueryS8Def,( PCFGMNODE pNode, const char *pszName, int8_t *pi8, int8_t i8Def)); 2908 DECLR3CALLBACKMEMBER(int, pfnCFGMQueryBool,( PCFGMNODE pNode, const char *pszName, bool *pf)); 2909 DECLR3CALLBACKMEMBER(int, pfnCFGMQueryBoolDef,( PCFGMNODE pNode, const char *pszName, bool *pf, bool fDef)); 2910 DECLR3CALLBACKMEMBER(int, pfnCFGMQueryPort,( PCFGMNODE pNode, const char *pszName, PRTIOPORT pPort)); 2911 DECLR3CALLBACKMEMBER(int, pfnCFGMQueryPortDef,( PCFGMNODE pNode, const char *pszName, PRTIOPORT pPort, RTIOPORT PortDef)); 2912 DECLR3CALLBACKMEMBER(int, pfnCFGMQueryUInt,( PCFGMNODE pNode, const char *pszName, unsigned int *pu)); 2913 DECLR3CALLBACKMEMBER(int, pfnCFGMQueryUIntDef,( PCFGMNODE pNode, const char *pszName, unsigned int *pu, unsigned int uDef)); 2914 DECLR3CALLBACKMEMBER(int, pfnCFGMQuerySInt,( PCFGMNODE pNode, const char *pszName, signed int *pi)); 2915 DECLR3CALLBACKMEMBER(int, pfnCFGMQuerySIntDef,( PCFGMNODE pNode, const char *pszName, signed int *pi, signed int iDef)); 2916 DECLR3CALLBACKMEMBER(int, pfnCFGMQueryPtr,( PCFGMNODE pNode, const char *pszName, void **ppv)); 2917 DECLR3CALLBACKMEMBER(int, pfnCFGMQueryPtrDef,( PCFGMNODE pNode, const char *pszName, void **ppv, void *pvDef)); 2918 DECLR3CALLBACKMEMBER(int, pfnCFGMQueryGCPtr,( PCFGMNODE pNode, const char *pszName, PRTGCPTR pGCPtr)); 2919 DECLR3CALLBACKMEMBER(int, pfnCFGMQueryGCPtrDef,( PCFGMNODE pNode, const char *pszName, PRTGCPTR pGCPtr, RTGCPTR GCPtrDef)); 2920 DECLR3CALLBACKMEMBER(int, pfnCFGMQueryGCPtrU,( PCFGMNODE pNode, const char *pszName, PRTGCUINTPTR pGCPtr)); 2921 DECLR3CALLBACKMEMBER(int, pfnCFGMQueryGCPtrUDef,( PCFGMNODE pNode, const char *pszName, PRTGCUINTPTR pGCPtr, RTGCUINTPTR GCPtrDef)); 2922 DECLR3CALLBACKMEMBER(int, pfnCFGMQueryGCPtrS,( PCFGMNODE pNode, const char *pszName, PRTGCINTPTR pGCPtr)); 2923 DECLR3CALLBACKMEMBER(int, pfnCFGMQueryGCPtrSDef,( PCFGMNODE pNode, const char *pszName, PRTGCINTPTR pGCPtr, RTGCINTPTR GCPtrDef)); 2924 DECLR3CALLBACKMEMBER(int, pfnCFGMQueryStringAlloc,( PCFGMNODE pNode, const char *pszName, char **ppszString)); 2925 DECLR3CALLBACKMEMBER(int, pfnCFGMQueryStringAllocDef,(PCFGMNODE pNode, const char *pszName, char **ppszString, const char *pszDef)); 2926 DECLR3CALLBACKMEMBER(PCFGMNODE, pfnCFGMGetParent,(PCFGMNODE pNode)); 2927 DECLR3CALLBACKMEMBER(PCFGMNODE, pfnCFGMGetChild,(PCFGMNODE pNode, const char *pszPath)); 2928 DECLR3CALLBACKMEMBER(PCFGMNODE, pfnCFGMGetChildF,(PCFGMNODE pNode, const char *pszPathFormat, ...) RT_IPRT_FORMAT_ATTR(2, 3)); 2929 DECLR3CALLBACKMEMBER(PCFGMNODE, pfnCFGMGetChildFV,(PCFGMNODE pNode, const char *pszPathFormat, va_list Args) RT_IPRT_FORMAT_ATTR(3, 0)); 2930 DECLR3CALLBACKMEMBER(PCFGMNODE, pfnCFGMGetFirstChild,(PCFGMNODE pNode)); 2931 DECLR3CALLBACKMEMBER(PCFGMNODE, pfnCFGMGetNextChild,(PCFGMNODE pCur)); 2932 DECLR3CALLBACKMEMBER(int, pfnCFGMGetName,(PCFGMNODE pCur, char *pszName, size_t cchName)); 2933 DECLR3CALLBACKMEMBER(size_t, pfnCFGMGetNameLen,(PCFGMNODE pCur)); 2934 DECLR3CALLBACKMEMBER(bool, pfnCFGMAreChildrenValid,(PCFGMNODE pNode, const char *pszzValid)); 2935 DECLR3CALLBACKMEMBER(PCFGMLEAF, pfnCFGMGetFirstValue,(PCFGMNODE pCur)); 2936 DECLR3CALLBACKMEMBER(PCFGMLEAF, pfnCFGMGetNextValue,(PCFGMLEAF pCur)); 2937 DECLR3CALLBACKMEMBER(int, pfnCFGMGetValueName,(PCFGMLEAF pCur, char *pszName, size_t cchName)); 2938 DECLR3CALLBACKMEMBER(size_t, pfnCFGMGetValueNameLen,(PCFGMLEAF pCur)); 2939 DECLR3CALLBACKMEMBER(CFGMVALUETYPE, pfnCFGMGetValueType,(PCFGMLEAF pCur)); 2940 DECLR3CALLBACKMEMBER(bool, pfnCFGMAreValuesValid,(PCFGMNODE pNode, const char *pszzValid)); 2941 DECLR3CALLBACKMEMBER(int, pfnCFGMValidateConfig,(PCFGMNODE pNode, const char *pszNode, 2942 const char *pszValidValues, const char *pszValidNodes, 2943 const char *pszWho, uint32_t uInstance)); 2944 /** @} */ 2345 2945 2346 2946 /** … … 2949 3549 * @returns The ring-0 address of the NOP critical section. 2950 3550 * @param pDevIns The device instance. 3551 * @deprecated 2951 3552 */ 2952 3553 DECLR3CALLBACKMEMBER(R0PTRTYPE(PPDMCRITSECT), pfnCritSectGetNopR0,(PPDMDEVINS pDevIns)); … … 2957 3558 * @returns The raw-mode context address of the NOP critical section. 2958 3559 * @param pDevIns The device instance. 3560 * @deprecated 2959 3561 */ 2960 3562 DECLR3CALLBACKMEMBER(RCPTRTYPE(PPDMCRITSECT), pfnCritSectGetNopRC,(PPDMDEVINS pDevIns)); … … 2963 3565 * Changes the device level critical section from the automatically created 2964 3566 * default to one desired by the device constructor. 3567 * 3568 * For ring-0 and raw-mode capable devices, the call must be repeated in each of 3569 * the additional contexts. 2965 3570 * 2966 3571 * @returns VBox status code. … … 2971 3576 */ 2972 3577 DECLR3CALLBACKMEMBER(int, pfnSetDeviceCritSect,(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect)); 3578 3579 /** @name Exported PDM Critical Section Functions 3580 * @{ */ 3581 DECLR3CALLBACKMEMBER(bool, pfnCritSectYield,(PPDMCRITSECT pCritSect)); 3582 DECLR3CALLBACKMEMBER(int, pfnCritSectEnter,(PPDMCRITSECT pCritSect, int rcBusy)); 3583 DECLR3CALLBACKMEMBER(int, pfnCritSectEnterDebug,(PPDMCRITSECT pCritSect, int rcBusy, RTHCUINTPTR uId, RT_SRC_POS_DECL)); 3584 DECLR3CALLBACKMEMBER(int, pfnCritSectTryEnter,(PPDMCRITSECT pCritSect)); 3585 DECLR3CALLBACKMEMBER(int, pfnCritSectTryEnterDebug,(PPDMCRITSECT pCritSect, RTHCUINTPTR uId, RT_SRC_POS_DECL)); 3586 DECLR3CALLBACKMEMBER(int, pfnCritSectLeave,(PPDMCRITSECT pCritSect)); 3587 DECLR3CALLBACKMEMBER(bool, pfnCritSectIsOwner,(PCPDMCRITSECT pCritSect)); 3588 DECLR3CALLBACKMEMBER(bool, pfnCritSectIsInitialized,(PCPDMCRITSECT pCritSect)); 3589 DECLR3CALLBACKMEMBER(bool, pfnCritSectHasWaiters,(PCPDMCRITSECT pCritSect)); 3590 DECLR3CALLBACKMEMBER(uint32_t, pfnCritSectGetRecursion,(PCPDMCRITSECT pCritSect)); 3591 /** @} */ 2973 3592 2974 3593 /** … … 3643 4262 3644 4263 /** 4264 * Sets up raw-mode context callback handlers for an I/O port range. 4265 * 4266 * The range must have been registered in ring-3 first using 4267 * PDMDevHlpIoPortCreate() or PDMDevHlpIoPortCreateEx(). 4268 * 4269 * @returns VBox status. 4270 * @param pDevIns The device instance to register the ports with. 4271 * @param hIoPorts The I/O port range handle. 4272 * @param pfnOut Pointer to function which is gonna handle OUT 4273 * operations. Optional. 4274 * @param pfnIn Pointer to function which is gonna handle IN operations. 4275 * Optional. 4276 * @param pfnOutStr Pointer to function which is gonna handle string OUT 4277 * operations. Optional. 4278 * @param pfnInStr Pointer to function which is gonna handle string IN 4279 * operations. Optional. 4280 * @param pvUser User argument to pass to the callbacks. 4281 * 4282 * @remarks Caller enters the device critical section prior to invoking the 4283 * registered callback methods. 4284 * 4285 * @sa PDMDevHlpIoPortCreate, PDMDevHlpIoPortCreateEx, PDMDevHlpIoPortMap, 4286 * PDMDevHlpIoPortUnmap. 4287 */ 4288 DECLRCCALLBACKMEMBER(int, pfnIoPortSetUpContextEx,(PPDMDEVINS pDevIns, IOMIOPORTHANDLE hIoPorts, 4289 PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn, 4290 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, 4291 void *pvUser)); 4292 4293 /** 4294 * Sets up raw-mode context callback handlers for an MMIO region. 4295 * 4296 * The region must have been registered in ring-3 first using 4297 * PDMDevHlpMmioCreate() or PDMDevHlpMmioCreateEx(). 4298 * 4299 * @returns VBox status. 4300 * @param pDevIns The device instance to register the ports with. 4301 * @param hRegion The MMIO region handle. 4302 * @param pfnWrite Pointer to function which is gonna handle Write 4303 * operations. 4304 * @param pfnRead Pointer to function which is gonna handle Read 4305 * operations. 4306 * @param pfnFill Pointer to function which is gonna handle Fill/memset 4307 * operations. (optional) 4308 * @param pvUser User argument to pass to the callbacks. 4309 * 4310 * @remarks Caller enters the device critical section prior to invoking the 4311 * registered callback methods. 4312 * 4313 * @sa PDMDevHlpMmioCreate, PDMDevHlpMmioCreateEx, PDMDevHlpMmioMap, 4314 * PDMDevHlpMmioUnmap. 4315 */ 4316 DECLRCCALLBACKMEMBER(int, pfnMmioSetUpContextEx,(PPDMDEVINS pDevIns, IOMMMIOHANDLE hRegion, PFNIOMMMIOWRITE pfnWrite, 4317 PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill, void *pvUser)); 4318 4319 /** 3645 4320 * Bus master physical memory read from the given PCI device. 3646 4321 * … … 3800 4475 3801 4476 /** 3802 * Set parameters for pending MMIO patch operation3803 *3804 * @returns VBox status code.3805 * @param pDevIns Device instance.3806 * @param GCPhys MMIO physical address3807 * @param pCachedData GC pointer to cached data3808 */3809 DECLRCCALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));3810 3811 /**3812 4477 * Gets the VM handle. Restricted API. 3813 4478 * … … 3857 4522 */ 3858 4523 DECLRCCALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetNano,(PPDMDEVINS pDevIns)); 4524 4525 /** 4526 * Gets the NOP critical section. 4527 * 4528 * @returns The ring-3 address of the NOP critical section. 4529 * @param pDevIns The device instance. 4530 */ 4531 DECLRCCALLBACKMEMBER(PPDMCRITSECT, pfnCritSectGetNop,(PPDMDEVINS pDevIns)); 4532 4533 /** 4534 * Changes the device level critical section from the automatically created 4535 * default to one desired by the device constructor. 4536 * 4537 * Must first be done in ring-3. 4538 * 4539 * @returns VBox status code. 4540 * @param pDevIns The device instance. 4541 * @param pCritSect The critical section to use. NULL is not 4542 * valid, instead use the NOP critical 4543 * section. 4544 */ 4545 DECLRCCALLBACKMEMBER(int, pfnSetDeviceCritSect,(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect)); 4546 4547 /** @name Exported PDM Critical Section Functions 4548 * @{ */ 4549 DECLRCCALLBACKMEMBER(int, pfnCritSectEnter,(PPDMCRITSECT pCritSect, int rcBusy)); 4550 DECLRCCALLBACKMEMBER(int, pfnCritSectEnterDebug,(PPDMCRITSECT pCritSect, int rcBusy, RTHCUINTPTR uId, RT_SRC_POS_DECL)); 4551 DECLRCCALLBACKMEMBER(int, pfnCritSectTryEnter,(PPDMCRITSECT pCritSect)); 4552 DECLRCCALLBACKMEMBER(int, pfnCritSectTryEnterDebug,(PPDMCRITSECT pCritSect, RTHCUINTPTR uId, RT_SRC_POS_DECL)); 4553 DECLRCCALLBACKMEMBER(int, pfnCritSectLeave,(PPDMCRITSECT pCritSect)); 4554 DECLRCCALLBACKMEMBER(bool, pfnCritSectIsOwner,(PCPDMCRITSECT pCritSect)); 4555 DECLRCCALLBACKMEMBER(bool, pfnCritSectIsInitialized,(PCPDMCRITSECT pCritSect)); 4556 DECLRCCALLBACKMEMBER(bool, pfnCritSectHasWaiters,(PCPDMCRITSECT pCritSect)); 4557 DECLRCCALLBACKMEMBER(uint32_t, pfnCritSectGetRecursion,(PCPDMCRITSECT pCritSect)); 4558 /** @} */ 3859 4559 3860 4560 /** … … 3887 4587 } PDMDEVHLPRC; 3888 4588 /** Pointer PDM Device RC API. */ 3889 typedef R CPTRTYPE(struct PDMDEVHLPRC *) PPDMDEVHLPRC;4589 typedef RGPTRTYPE(struct PDMDEVHLPRC *) PPDMDEVHLPRC; 3890 4590 /** Pointer PDM Device RC API. */ 3891 typedef R CPTRTYPE(const struct PDMDEVHLPRC *) PCPDMDEVHLPRC;4591 typedef RGPTRTYPE(const struct PDMDEVHLPRC *) PCPDMDEVHLPRC; 3892 4592 3893 4593 /** Current PDMDEVHLP version number. */ 3894 #define PDM_DEVHLPRC_VERSION PDM_VERSION_MAKE(0xffe6, 7, 0)4594 #define PDM_DEVHLPRC_VERSION PDM_VERSION_MAKE(0xffe6, 8, 0) 3895 4595 3896 4596 … … 3902 4602 /** Structure version. PDM_DEVHLPR0_VERSION defines the current version. */ 3903 4603 uint32_t u32Version; 4604 4605 /** 4606 * Sets up ring-0 callback handlers for an I/O port range. 4607 * 4608 * The range must have been registered in ring-3 first using 4609 * PDMDevHlpIoPortCreate() or PDMDevHlpIoPortCreateEx(). 4610 * 4611 * @returns VBox status. 4612 * @param pDevIns The device instance to register the ports with. 4613 * @param hIoPorts The I/O port range handle. 4614 * @param pfnOut Pointer to function which is gonna handle OUT 4615 * operations. Optional. 4616 * @param pfnIn Pointer to function which is gonna handle IN operations. 4617 * Optional. 4618 * @param pfnOutStr Pointer to function which is gonna handle string OUT 4619 * operations. Optional. 4620 * @param pfnInStr Pointer to function which is gonna handle string IN 4621 * operations. Optional. 4622 * @param pvUser User argument to pass to the callbacks. 4623 * 4624 * @remarks Caller enters the device critical section prior to invoking the 4625 * registered callback methods. 4626 * 4627 * @sa PDMDevHlpIoPortCreate, PDMDevHlpIoPortCreateEx, PDMDevHlpIoPortMap, 4628 * PDMDevHlpIoPortUnmap. 4629 */ 4630 DECLR0CALLBACKMEMBER(int, pfnIoPortSetUpContextEx,(PPDMDEVINS pDevIns, IOMIOPORTHANDLE hIoPorts, 4631 PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn, 4632 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, 4633 void *pvUser)); 4634 4635 /** 4636 * Sets up ring-0 callback handlers for an MMIO region. 4637 * 4638 * The region must have been registered in ring-3 first using 4639 * PDMDevHlpMmioCreate() or PDMDevHlpMmioCreateEx(). 4640 * 4641 * @returns VBox status. 4642 * @param pDevIns The device instance to register the ports with. 4643 * @param hRegion The MMIO region handle. 4644 * @param pfnWrite Pointer to function which is gonna handle Write 4645 * operations. 4646 * @param pfnRead Pointer to function which is gonna handle Read 4647 * operations. 4648 * @param pfnFill Pointer to function which is gonna handle Fill/memset 4649 * operations. (optional) 4650 * @param pvUser User argument to pass to the callbacks. 4651 * 4652 * @remarks Caller enters the device critical section prior to invoking the 4653 * registered callback methods. 4654 * 4655 * @sa PDMDevHlpMmioCreate, PDMDevHlpMmioCreateEx, PDMDevHlpMmioMap, 4656 * PDMDevHlpMmioUnmap. 4657 */ 4658 DECLR0CALLBACKMEMBER(int, pfnMmioSetUpContextEx,(PPDMDEVINS pDevIns, IOMMMIOHANDLE hRegion, PFNIOMMMIOWRITE pfnWrite, 4659 PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill, void *pvUser)); 3904 4660 3905 4661 /** … … 4061 4817 4062 4818 /** 4063 * Set parameters for pending MMIO patch operation4064 *4065 * @returns rc.4066 * @param pDevIns Device instance.4067 * @param GCPhys MMIO physical address4068 * @param pCachedData GC pointer to cached data4069 */4070 DECLR0CALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));4071 4072 /**4073 4819 * Gets the VM handle. Restricted API. 4074 4820 * … … 4095 4841 4096 4842 /** 4843 * Translates a timer handle to a pointer. 4844 * 4845 * @returns The time address. 4846 * @param pDevIns The device instance. 4847 * @param hTimer The timer handle. 4848 */ 4849 DECLR0CALLBACKMEMBER(PTMTIMERR0, pfnTimerToPtr,(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer)); 4850 4851 /** @name Timer handle method wrappers 4852 * @{ */ 4853 DECLR0CALLBACKMEMBER(uint64_t, pfnTimerFromMicro,(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer, uint64_t cMicroSecs)); 4854 DECLR0CALLBACKMEMBER(uint64_t, pfnTimerFromMilli,(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer, uint64_t cMilliSecs)); 4855 DECLR0CALLBACKMEMBER(uint64_t, pfnTimerFromNano,(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer, uint64_t cNanoSecs)); 4856 DECLR0CALLBACKMEMBER(uint64_t, pfnTimerGet,(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer)); 4857 DECLR0CALLBACKMEMBER(uint64_t, pfnTimerGetFreq,(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer)); 4858 DECLR0CALLBACKMEMBER(uint64_t, pfnTimerGetNano,(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer)); 4859 DECLR0CALLBACKMEMBER(bool, pfnTimerIsActive,(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer)); 4860 DECLR0CALLBACKMEMBER(bool, pfnTimerIsLockOwner,(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer)); 4861 DECLR0CALLBACKMEMBER(int, pfnTimerLock,(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer, int rcBusy)); 4862 DECLR0CALLBACKMEMBER(int, pfnTimerSet,(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer, uint64_t uExpire)); 4863 DECLR0CALLBACKMEMBER(int, pfnTimerSetFrequencyHint,(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer, uint32_t uHz)); 4864 DECLR0CALLBACKMEMBER(int, pfnTimerSetMicro,(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer, uint64_t cMicrosToNext)); 4865 DECLR0CALLBACKMEMBER(int, pfnTimerSetMillies,(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer, uint64_t cMilliesToNext)); 4866 DECLR0CALLBACKMEMBER(int, pfnTimerSetNano,(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer, uint64_t cNanosToNext)); 4867 DECLR0CALLBACKMEMBER(int, pfnTimerSetRelative,(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer, uint64_t cTicksToNext, uint64_t *pu64Now)); 4868 DECLR0CALLBACKMEMBER(int, pfnTimerStop,(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer)); 4869 DECLR0CALLBACKMEMBER(void, pfnTimerUnlock,(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer)); 4870 /** @} */ 4871 4872 /** 4097 4873 * Get the current virtual clock time in a VM. The clock frequency must be 4098 4874 * queried separately. … … 4118 4894 */ 4119 4895 DECLR0CALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetNano,(PPDMDEVINS pDevIns)); 4896 4897 /** 4898 * Gets the NOP critical section. 4899 * 4900 * @returns The ring-3 address of the NOP critical section. 4901 * @param pDevIns The device instance. 4902 */ 4903 DECLR0CALLBACKMEMBER(PPDMCRITSECT, pfnCritSectGetNop,(PPDMDEVINS pDevIns)); 4904 4905 /** 4906 * Changes the device level critical section from the automatically created 4907 * default to one desired by the device constructor. 4908 * 4909 * Must first be done in ring-3. 4910 * 4911 * @returns VBox status code. 4912 * @param pDevIns The device instance. 4913 * @param pCritSect The critical section to use. NULL is not 4914 * valid, instead use the NOP critical 4915 * section. 4916 */ 4917 DECLR0CALLBACKMEMBER(int, pfnSetDeviceCritSect,(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect)); 4918 4919 /** @name Exported PDM Critical Section Functions 4920 * @{ */ 4921 DECLR0CALLBACKMEMBER(int, pfnCritSectEnter,(PPDMCRITSECT pCritSect, int rcBusy)); 4922 DECLR0CALLBACKMEMBER(int, pfnCritSectEnterDebug,(PPDMCRITSECT pCritSect, int rcBusy, RTHCUINTPTR uId, RT_SRC_POS_DECL)); 4923 DECLR0CALLBACKMEMBER(int, pfnCritSectTryEnter,(PPDMCRITSECT pCritSect)); 4924 DECLR0CALLBACKMEMBER(int, pfnCritSectTryEnterDebug,(PPDMCRITSECT pCritSect, RTHCUINTPTR uId, RT_SRC_POS_DECL)); 4925 DECLR0CALLBACKMEMBER(int, pfnCritSectLeave,(PPDMCRITSECT pCritSect)); 4926 DECLR0CALLBACKMEMBER(bool, pfnCritSectIsOwner,(PCPDMCRITSECT pCritSect)); 4927 DECLR0CALLBACKMEMBER(bool, pfnCritSectIsInitialized,(PCPDMCRITSECT pCritSect)); 4928 DECLR0CALLBACKMEMBER(bool, pfnCritSectHasWaiters,(PCPDMCRITSECT pCritSect)); 4929 DECLR0CALLBACKMEMBER(uint32_t, pfnCritSectGetRecursion,(PCPDMCRITSECT pCritSect)); 4930 /** @} */ 4120 4931 4121 4932 /** … … 4153 4964 4154 4965 /** Current PDMDEVHLP version number. */ 4155 #define PDM_DEVHLPR0_VERSION PDM_VERSION_MAKE(0xffe5, 8, 0) 4156 4966 #define PDM_DEVHLPR0_VERSION PDM_VERSION_MAKE(0xffe5, 9, 0) 4157 4967 4158 4968 … … 4160 4970 * PDM Device Instance. 4161 4971 */ 4162 typedef struct PDMDEVINS 4972 typedef struct PDMDEVINSR3 4163 4973 { 4164 4974 /** Structure version. PDM_DEVINS_VERSION defines the current version. */ 4165 uint32_t u32Version;4975 uint32_t u32Version; 4166 4976 /** Device instance number. */ 4167 uint32_t iInstance; 4168 4169 /** Pointer the GC PDM Device API. */ 4170 PCPDMDEVHLPRC pHlpRC; 4171 /** Pointer to device instance data. */ 4172 RTRCPTR pvInstanceDataRC; 4173 /** The critical section for the device, see pCritSectXR3. */ 4174 RCPTRTYPE(PPDMCRITSECT) pCritSectRoRC; 4175 /** Alignment padding. */ 4176 RTRCPTR pAlignmentRC; 4177 4178 /** Pointer the R0 PDM Device API. */ 4179 PCPDMDEVHLPR0 pHlpR0; 4180 /** Pointer to device instance data (R0). */ 4181 RTR0PTR pvInstanceDataR0; 4182 /** The critical section for the device, see pCritSectXR3. */ 4183 R0PTRTYPE(PPDMCRITSECT) pCritSectRoR0; 4184 4977 uint32_t iInstance; 4978 /** Size of the ring-3, raw-mode and shared bits. */ 4979 uint32_t cbRing3; 4980 /** Set if ring-0 context is enabled. */ 4981 bool fR0Enabled; 4982 /** Set if raw-mode context is enabled. */ 4983 bool fRCEnabled; 4984 /** Alignment padding. */ 4985 bool afReserved[2]; 4185 4986 /** Pointer the HC PDM Device API. */ 4186 PCPDMDEVHLPR3 pHlpR3; 4187 /** Pointer to device instance data. */ 4188 RTR3PTR pvInstanceDataR3; 4987 PCPDMDEVHLPR3 pHlpR3; 4988 /** Pointer to the shared device instance data. */ 4989 RTR3PTR pvInstanceDataR3; 4990 /** Pointer to the device instance data for ring-3. */ 4991 RTR3PTR pvInstanceDataForR3; 4189 4992 /** The critical section for the device. 4190 4993 * … … 4198 5001 * very early on. 4199 5002 */ 4200 R3PTRTYPE(PPDMCRITSECT) pCritSectRoR3; 4201 5003 R3PTRTYPE(PPDMCRITSECT) pCritSectRoR3; 4202 5004 /** Pointer to device registration structure. */ 4203 R3PTRTYPE(PCPDMDEVREG) pReg;5005 R3PTRTYPE(PCPDMDEVREG) pReg; 4204 5006 /** Configuration handle. */ 4205 R3PTRTYPE(PCFGMNODE) pCfg; 4206 5007 R3PTRTYPE(PCFGMNODE) pCfg; 4207 5008 /** The base interface of the device. 4208 5009 * … … 4210 5011 * device level interfaces to export. To obtain this interface 4211 5012 * call PDMR3QueryDevice(). */ 4212 PDMIBASE IBase;5013 PDMIBASE IBase; 4213 5014 4214 5015 /** Tracing indicator. */ 4215 uint32_t fTracing;5016 uint32_t fTracing; 4216 5017 /** The tracing ID of this device. */ 4217 uint32_t idTracing; 4218 #if HC_ARCH_BITS == 32 5018 uint32_t idTracing; 5019 5020 /** Ring-3 pointer to the raw-mode device instance. */ 5021 R3PTRTYPE(struct PDMDEVINSRC *) pDevInsForRCR3; 5022 /** Raw-mode address of the raw-mode device instance. */ 5023 RTRGPTR pDevInsForRC; 5024 /** Ring-3 pointer to the raw-mode instance data. */ 5025 RTR3PTR pvInstanceDataForRCR3; 5026 5027 /** Temporarily. */ 5028 R0PTRTYPE(struct PDMDEVINSR0 *) pDevInsR0RemoveMe; 5029 /** Temporarily. */ 5030 RTR0PTR pvInstanceDataR0; 5031 /** Temporarily. */ 5032 RTRCPTR pvInstanceDataRC; 4219 5033 /** Align the internal data more naturally. */ 4220 uint32_t au32Padding[HC_ARCH_BITS == 32 ? 13 : 0]; 4221 #endif 5034 uint32_t au32Padding[HC_ARCH_BITS == 32 ? 4 : 1]; 4222 5035 4223 5036 /** Internal data. */ … … 4225 5038 { 4226 5039 #ifdef PDMDEVINSINT_DECLARED 4227 PDMDEVINSINT s;5040 PDMDEVINSINTR3 s; 4228 5041 #endif 4229 uint8_t padding[HC_ARCH_BITS == 32 ? 72 : 112 + 0x28];5042 uint8_t padding[HC_ARCH_BITS == 32 ? 0x60 : 0x80]; 4230 5043 } Internal; 4231 5044 4232 /** Device instance data .The size of this area is defined4233 * in the PDMDEVREG::cbInstance Datafield. */4234 char achInstanceData[8];4235 } PDMDEVINS ;4236 4237 /** Current PDMDEVINS version number. */4238 #define PDM_DEVINS _VERSION PDM_VERSION_MAKE(0xffe4, 3, 0)4239 4240 /** Converts a pointer to the PDMDEVINS ::IBase to a pointer to PDMDEVINS. */5045 /** Device instance data for ring-3. The size of this area is defined 5046 * in the PDMDEVREG::cbInstanceR3 field. */ 5047 char achInstanceData[8]; 5048 } PDMDEVINSR3; 5049 5050 /** Current PDMDEVINSR3 version number. */ 5051 #define PDM_DEVINSR3_VERSION PDM_VERSION_MAKE(0xff82, 1, 0) 5052 5053 /** Converts a pointer to the PDMDEVINSR3::IBase to a pointer to PDMDEVINS. */ 4241 5054 #define PDMIBASE_2_PDMDEV(pInterface) ( (PPDMDEVINS)((char *)(pInterface) - RT_UOFFSETOF(PDMDEVINS, IBase)) ) 5055 5056 5057 /** 5058 * PDM ring-0 device instance. 5059 */ 5060 typedef struct PDMDEVINSR0 5061 { 5062 /** Structure version. PDM_DEVINSR0_VERSION defines the current version. */ 5063 uint32_t u32Version; 5064 /** Device instance number. */ 5065 uint32_t iInstance; 5066 5067 /** Pointer the HC PDM Device API. */ 5068 PCPDMDEVHLPR0 pHlpR0; 5069 /** Pointer to the shared device instance data. */ 5070 RTR0PTR pvInstanceDataR0; 5071 /** Pointer to the device instance data for ring-0. */ 5072 RTR0PTR pvInstanceDataForR0; 5073 /** The critical section for the device. 5074 * 5075 * TM and IOM will enter this critical section before calling into the device 5076 * code. PDM will when doing power on, power off, reset, suspend and resume 5077 * notifications. SSM will currently not, but this will be changed later on. 5078 * 5079 * The device gets a critical section automatically assigned to it before 5080 * the constructor is called. If the constructor wishes to use a different 5081 * critical section, it calls PDMDevHlpSetDeviceCritSect() to change it 5082 * very early on. 5083 */ 5084 R0PTRTYPE(PPDMCRITSECT) pCritSectRoR0; 5085 /** Pointer to the ring-0 device registration structure. */ 5086 R0PTRTYPE(PCPDMDEVREGR0) pReg; 5087 /** Ring-3 address of the ring-3 device instance. */ 5088 R3PTRTYPE(struct PDMDEVINSR3 *) pDevInsForR3; 5089 /** Ring-0 pointer to the ring-3 device instance. */ 5090 R0PTRTYPE(struct PDMDEVINSR3 *) pDevInsForR3R0; 5091 /** Ring-0 pointer to the ring-3 instance data. */ 5092 RTR0PTR pvInstanceDataForR3R0; 5093 /** Raw-mode address of the raw-mode device instance. */ 5094 RGPTRTYPE(struct PDMDEVINSRC *) pDevInsForRC; 5095 /** Ring-0 pointer to the raw-mode device instance. */ 5096 R0PTRTYPE(struct PDMDEVINSRC *) pDevInsForRCR0; 5097 /** Ring-0 pointer to the raw-mode instance data. */ 5098 RTR0PTR pvInstanceDataForRCR0; 5099 #if HC_ARCH_BITS == 32 5100 /** Align the internal data more naturally. */ 5101 uint32_t au32Padding[HC_ARCH_BITS == 32 ? 3 : 0]; 5102 #endif 5103 5104 /** Internal data. */ 5105 union 5106 { 5107 #ifdef PDMDEVINSINT_DECLARED 5108 PDMDEVINSINTR0 s; 5109 #endif 5110 uint8_t padding[HC_ARCH_BITS == 32 ? 0x80 : 0x60]; 5111 } Internal; 5112 5113 /** Device instance data for ring-0. The size of this area is defined 5114 * in the PDMDEVREG::cbInstanceR0 field. */ 5115 char achInstanceData[8]; 5116 } PDMDEVINSR0; 5117 5118 /** Current PDMDEVINSR0 version number. */ 5119 #define PDM_DEVINSR0_VERSION PDM_VERSION_MAKE(0xff83, 1, 0) 5120 5121 5122 /** 5123 * PDM raw-mode device instance. 5124 */ 5125 typedef struct PDMDEVINSRC 5126 { 5127 /** Structure version. PDM_DEVINSRC_VERSION defines the current version. */ 5128 uint32_t u32Version; 5129 /** Device instance number. */ 5130 uint32_t iInstance; 5131 5132 /** Pointer the HC PDM Device API. */ 5133 PCPDMDEVHLPRC pHlpRC; 5134 /** Pointer to the shared device instance data. */ 5135 RTRGPTR pvInstanceDataRC; 5136 /** Pointer to the device instance data for raw-mode. */ 5137 RTRGPTR pvInstanceDataForRC; 5138 /** The critical section for the device. 5139 * 5140 * TM and IOM will enter this critical section before calling into the device 5141 * code. PDM will when doing power on, power off, reset, suspend and resume 5142 * notifications. SSM will currently not, but this will be changed later on. 5143 * 5144 * The device gets a critical section automatically assigned to it before 5145 * the constructor is called. If the constructor wishes to use a different 5146 * critical section, it calls PDMDevHlpSetDeviceCritSect() to change it 5147 * very early on. 5148 */ 5149 RGPTRTYPE(PPDMCRITSECT) pCritSectRoRC; 5150 /** Pointer to the ring-0 device registration structure. */ 5151 RGPTRTYPE(PCPDMDEVREGR0) pReg; 5152 5153 /** Internal data. */ 5154 union 5155 { 5156 #ifdef PDMDEVINSINT_DECLARED 5157 PDMDEVINSINTRC s; 5158 #endif 5159 uint8_t padding[0x10]; 5160 } Internal; 5161 5162 /** Device instance data for ring-0. The size of this area is defined 5163 * in the PDMDEVREG::cbInstanceR0 field. */ 5164 char achInstanceData[8]; 5165 } PDMDEVINSRC; 5166 5167 /** Current PDMDEVINSR0 version number. */ 5168 #define PDM_DEVINSRC_VERSION PDM_VERSION_MAKE(0xff84, 1, 0) 5169 5170 5171 /** @def PDM_DEVINS_VERSION 5172 * Current PDMDEVINS version number. */ 5173 /** @typedef PDMDEVINS 5174 * The device instance structure for the current context. */ 5175 #ifdef IN_RING3 5176 # define PDM_DEVINS_VERSION PDM_DEVINSR3_VERSION 5177 typedef PDMDEVINSR3 PDMDEVINS; 5178 #elif defined(IN_RING0) 5179 # define PDM_DEVINS_VERSION PDM_DEVINSR0_VERSION 5180 typedef PDMDEVINSR0 PDMDEVINS; 5181 #elif defined(IN_RC) 5182 # define PDM_DEVINS_VERSION PDM_DEVINSRC_VERSION 5183 typedef PDMDEVINSRC PDMDEVINS; 5184 #else 5185 # error "Missing context defines: IN_RING0, IN_RING3, IN_RC" 5186 #endif 5187 4242 5188 4243 5189 /** … … 4297 5243 do \ 4298 5244 { \ 4299 int rcValCfg = CFGMR3ValidateConfig((pDevIns)->pCfg, "/", pszValidValues, pszValidNodes, \4300 (pDevIns)->pReg->szName, (pDevIns)->iInstance); \5245 int rcValCfg = pDevIns->pHlpR3->pfnCFGMValidateConfig((pDevIns)->pCfg, "/", pszValidValues, pszValidNodes, \ 5246 (pDevIns)->pReg->szName, (pDevIns)->iInstance); \ 4301 5247 if (RT_SUCCESS(rcValCfg)) \ 4302 5248 { /* likely */ } else return rcValCfg; \ … … 4345 5291 * Converts a PDM Device instance pointer a RC PDM Device instance pointer. 4346 5292 */ 4347 #define PDMDEVINS_2_RCPTR(pDevIns) ( (RCPTRTYPE(PPDMDEVINS))((RTRCUINTPTR)(pDevIns)->pvInstanceDataRC - (RTRCUINTPTR)RT_UOFFSETOF(PDMDEVINS, achInstanceData)) ) 5293 #ifdef IN_RC 5294 # define PDMDEVINS_2_RCPTR(pDevIns) (pDevIns) 5295 #else 5296 # define PDMDEVINS_2_RCPTR(pDevIns) ( (pDevIns)->pDevInsForRC ) 5297 #endif 4348 5298 4349 5299 /** @def PDMDEVINS_2_R3PTR 4350 5300 * Converts a PDM Device instance pointer a R3 PDM Device instance pointer. 4351 5301 */ 4352 #define PDMDEVINS_2_R3PTR(pDevIns) ( (R3PTRTYPE(PPDMDEVINS))((RTHCUINTPTR)(pDevIns)->pvInstanceDataR3 - RT_UOFFSETOF(PDMDEVINS, achInstanceData)) ) 5302 #ifdef IN_RING3 5303 # define PDMDEVINS_2_R3PTR(pDevIns) (pDevIns) 5304 #else 5305 # define PDMDEVINS_2_R3PTR(pDevIns) ( (pDevIns)->pDevInsForR3 ) 5306 #endif 4353 5307 4354 5308 /** @def PDMDEVINS_2_R0PTR 4355 5309 * Converts a PDM Device instance pointer a R0 PDM Device instance pointer. 4356 5310 */ 4357 #define PDMDEVINS_2_R0PTR(pDevIns) ( (R0PTRTYPE(PPDMDEVINS))((RTR0UINTPTR)(pDevIns)->pvInstanceDataR0 - RT_UOFFSETOF(PDMDEVINS, achInstanceData)) ) 5311 #ifdef IN_RING0 5312 # define PDMDEVINS_2_R0PTR(pDevIns) (pDevIns) 5313 #else 5314 # define PDMDEVINS_2_R0PTR(pDevIns) ( (pDevIns)->pDevInsR0RemoveMe ) 5315 #endif 5316 5317 /** @def PDMDEVINS_DATA_2_R0_REMOVE_ME 5318 * Converts a PDM device instance data pointer to a ring-0 one. 5319 * @deprecated 5320 */ 5321 #ifdef IN_RING0 5322 # define PDMDEVINS_DATA_2_R0_REMOVE_ME(pDevIns, pvCC) (pvCC) 5323 #else 5324 # define PDMDEVINS_DATA_2_R0_REMOVE_ME(pDevIns, pvCC) ( (pDevIns)->pvInstanceDataR0 + (uintptr_t)(pvCC) - (uintptr_t)(pDevIns)->CTX_SUFF(pvInstanceData) ) 5325 #endif 4358 5326 4359 5327 … … 4397 5365 return pDevIns->pHlpR3->pfnIOPortDeregister(pDevIns, Port, cPorts); 4398 5366 } 5367 5368 /** 5369 * Combines PDMDevHlpIoPortCreate() & PDMDevHlpIoPortMap(). 5370 */ 5371 DECLINLINE(int) PDMDevHlpIoPortCreateAndMap(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, PFNIOMIOPORTOUT pfnOut, 5372 PFNIOMIOPORTIN pfnIn, void *pvUser, const char *pszDesc, PIOMIOPORTHANDLE phIoPorts) 5373 { 5374 int rc = pDevIns->pHlpR3->pfnIoPortCreateEx(pDevIns, cPorts, 0, NULL, UINT32_MAX, 5375 pfnOut, pfnIn, NULL, NULL, pvUser, pszDesc, phIoPorts); 5376 if (RT_SUCCESS(rc)) 5377 rc = pDevIns->pHlpR3->pfnIoPortMap(pDevIns, *phIoPorts, Port); 5378 return rc; 5379 } 5380 5381 /** 5382 * @sa PDMDevHlpIoPortCreateEx 5383 */ 5384 DECLINLINE(int) PDMDevHlpIoPortCreate(PPDMDEVINS pDevIns, RTIOPORT cPorts, PPDMPCIDEV pPciDev, uint32_t iPciRegion, 5385 PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn, void *pvUser, const char *pszDesc, 5386 PIOMIOPORTHANDLE phIoPorts) 5387 { 5388 return pDevIns->pHlpR3->pfnIoPortCreateEx(pDevIns, cPorts, 0, pPciDev, iPciRegion, 5389 pfnOut, pfnIn, NULL, NULL, pvUser, pszDesc, phIoPorts); 5390 } 5391 5392 /** 5393 * @copydoc PDMDEVHLPR3::pfnIoPortCreateEx 5394 */ 5395 DECLINLINE(int) PDMDevHlpIoPortCreateEx(PPDMDEVINS pDevIns, RTIOPORT cPorts, uint32_t fFlags, PPDMPCIDEV pPciDev, 5396 uint32_t iPciRegion, PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn, 5397 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, 5398 void *pvUser, const char *pszDesc, PIOMIOPORTHANDLE phIoPorts) 5399 { 5400 return pDevIns->pHlpR3->pfnIoPortCreateEx(pDevIns, cPorts, fFlags, pPciDev, iPciRegion, 5401 pfnOut, pfnIn, pfnOutStr, pfnInStr, pvUser, pszDesc, phIoPorts); 5402 } 5403 5404 /** 5405 * @copydoc PDMDEVHLPR3::pfnIoPortMap 5406 */ 5407 DECLINLINE(int) PDMDevHlpIoPortMap(PPDMDEVINS pDevIns, IOMIOPORTHANDLE hIoPorts, RTIOPORT Port) 5408 { 5409 return pDevIns->pHlpR3->pfnIoPortMap(pDevIns, hIoPorts, Port); 5410 } 5411 5412 /** 5413 * @copydoc PDMDEVHLPR3::pfnIoPortUnmap 5414 */ 5415 DECLINLINE(int) PDMDevHlpIoPortUnmap(PPDMDEVINS pDevIns, IOMIOPORTHANDLE hIoPorts) 5416 { 5417 return pDevIns->pHlpR3->pfnIoPortUnmap(pDevIns, hIoPorts); 5418 } 5419 5420 #endif /* IN_RING3 */ 5421 #ifndef IN_RING3 5422 5423 /** 5424 * @sa PDMDevHlpIoPortSetUpContextEx 5425 */ 5426 DECLINLINE(int) PDMDevHlpIoPortSetUpContext(PPDMDEVINS pDevIns, IOMIOPORTHANDLE hIoPorts, 5427 PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn, void *pvUser) 5428 { 5429 return pDevIns->CTX_SUFF(pHlp)->pfnIoPortSetUpContextEx(pDevIns, hIoPorts, pfnOut, pfnIn, NULL, NULL, pvUser); 5430 } 5431 5432 /** 5433 * @copydoc PDMDEVHLPR3::pfnIoPortCreateEx 5434 */ 5435 DECLINLINE(int) PDMDevHlpIoPortSetUpContextEx(PPDMDEVINS pDevIns, IOMIOPORTHANDLE hIoPorts, 5436 PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn, 5437 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, void *pvUser) 5438 { 5439 return pDevIns->CTX_SUFF(pHlp)->pfnIoPortSetUpContextEx(pDevIns, hIoPorts, pfnOut, pfnIn, pfnOutStr, pfnInStr, pvUser); 5440 } 5441 5442 #endif /* !IN_RING3 */ 5443 #ifdef IN_RING3 5444 5445 5446 /** 5447 * @sa PDMDevHlpMmioCreateEx 5448 */ 5449 DECLINLINE(int) PDMDevHlpMmioCreate(PPDMDEVINS pDevIns, RTGCPHYS cbRegion, PPDMPCIDEV pPciDev, uint32_t iPciRegion, 5450 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, void *pvUser, 5451 const char *pszDesc, PIOMMMIOHANDLE phRegion) 5452 { 5453 return pDevIns->pHlpR3->pfnMmioCreateEx(pDevIns, cbRegion, 0, pPciDev, iPciRegion, 5454 pfnWrite, pfnRead, NULL, pvUser, pszDesc, phRegion); 5455 } 5456 5457 /** 5458 * @copydoc PDMDEVHLPR3::pfnMmioCreateEx 5459 */ 5460 DECLINLINE(int) PDMDevHlpMmioCreateEx(PPDMDEVINS pDevIns, RTGCPHYS cbRegion, 5461 uint32_t fFlags, PPDMPCIDEV pPciDev, uint32_t iPciRegion, 5462 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill, 5463 void *pvUser, const char *pszDesc, PIOMMMIOHANDLE phRegion) 5464 { 5465 return pDevIns->pHlpR3->pfnMmioCreateEx(pDevIns, cbRegion, fFlags, pPciDev, iPciRegion, 5466 pfnWrite, pfnRead, pfnFill, pvUser, pszDesc, phRegion); 5467 } 5468 5469 /** 5470 * @copydoc PDMDEVHLPR3::pfnMmioMap 5471 */ 5472 DECLINLINE(int) PDMDevHlpMmioMap(PPDMDEVINS pDevIns, IOMMMIOHANDLE hRegion, RTGCPHYS GCPhys) 5473 { 5474 return pDevIns->pHlpR3->pfnMmioMap(pDevIns, hRegion, GCPhys); 5475 } 5476 5477 /** 5478 * @copydoc PDMDEVHLPR3::pfnMmioUnmap 5479 */ 5480 DECLINLINE(int) PDMDevHlpMmioUnmap(PPDMDEVINS pDevIns, IOMMMIOHANDLE hRegion) 5481 { 5482 return pDevIns->pHlpR3->pfnMmioUnmap(pDevIns, hRegion); 5483 } 5484 5485 /** 5486 * @copydoc PDMDEVHLPR3::pfnMmioReduce 5487 */ 5488 DECLINLINE(int) PDMDevHlpMmioReduce(PPDMDEVINS pDevIns, IOMMMIOHANDLE hRegion, RTGCPHYS cbRegion) 5489 { 5490 return pDevIns->pHlpR3->pfnMmioReduce(pDevIns, hRegion, cbRegion); 5491 } 5492 5493 #endif /* IN_RING3 */ 5494 #ifndef IN_RING3 5495 5496 /** 5497 * @sa PDMDevHlpMmioSetUpContextEx 5498 */ 5499 DECLINLINE(int) PDMDevHlpMmioSetUpContext(PPDMDEVINS pDevIns, IOMMMIOHANDLE hRegion, 5500 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, void *pvUser) 5501 { 5502 return pDevIns->CTX_SUFF(pHlp)->pfnMmioSetUpContextEx(pDevIns, hRegion, pfnWrite, pfnRead, NULL, pvUser); 5503 } 5504 5505 /** 5506 * @copydoc PDMDEVHLPR3::pfnMmioCreateEx 5507 */ 5508 DECLINLINE(int) PDMDevHlpMmioSetUpContextEx(PPDMDEVINS pDevIns, IOMMMIOHANDLE hRegion, PFNIOMMMIOWRITE pfnWrite, 5509 PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill, void *pvUser) 5510 { 5511 return pDevIns->CTX_SUFF(pHlp)->pfnMmioSetUpContextEx(pDevIns, hRegion, pfnWrite, pfnRead, pfnFill, pvUser); 5512 } 5513 5514 #endif /* !IN_RING3 */ 5515 #ifdef IN_RING3 4399 5516 4400 5517 /** … … 4667 5784 4668 5785 /** 5786 * @copydoc PDMDEVHLPR3::pfnTimerCreate 5787 */ 5788 DECLINLINE(int) PDMDevHlpTimerCreate(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, void *pvUser, 5789 uint32_t fFlags, const char *pszDesc, PTMTIMERHANDLE phTimer) 5790 { 5791 return pDevIns->pHlpR3->pfnTimerCreate(pDevIns, enmClock, pfnCallback, pvUser, fFlags, pszDesc, phTimer); 5792 } 5793 5794 #endif /* IN_RING3 */ 5795 5796 /** 5797 * @copydoc PDMDEVHLPR3::pfnTimerToPtr 5798 */ 5799 DECLINLINE(PTMTIMER) PDMDevHlpTimerToPtr(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer) 5800 { 5801 return pDevIns->CTX_SUFF(pHlp)->pfnTimerToPtr(pDevIns, hTimer); 5802 } 5803 5804 /** 5805 * @copydoc PDMDEVHLPR3::pfnTimerFromMicro 5806 */ 5807 DECLINLINE(uint64_t) PDMDevHlpTimerFromMicro(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer, uint64_t cMicroSecs) 5808 { 5809 return pDevIns->CTX_SUFF(pHlp)->pfnTimerFromMicro(pDevIns, hTimer, cMicroSecs); 5810 } 5811 5812 /** 5813 * @copydoc PDMDEVHLPR3::pfnTimerFromMilli 5814 */ 5815 DECLINLINE(uint64_t) PDMDevHlpTimerFromMilli(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer, uint64_t cMilliSecs) 5816 { 5817 return pDevIns->CTX_SUFF(pHlp)->pfnTimerFromMilli(pDevIns, hTimer, cMilliSecs); 5818 } 5819 5820 /** 5821 * @copydoc PDMDEVHLPR3::pfnTimerFromNano 5822 */ 5823 DECLINLINE(uint64_t) PDMDevHlpTimerFromNano(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer, uint64_t cNanoSecs) 5824 { 5825 return pDevIns->CTX_SUFF(pHlp)->pfnTimerFromNano(pDevIns, hTimer, cNanoSecs); 5826 } 5827 5828 /** 5829 * @copydoc PDMDEVHLPR3::pfnTimerGet 5830 */ 5831 DECLINLINE(uint64_t) PDMDevHlpTimerGet(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer) 5832 { 5833 return pDevIns->CTX_SUFF(pHlp)->pfnTimerGet(pDevIns, hTimer); 5834 } 5835 5836 /** 5837 * @copydoc PDMDEVHLPR3::pfnTimerGetFreq 5838 */ 5839 DECLINLINE(uint64_t) PDMDevHlpTimerGetFreq(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer) 5840 { 5841 return pDevIns->CTX_SUFF(pHlp)->pfnTimerGetFreq(pDevIns, hTimer); 5842 } 5843 5844 /** 5845 * @copydoc PDMDEVHLPR3::pfnTimerGetNano 5846 */ 5847 DECLINLINE(uint64_t) PDMDevHlpTimerGetNano(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer) 5848 { 5849 return pDevIns->CTX_SUFF(pHlp)->pfnTimerGetNano(pDevIns, hTimer); 5850 } 5851 5852 /** 5853 * @copydoc PDMDEVHLPR3::pfnTimerIsActive 5854 */ 5855 DECLINLINE(bool) PDMDevHlpTimerIsActive(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer) 5856 { 5857 return pDevIns->CTX_SUFF(pHlp)->pfnTimerIsActive(pDevIns, hTimer); 5858 } 5859 5860 /** 5861 * @copydoc PDMDEVHLPR3::pfnTimerIsLockOwner 5862 */ 5863 DECLINLINE(bool) PDMDevHlpTimerIsLockOwner(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer) 5864 { 5865 return pDevIns->CTX_SUFF(pHlp)->pfnTimerIsLockOwner(pDevIns, hTimer); 5866 } 5867 5868 /** 5869 * @copydoc PDMDEVHLPR3::pfnTimerLock 5870 */ 5871 DECLINLINE(int) PDMDevHlpTimerLock(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer, int rcBusy) 5872 { 5873 return pDevIns->CTX_SUFF(pHlp)->pfnTimerLock(pDevIns, hTimer, rcBusy); 5874 } 5875 5876 /** 5877 * @copydoc PDMDEVHLPR3::pfnTimerSet 5878 */ 5879 DECLINLINE(int) PDMDevHlpTimerSet(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer, uint64_t uExpire) 5880 { 5881 return pDevIns->CTX_SUFF(pHlp)->pfnTimerSet(pDevIns, hTimer, uExpire); 5882 } 5883 5884 /** 5885 * @copydoc PDMDEVHLPR3::pfnTimerSetFrequencyHint 5886 */ 5887 DECLINLINE(int) PDMDevHlpTimerSetFrequencyHint(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer, uint32_t uHz) 5888 { 5889 return pDevIns->CTX_SUFF(pHlp)->pfnTimerSetFrequencyHint(pDevIns, hTimer, uHz); 5890 } 5891 5892 /** 5893 * @copydoc PDMDEVHLPR3::pfnTimerSetMicro 5894 */ 5895 DECLINLINE(int) PDMDevHlpTimerSetMicro(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer, uint64_t cMicrosToNext) 5896 { 5897 return pDevIns->CTX_SUFF(pHlp)->pfnTimerSetMicro(pDevIns, hTimer, cMicrosToNext); 5898 } 5899 5900 /** 5901 * @copydoc PDMDEVHLPR3::pfnTimerSetMillies 5902 */ 5903 DECLINLINE(int) PDMDevHlpTimerSetMillies(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer, uint64_t cMilliesToNext) 5904 { 5905 return pDevIns->CTX_SUFF(pHlp)->pfnTimerSetMillies(pDevIns, hTimer, cMilliesToNext); 5906 } 5907 5908 /** 5909 * @copydoc PDMDEVHLPR3::pfnTimerSetNano 5910 */ 5911 DECLINLINE(int) PDMDevHlpTimerSetNano(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer, uint64_t cNanosToNext) 5912 { 5913 return pDevIns->CTX_SUFF(pHlp)->pfnTimerSetNano(pDevIns, hTimer, cNanosToNext); 5914 } 5915 5916 /** 5917 * @copydoc PDMDEVHLPR3::pfnTimerSetRelative 5918 */ 5919 DECLINLINE(int) PDMDevHlpTimerSetRelative(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer, uint64_t cTicksToNext, uint64_t *pu64Now) 5920 { 5921 return pDevIns->CTX_SUFF(pHlp)->pfnTimerSetRelative(pDevIns, hTimer, cTicksToNext, pu64Now); 5922 } 5923 5924 /** 5925 * @copydoc PDMDEVHLPR3::pfnTimerStop 5926 */ 5927 DECLINLINE(int) PDMDevHlpTimerStop(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer) 5928 { 5929 return pDevIns->CTX_SUFF(pHlp)->pfnTimerStop(pDevIns, hTimer); 5930 } 5931 5932 /** 5933 * @copydoc PDMDEVHLPR3::pfnTimerUnlock 5934 */ 5935 DECLINLINE(void) PDMDevHlpTimerUnlock(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer) 5936 { 5937 pDevIns->CTX_SUFF(pHlp)->pfnTimerUnlock(pDevIns, hTimer); 5938 } 5939 5940 #ifdef IN_RING3 5941 5942 /** 5943 * @copydoc PDMDEVHLPR3::pfnTimerSave 5944 */ 5945 DECLINLINE(int) PDMDevHlpTimerSave(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer, PSSMHANDLE pSSM) 5946 { 5947 return pDevIns->pHlpR3->pfnTimerSave(pDevIns, hTimer, pSSM); 5948 } 5949 5950 /** 5951 * @copydoc PDMDEVHLPR3::pfnTimerLoad 5952 */ 5953 DECLINLINE(int) PDMDevHlpTimerLoad(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer, PSSMHANDLE pSSM) 5954 { 5955 return pDevIns->pHlpR3->pfnTimerLoad(pDevIns, hTimer, pSSM); 5956 } 5957 5958 /** 4669 5959 * @copydoc PDMDEVHLPR3::pfnTMUtcNow 4670 5960 */ … … 4674 5964 } 4675 5965 4676 #endif /* IN_RING3 */5966 #endif 4677 5967 4678 5968 /** … … 5175 6465 } 5176 6466 6467 #endif /* IN_RING3 */ 6468 5177 6469 /** 5178 6470 * @copydoc PDMDEVHLPR3::pfnCritSectGetNop … … 5180 6472 DECLINLINE(PPDMCRITSECT) PDMDevHlpCritSectGetNop(PPDMDEVINS pDevIns) 5181 6473 { 5182 return pDevIns->pHlpR3->pfnCritSectGetNop(pDevIns); 5183 } 6474 return pDevIns->CTX_SUFF(pHlp)->pfnCritSectGetNop(pDevIns); 6475 } 6476 6477 #ifdef IN_RING3 5184 6478 5185 6479 /** … … 5199 6493 } 5200 6494 6495 #endif /* IN_RING3 */ 6496 5201 6497 /** 5202 6498 * @copydoc PDMDEVHLPR3::pfnSetDeviceCritSect … … 5204 6500 DECLINLINE(int) PDMDevHlpSetDeviceCritSect(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect) 5205 6501 { 5206 return pDevIns->pHlpR3->pfnSetDeviceCritSect(pDevIns, pCritSect); 5207 } 6502 return pDevIns->CTX_SUFF(pHlp)->pfnSetDeviceCritSect(pDevIns, pCritSect); 6503 } 6504 6505 /** 6506 * @copydoc PDMCritSectEnter 6507 * @param pDevIns The device instance. 6508 */ 6509 DECLINLINE(int) PDMDevHlpCritSectEnter(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, int rcBusy) 6510 { 6511 return pDevIns->CTX_SUFF(pHlp)->pfnCritSectEnter(pCritSect, rcBusy); 6512 } 6513 6514 /** 6515 * @copydoc PDMCritSectEnterDebug 6516 * @param pDevIns The device instance. 6517 */ 6518 DECLINLINE(int) PDMDevHlpCritSectEnterDebug(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, int rcBusy, RTHCUINTPTR uId, RT_SRC_POS_DECL) 6519 { 6520 return pDevIns->CTX_SUFF(pHlp)->pfnCritSectEnterDebug(pCritSect, rcBusy, uId, RT_SRC_POS_ARGS); 6521 } 6522 6523 /** 6524 * @copydoc PDMCritSectTryEnter 6525 * @param pDevIns The device instance. 6526 */ 6527 DECLINLINE(int) PDMDevHlpCritSectTryEnter(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect) 6528 { 6529 return pDevIns->CTX_SUFF(pHlp)->pfnCritSectTryEnter(pCritSect); 6530 } 6531 6532 /** 6533 * @copydoc PDMCritSectTryEnterDebug 6534 * @param pDevIns The device instance. 6535 */ 6536 DECLINLINE(int) PDMDevHlpCritSectTryEnterDebug(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, RTHCUINTPTR uId, RT_SRC_POS_DECL) 6537 { 6538 return pDevIns->CTX_SUFF(pHlp)->pfnCritSectTryEnterDebug(pCritSect, uId, RT_SRC_POS_ARGS); 6539 } 6540 6541 /** 6542 * @copydoc PDMCritSectLeave 6543 * @param pDevIns The device instance. 6544 */ 6545 DECLINLINE(int) PDMDevHlpCritSectLeave(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect) 6546 { 6547 return pDevIns->CTX_SUFF(pHlp)->pfnCritSectLeave(pCritSect); 6548 } 6549 6550 /** 6551 * @copydoc PDMCritSectIsOwner 6552 * @param pDevIns The device instance. 6553 */ 6554 DECLINLINE(bool) PDMDevHlpCritSectIsOwner(PPDMDEVINS pDevIns, PCPDMCRITSECT pCritSect) 6555 { 6556 return pDevIns->CTX_SUFF(pHlp)->pfnCritSectIsOwner(pCritSect); 6557 } 6558 6559 /** 6560 * @copydoc PDMCritSectIsInitialized 6561 * @param pDevIns The device instance. 6562 */ 6563 DECLINLINE(bool) PDMDevHlpCritSectIsInitialized(PPDMDEVINS pDevIns, PCPDMCRITSECT pCritSect) 6564 { 6565 return pDevIns->CTX_SUFF(pHlp)->pfnCritSectIsInitialized(pCritSect); 6566 } 6567 6568 /** 6569 * @copydoc PDMCritSectHasWaiters 6570 * @param pDevIns The device instance. 6571 */ 6572 DECLINLINE(bool) PDMDevHlpCritSectHasWaiters(PPDMDEVINS pDevIns, PCPDMCRITSECT pCritSect) 6573 { 6574 return pDevIns->CTX_SUFF(pHlp)->pfnCritSectHasWaiters(pCritSect); 6575 } 6576 6577 /** 6578 * @copydoc PDMCritSectGetRecursion 6579 * @param pDevIns The device instance. 6580 */ 6581 DECLINLINE(uint32_t) PDMDevHlpCritSectGetRecursion(PPDMDEVINS pDevIns, PCPDMCRITSECT pCritSect) 6582 { 6583 return pDevIns->CTX_SUFF(pHlp)->pfnCritSectGetRecursion(pCritSect); 6584 } 6585 6586 /** 6587 * @copydoc PDMCritSect 6588 * @param pDevIns The device instance. 6589 */ 6590 6591 /* Strict build: Remap the two enter calls to the debug versions. */ 6592 #ifdef VBOX_STRICT 6593 # ifdef IPRT_INCLUDED_asm_h 6594 # define PDMDevHlpCritSectEnter(pDevIns, pCritSect, rcBusy) PDMDevHlpCritSectEnterDebug((pDevIns), (pCritSect), (rcBusy), (uintptr_t)ASMReturnAddress(), RT_SRC_POS) 6595 # define PDMDevHlpCritSectTryEnter(pDevIns, pCritSect) PDMDevHlpCritSectTryEnterDebug((pDevIns), (pCritSect), (uintptr_t)ASMReturnAddress(), RT_SRC_POS) 6596 # else 6597 # define PDMDevHlpCritSectEnter(pDevIns, pCritSect, rcBusy) PDMDevHlpCritSectEnterDebug((pDevIns), (pCritSect), (rcBusy), 0, RT_SRC_POS) 6598 # define PDMDevHlpCritSectTryEnter(pDevIns, pCritSect) PDMDevHlpCritSectTryEnterDebug((pDevIns), (pCritSect), 0, RT_SRC_POS) 6599 # endif 6600 #endif 6601 6602 #ifdef IN_RING3 5208 6603 5209 6604 /** -
trunk/include/VBox/vmm/pdmins.h
r76585 r80531 50 50 51 51 /** @def PDMINS_2_DATA 52 * Converts a PDM Device, USB Device, or Driver instance pointer to a pointer to the instance data.52 * Gets the shared instance data for a PDM device, USB device, or driver instance. 53 53 */ 54 #define PDMINS_2_DATA(pIns, type) ( (type)(void *)&(pIns)->achInstanceData[0] ) 54 #define PDMINS_2_DATA(pIns, type) ( (type)(pIns)->CTX_SUFF(pvInstanceData) ) 55 56 /** @def PDMINS_2_DATA_CC 57 * Gets the current context instance data for a PDM device, USB device, or driver instance. 58 */ 59 #define PDMINS_2_DATA_CC(pIns, type) ( (type)(void *)&(pIns)->achInstanceData[0] ) 60 61 /* @def PDMINS_2_DATA_RC 62 * Gets the raw-mode context instance data for a PDM device instance. 63 */ 64 #define PDMINS_2_DATA_RC(pIns, type) ( (type)(pIns)->CTX_SUFF(pvInstanceDataForRC) ) 65 55 66 56 67 /** @def PDMINS_2_DATA_RCPTR 57 68 * Converts a PDM Device, USB Device, or Driver instance pointer to a RC pointer to the instance data. 69 * @deprecated 58 70 */ 59 71 #define PDMINS_2_DATA_RCPTR(pIns) ( (pIns)->pvInstanceDataRC ) … … 61 73 /** @def PDMINS_2_DATA_R3PTR 62 74 * Converts a PDM Device, USB Device, or Driver instance pointer to a HC pointer to the instance data. 75 * @deprecated 63 76 */ 64 77 #define PDMINS_2_DATA_R3PTR(pIns) ( (pIns)->pvInstanceDataR3 ) … … 66 79 /** @def PDMINS_2_DATA_R0PTR 67 80 * Converts a PDM Device, USB Device, or Driver instance pointer to a R0 pointer to the instance data. 81 * @deprecated 68 82 */ 69 83 #define PDMINS_2_DATA_R0PTR(pIns) ( (pIns)->pvInstanceDataR0 ) -
trunk/include/VBox/vmm/ssm.h
r76585 r80531 1291 1291 VMMR3DECL(int) SSMR3SetLoadErrorV(PSSMHANDLE pSSM, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va) RT_IPRT_FORMAT_ATTR(6, 0); 1292 1292 VMMR3DECL(int) SSMR3SetCfgError(PSSMHANDLE pSSM, RT_SRC_POS_DECL, const char *pszFormat, ...) RT_IPRT_FORMAT_ATTR(5, 6); 1293 VMMR3DECL(int) SSMR3SetCfgErrorV(PSSMHANDLE pSSM, RT_SRC_POS_DECL, const char *pszFormat, va_list va) RT_IPRT_FORMAT_ATTR(5, 0); 1293 1294 1294 1295 /** @} */ -
trunk/include/VBox/vmm/vmm.h
r80346 r80531 353 353 /** Call PDMR0DeviceCallReqHandler. */ 354 354 VMMR0_DO_PDM_DEVICE_CALL_REQ_HANDLER, 355 /** Call PDMR0DeviceCreateReqHandler. */ 356 VMMR0_DO_PDM_DEVICE_CREATE, 357 /** Call PDMR0DeviceGenCallReqHandler. */ 358 VMMR0_DO_PDM_DEVICE_GEN_CALL, 359 /** Old style device compat: Set ring-0 critical section. */ 360 VMMR0_DO_PDM_DEVICE_COMPAT_SET_CRITSECT, 361 /** Old style device compat: Register PCI device. */ 362 VMMR0_DO_PDM_DEVICE_COMPAT_REG_PCIDEV, 355 363 356 364 /** Set a GVMM or GMM configuration value. */ -
trunk/include/iprt/cdefs.h
r77119 r80531 750 750 #define RCPTRTYPE(RCType) CTXTYPE(RCType, RTRCPTR, RTRCPTR) 751 751 752 /** @def GCPTRTYPE 753 * This will become RCPTRTYPE once we've convered all uses of RCPTRTYPE to this. 754 * 755 * @param RCType The RC type. 756 */ 757 #define RGPTRTYPE(RCType) CTXTYPE(RCType, RTGCPTR, RTGCPTR) 758 752 759 /** @def R3R0PTRTYPE 753 760 * Declare a pointer which is used in HC, is explicitly valid in ring 3 and 0, … … 1430 1437 #else 1431 1438 # define DECLRCCALLBACKMEMBER(type, name, args) RTRCPTR name 1439 #endif 1440 #ifdef IN_RC 1441 # define DECLRGCALLBACKMEMBER(type, name, args) DECLCALLBACKMEMBER(type, name) args 1442 #else 1443 # define DECLRGCALLBACKMEMBER(type, name, args) RTRGPTR name 1432 1444 #endif 1433 1445 -
trunk/include/iprt/err.h
r79949 r80531 103 103 /** The request function is not implemented. */ 104 104 #define VERR_NOT_IMPLEMENTED (-12) 105 /** The request function is not implemented. */ 106 #define VINF_NOT_IMPLEMENTED 12 105 107 /** Invalid flags was given. */ 106 108 #define VERR_INVALID_FLAGS (-13) … … 372 374 /** Incompatible configuration requested. */ 373 375 #define VERR_INCOMPATIBLE_CONFIG (-22420) 376 /** String is not terminated within the buffer bounds. */ 377 #define VERR_NO_STRING_TERMINATOR (-22421) 378 /** Empty string. */ 379 #define VERR_EMPTY_STRING (-22422) 380 /** Too many references to an object. */ 381 #define VERR_TOO_MANY_REFERENCES (-22423) 374 382 /** @} */ 375 383 -
trunk/include/iprt/list.h
r76585 r80531 74 74 75 75 /** Version of RTLISTNODE for holding a ring-3 only list in data which gets 76 * shared between multiple contexts */77 #if defined(IN_RING3)76 * shared between multiple contexts. */ 77 #ifdef IN_RING3 78 78 typedef RTLISTNODE RTLISTNODER3; 79 79 #else … … 81 81 #endif 82 82 /** Version of RTLISTANCHOR for holding a ring-3 only list in data which gets 83 * shared between multiple contexts */83 * shared between multiple contexts. */ 84 84 typedef RTLISTNODER3 RTLISTANCHORR3; 85 86 /** Version of RTLISTNODE for holding a ring-0 only list in data which gets 87 * shared between multiple contexts. */ 88 #ifdef IN_RING0 89 typedef RTLISTNODE RTLISTNODER0; 90 #else 91 typedef struct { RTR0PTR aOffLimits[2]; } RTLISTNODER0; 92 #endif 93 /** Version of RTLISTANCHOR for holding a ring-0 only list in data which gets 94 * shared between multiple contexts. */ 95 typedef RTLISTNODER0 RTLISTANCHORR0; 85 96 86 97 -
trunk/include/iprt/types.h
r77122 r80531 1879 1879 #define RTRCINTPTR_MAX ((RTRCINTPTR)INT32_MAX) 1880 1880 1881 /* The following are only temporarily while we clean up RTRCPTR usage: */ 1882 #ifdef IN_RC 1883 typedef void RT_FAR *RTRGPTR; 1884 #else 1885 typedef uint64_t RTRGPTR; 1886 #endif 1887 typedef RTRGPTR RT_FAR *PRTRGPTR; 1888 typedef const RTRGPTR RT_FAR *PCRTRGPTR; 1889 #ifdef IN_RC 1890 # define NIL_RTRGPTR (NULL) 1891 #else 1892 # define NIL_RTRGPTR ((RTRGPTR)0) 1893 #endif 1894 1881 1895 /** @} */ 1882 1896
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