Changeset 80531 in vbox for trunk/src/VBox/Devices/Bus
- Timestamp:
- Sep 1, 2019 11:03:34 PM (6 years ago)
- svn:sync-xref-src-repo-rev:
- 133038
- Location:
- trunk/src/VBox/Devices/Bus
- Files:
-
- 3 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/Devices/Bus/DevPCI.cpp
r77663 r80531 1394 1394 } 1395 1395 1396 #endif /* IN_RING3 */ 1396 1397 1397 1398 /** … … 1400 1401 const PDMDEVREG g_DevicePCI = 1401 1402 { 1402 /* u32Version */ 1403 PDM_DEVREG_VERSION, 1404 /* szName */ 1405 "pci", 1406 /* szRCMod */ 1407 "VBoxDDRC.rc", 1408 /* szR0Mod */ 1409 "VBoxDDR0.r0", 1410 /* pszDescription */ 1411 "i440FX PCI bridge and PIIX3 ISA bridge.", 1412 /* fFlags */ 1413 PDM_DEVREG_FLAGS_DEFAULT_BITS | PDM_DEVREG_FLAGS_RC | PDM_DEVREG_FLAGS_R0, 1414 /* fClass */ 1415 PDM_DEVREG_CLASS_BUS_PCI | PDM_DEVREG_CLASS_BUS_ISA, 1416 /* cMaxInstances */ 1417 1, 1418 /* cbInstance */ 1419 sizeof(DEVPCIROOT), 1420 /* pfnConstruct */ 1421 pciR3Construct, 1422 /* pfnDestruct */ 1423 pciR3Destruct, 1424 /* pfnRelocate */ 1425 devpciR3RootRelocate, 1426 /* pfnMemSetup */ 1427 NULL, 1428 /* pfnPowerOn */ 1429 NULL, 1430 /* pfnReset */ 1431 pciR3Reset, 1432 /* pfnSuspend */ 1433 NULL, 1434 /* pfnResume */ 1435 NULL, 1436 /* pfnAttach */ 1437 NULL, 1438 /* pfnDetach */ 1439 NULL, 1440 /* pfnQueryInterface */ 1441 NULL, 1442 /* pfnInitComplete */ 1443 NULL, 1444 /* pfnPowerOff */ 1445 NULL, 1446 /* pfnSoftReset */ 1447 NULL, 1448 /* u32VersionEnd */ 1449 PDM_DEVREG_VERSION 1403 /* .u32Version = */ PDM_DEVREG_VERSION, 1404 /* .uReserved0 = */ 0, 1405 /* .szName = */ "pci", 1406 /* .fFlags = */ PDM_DEVREG_FLAGS_DEFAULT_BITS | PDM_DEVREG_FLAGS_RC | PDM_DEVREG_FLAGS_R0, 1407 /* .fClass = */ PDM_DEVREG_CLASS_BUS_PCI | PDM_DEVREG_CLASS_BUS_ISA, 1408 /* .cMaxInstances = */ 1, 1409 /* .uSharedVersion = */ 42, 1410 /* .cbInstanceShared = */ sizeof(DEVPCIROOT), 1411 /* .cbInstanceCC = */ 0, 1412 /* .cbInstanceRC = */ 0, 1413 /* .uReserved1 = */ 0, 1414 /* .pszDescription = */ "i440FX PCI bridge and PIIX3 ISA bridge.", 1415 #if defined(IN_RING3) 1416 /* .pszRCMod = */ "VBoxDDRC.rc", 1417 /* .pszR0Mod = */ "VBoxDDR0.r0", 1418 /* .pfnConstruct = */ pciR3Construct, 1419 /* .pfnDestruct = */ pciR3Destruct, 1420 /* .pfnRelocate = */ devpciR3RootRelocate, 1421 /* .pfnMemSetup = */ NULL, 1422 /* .pfnPowerOn = */ NULL, 1423 /* .pfnReset = */ pciR3Reset, 1424 /* .pfnSuspend = */ NULL, 1425 /* .pfnResume = */ NULL, 1426 /* .pfnAttach = */ NULL, 1427 /* .pfnDetach = */ NULL, 1428 /* .pfnQueryInterface = */ NULL, 1429 /* .pfnInitComplete = */ NULL, 1430 /* .pfnPowerOff = */ NULL, 1431 /* .pfnSoftReset = */ NULL, 1432 /* .pfnReserved0 = */ NULL, 1433 /* .pfnReserved1 = */ NULL, 1434 /* .pfnReserved2 = */ NULL, 1435 /* .pfnReserved3 = */ NULL, 1436 /* .pfnReserved4 = */ NULL, 1437 /* .pfnReserved5 = */ NULL, 1438 /* .pfnReserved6 = */ NULL, 1439 /* .pfnReserved7 = */ NULL, 1440 #elif defined(IN_RING0) 1441 /* .pfnEarlyConstruct = */ NULL, 1442 /* .pfnConstruct = */ NULL, 1443 /* .pfnDestruct = */ NULL, 1444 /* .pfnFinalDestruct = */ NULL, 1445 /* .pfnRequest = */ NULL, 1446 /* .pfnReserved0 = */ NULL, 1447 /* .pfnReserved1 = */ NULL, 1448 /* .pfnReserved2 = */ NULL, 1449 /* .pfnReserved3 = */ NULL, 1450 /* .pfnReserved4 = */ NULL, 1451 /* .pfnReserved5 = */ NULL, 1452 /* .pfnReserved6 = */ NULL, 1453 /* .pfnReserved7 = */ NULL, 1454 #elif defined(IN_RC) 1455 /* .pfnConstruct = */ NULL, 1456 /* .pfnReserved0 = */ NULL, 1457 /* .pfnReserved1 = */ NULL, 1458 /* .pfnReserved2 = */ NULL, 1459 /* .pfnReserved3 = */ NULL, 1460 /* .pfnReserved4 = */ NULL, 1461 /* .pfnReserved5 = */ NULL, 1462 /* .pfnReserved6 = */ NULL, 1463 /* .pfnReserved7 = */ NULL, 1464 #else 1465 # error "Not in IN_RING3, IN_RING0 or IN_RC!" 1466 #endif 1467 /* .u32VersionEnd = */ PDM_DEVREG_VERSION 1450 1468 1451 1469 }; 1452 #endif /* IN_RING3 */1453 1470 1454 1471 … … 1719 1736 } 1720 1737 1738 #endif /* IN_RING3 */ 1721 1739 1722 1740 /** … … 1726 1744 const PDMDEVREG g_DevicePCIBridge = 1727 1745 { 1728 /* u32Version */ 1729 PDM_DEVREG_VERSION, 1730 /* szName */ 1731 "pcibridge", 1732 /* szRCMod */ 1733 "VBoxDDRC.rc", 1734 /* szR0Mod */ 1735 "VBoxDDR0.r0", 1736 /* pszDescription */ 1737 "82801 Mobile PCI to PCI bridge", 1738 /* fFlags */ 1739 PDM_DEVREG_FLAGS_DEFAULT_BITS | PDM_DEVREG_FLAGS_RC | PDM_DEVREG_FLAGS_R0, 1740 /* fClass */ 1741 PDM_DEVREG_CLASS_BUS_PCI, 1742 /* cMaxInstances */ 1743 ~0U, 1744 /* cbInstance */ 1745 sizeof(DEVPCIBUS), 1746 /* pfnConstruct */ 1747 pcibridgeR3Construct, 1748 /* pfnDestruct */ 1749 pcibridgeR3Destruct, 1750 /* pfnRelocate */ 1751 devpciR3BusRelocate, 1752 /* pfnMemSetup */ 1753 NULL, 1754 /* pfnPowerOn */ 1755 NULL, 1756 /* pfnReset */ 1757 pcibridgeR3Reset, 1758 /* pfnSuspend */ 1759 NULL, 1760 /* pfnResume */ 1761 NULL, 1762 /* pfnAttach */ 1763 NULL, 1764 /* pfnDetach */ 1765 NULL, 1766 /* pfnQueryInterface */ 1767 NULL, 1768 /* pfnInitComplete */ 1769 NULL, 1770 /* pfnPowerOff */ 1771 NULL, 1772 /* pfnSoftReset */ 1773 NULL, 1774 /* u32VersionEnd */ 1775 PDM_DEVREG_VERSION 1746 /* .u32Version = */ PDM_DEVREG_VERSION, 1747 /* .uReserved0 = */ 0, 1748 /* .szName = */ "pcibridge", 1749 /* .fFlags = */ PDM_DEVREG_FLAGS_DEFAULT_BITS | PDM_DEVREG_FLAGS_RC | PDM_DEVREG_FLAGS_R0, 1750 /* .fClass = */ PDM_DEVREG_CLASS_BUS_PCI, 1751 /* .cMaxInstances = */ ~0U, 1752 /* .uSharedVersion = */ 42, 1753 /* .cbInstanceShared = */ sizeof(DEVPCIBUS), 1754 /* .cbInstanceCC = */ 0, 1755 /* .cbInstanceRC = */ 0, 1756 /* .uReserved1 = */ 0, 1757 /* .pszDescription = */ "82801 Mobile PCI to PCI bridge", 1758 #if defined(IN_RING3) 1759 /* .pszRCMod = */ "VBoxDDRC.rc", 1760 /* .pszR0Mod = */ "VBoxDDR0.r0", 1761 /* .pfnConstruct = */ pcibridgeR3Construct, 1762 /* .pfnDestruct = */ pcibridgeR3Destruct, 1763 /* .pfnRelocate = */ devpciR3BusRelocate, 1764 /* .pfnMemSetup = */ NULL, 1765 /* .pfnPowerOn = */ NULL, 1766 /* .pfnReset = */ pcibridgeR3Reset, 1767 /* .pfnSuspend = */ NULL, 1768 /* .pfnResume = */ NULL, 1769 /* .pfnAttach = */ NULL, 1770 /* .pfnDetach = */ NULL, 1771 /* .pfnQueryInterface = */ NULL, 1772 /* .pfnInitComplete = */ NULL, 1773 /* .pfnPowerOff = */ NULL, 1774 /* .pfnSoftReset = */ NULL, 1775 /* .pfnReserved0 = */ NULL, 1776 /* .pfnReserved1 = */ NULL, 1777 /* .pfnReserved2 = */ NULL, 1778 /* .pfnReserved3 = */ NULL, 1779 /* .pfnReserved4 = */ NULL, 1780 /* .pfnReserved5 = */ NULL, 1781 /* .pfnReserved6 = */ NULL, 1782 /* .pfnReserved7 = */ NULL, 1783 #elif defined(IN_RING0) 1784 /* .pfnEarlyConstruct = */ NULL, 1785 /* .pfnConstruct = */ NULL, 1786 /* .pfnDestruct = */ NULL, 1787 /* .pfnFinalDestruct = */ NULL, 1788 /* .pfnRequest = */ NULL, 1789 /* .pfnReserved0 = */ NULL, 1790 /* .pfnReserved1 = */ NULL, 1791 /* .pfnReserved2 = */ NULL, 1792 /* .pfnReserved3 = */ NULL, 1793 /* .pfnReserved4 = */ NULL, 1794 /* .pfnReserved5 = */ NULL, 1795 /* .pfnReserved6 = */ NULL, 1796 /* .pfnReserved7 = */ NULL, 1797 #elif defined(IN_RC) 1798 /* .pfnConstruct = */ NULL, 1799 /* .pfnReserved0 = */ NULL, 1800 /* .pfnReserved1 = */ NULL, 1801 /* .pfnReserved2 = */ NULL, 1802 /* .pfnReserved3 = */ NULL, 1803 /* .pfnReserved4 = */ NULL, 1804 /* .pfnReserved5 = */ NULL, 1805 /* .pfnReserved6 = */ NULL, 1806 /* .pfnReserved7 = */ NULL, 1807 #else 1808 # error "Not in IN_RING3, IN_RING0 or IN_RC!" 1809 #endif 1810 /* .u32VersionEnd = */ PDM_DEVREG_VERSION 1776 1811 }; 1777 1812 1778 #endif /* IN_RING3 */1779 -
trunk/src/VBox/Devices/Bus/DevPciIch9.cpp
r77300 r80531 3588 3588 } 3589 3589 3590 3590 #endif /* IN_RING3 */ 3591 3591 3592 3592 /** … … 3595 3595 const PDMDEVREG g_DevicePciIch9 = 3596 3596 { 3597 /* u32Version */ 3598 PDM_DEVREG_VERSION, 3599 /* szName */ 3600 "ich9pci", 3601 /* szRCMod */ 3602 "VBoxDDRC.rc", 3603 /* szR0Mod */ 3604 "VBoxDDR0.r0", 3605 /* pszDescription */ 3606 "ICH9 PCI bridge", 3607 /* fFlags */ 3608 PDM_DEVREG_FLAGS_DEFAULT_BITS | PDM_DEVREG_FLAGS_RC | PDM_DEVREG_FLAGS_R0, 3609 /* fClass */ 3610 PDM_DEVREG_CLASS_BUS_PCI | PDM_DEVREG_CLASS_BUS_ISA, 3611 /* cMaxInstances */ 3612 1, 3613 /* cbInstance */ 3614 sizeof(DEVPCIROOT), 3615 /* pfnConstruct */ 3616 ich9pciConstruct, 3617 /* pfnDestruct */ 3618 ich9pciDestruct, 3619 /* pfnRelocate */ 3620 devpciR3RootRelocate, 3621 /* pfnMemSetup */ 3622 NULL, 3623 /* pfnPowerOn */ 3624 NULL, 3625 /* pfnReset */ 3626 ich9pciReset, 3627 /* pfnSuspend */ 3628 NULL, 3629 /* pfnResume */ 3630 NULL, 3631 /* pfnAttach */ 3632 NULL, 3633 /* pfnDetach */ 3634 NULL, 3635 /* pfnQueryInterface */ 3636 NULL, 3637 /* pfnInitComplete */ 3638 NULL, 3639 /* pfnPowerOff */ 3640 NULL, 3641 /* pfnSoftReset */ 3642 NULL, 3643 /* u32VersionEnd */ 3644 PDM_DEVREG_VERSION 3597 /* .u32Version = */ PDM_DEVREG_VERSION, 3598 /* .uReserved0 = */ 0, 3599 /* .szName = */ "ich9pci", 3600 /* .fFlags = */ PDM_DEVREG_FLAGS_DEFAULT_BITS | PDM_DEVREG_FLAGS_RC | PDM_DEVREG_FLAGS_R0, 3601 /* .fClass = */ PDM_DEVREG_CLASS_BUS_PCI | PDM_DEVREG_CLASS_BUS_ISA, 3602 /* .cMaxInstances = */ 1, 3603 /* .uSharedVersion = */ 42, 3604 /* .cbInstanceShared = */ sizeof(DEVPCIROOT), 3605 /* .cbInstanceCC = */ 0, 3606 /* .cbInstanceRC = */ 0, 3607 /* .uReserved1 = */ 0, 3608 /* .pszDescription = */ "ICH9 PCI bridge", 3609 #if defined(IN_RING3) 3610 /* .pszRCMod = */ "VBoxDDRC.rc", 3611 /* .pszR0Mod = */ "VBoxDDR0.r0", 3612 /* .pfnConstruct = */ ich9pciConstruct, 3613 /* .pfnDestruct = */ ich9pciDestruct, 3614 /* .pfnRelocate = */ devpciR3RootRelocate, 3615 /* .pfnMemSetup = */ NULL, 3616 /* .pfnPowerOn = */ NULL, 3617 /* .pfnReset = */ ich9pciReset, 3618 /* .pfnSuspend = */ NULL, 3619 /* .pfnResume = */ NULL, 3620 /* .pfnAttach = */ NULL, 3621 /* .pfnDetach = */ NULL, 3622 /* .pfnQueryInterface = */ NULL, 3623 /* .pfnInitComplete = */ NULL, 3624 /* .pfnPowerOff = */ NULL, 3625 /* .pfnSoftReset = */ NULL, 3626 /* .pfnReserved0 = */ NULL, 3627 /* .pfnReserved1 = */ NULL, 3628 /* .pfnReserved2 = */ NULL, 3629 /* .pfnReserved3 = */ NULL, 3630 /* .pfnReserved4 = */ NULL, 3631 /* .pfnReserved5 = */ NULL, 3632 /* .pfnReserved6 = */ NULL, 3633 /* .pfnReserved7 = */ NULL, 3634 #elif defined(IN_RING0) 3635 /* .pfnEarlyConstruct = */ NULL, 3636 /* .pfnConstruct = */ NULL, 3637 /* .pfnDestruct = */ NULL, 3638 /* .pfnFinalDestruct = */ NULL, 3639 /* .pfnRequest = */ NULL, 3640 /* .pfnReserved0 = */ NULL, 3641 /* .pfnReserved1 = */ NULL, 3642 /* .pfnReserved2 = */ NULL, 3643 /* .pfnReserved3 = */ NULL, 3644 /* .pfnReserved4 = */ NULL, 3645 /* .pfnReserved5 = */ NULL, 3646 /* .pfnReserved6 = */ NULL, 3647 /* .pfnReserved7 = */ NULL, 3648 #elif defined(IN_RC) 3649 /* .pfnConstruct = */ NULL, 3650 /* .pfnReserved0 = */ NULL, 3651 /* .pfnReserved1 = */ NULL, 3652 /* .pfnReserved2 = */ NULL, 3653 /* .pfnReserved3 = */ NULL, 3654 /* .pfnReserved4 = */ NULL, 3655 /* .pfnReserved5 = */ NULL, 3656 /* .pfnReserved6 = */ NULL, 3657 /* .pfnReserved7 = */ NULL, 3658 #else 3659 # error "Not in IN_RING3, IN_RING0 or IN_RC!" 3660 #endif 3661 /* .u32VersionEnd = */ PDM_DEVREG_VERSION 3645 3662 }; 3646 3663 … … 3651 3668 const PDMDEVREG g_DevicePciIch9Bridge = 3652 3669 { 3653 /* u32Version */ 3654 PDM_DEVREG_VERSION, 3655 /* szName */ 3656 "ich9pcibridge", 3657 /* szRCMod */ 3658 "VBoxDDRC.rc", 3659 /* szR0Mod */ 3660 "VBoxDDR0.r0", 3661 /* pszDescription */ 3662 "ICH9 PCI to PCI bridge", 3663 /* fFlags */ 3664 PDM_DEVREG_FLAGS_DEFAULT_BITS | PDM_DEVREG_FLAGS_RC | PDM_DEVREG_FLAGS_R0, 3665 /* fClass */ 3666 PDM_DEVREG_CLASS_BUS_PCI, 3667 /* cMaxInstances */ 3668 ~0U, 3669 /* cbInstance */ 3670 sizeof(DEVPCIBUS), 3671 /* pfnConstruct */ 3672 ich9pcibridgeConstruct, 3673 /* pfnDestruct */ 3674 ich9pcibridgeDestruct, 3675 /* pfnRelocate */ 3676 devpciR3BusRelocate, 3677 /* pfnMemSetup */ 3678 NULL, 3679 /* pfnPowerOn */ 3680 NULL, 3681 /* pfnReset */ 3682 NULL, /* Must be NULL, to make sure only bus driver handles reset */ 3683 /* pfnSuspend */ 3684 NULL, 3685 /* pfnResume */ 3686 NULL, 3687 /* pfnAttach */ 3688 NULL, 3689 /* pfnDetach */ 3690 NULL, 3691 /* pfnQueryInterface */ 3692 NULL, 3693 /* pfnInitComplete */ 3694 NULL, 3695 /* pfnPowerOff */ 3696 NULL, 3697 /* pfnSoftReset */ 3698 NULL, 3699 /* u32VersionEnd */ 3700 PDM_DEVREG_VERSION 3670 /* .u32Version = */ PDM_DEVREG_VERSION, 3671 /* .uReserved0 = */ 0, 3672 /* .szName = */ "ich9pcibridge", 3673 /* .fFlags = */ PDM_DEVREG_FLAGS_DEFAULT_BITS | PDM_DEVREG_FLAGS_RC | PDM_DEVREG_FLAGS_R0, 3674 /* .fClass = */ PDM_DEVREG_CLASS_BUS_PCI, 3675 /* .cMaxInstances = */ ~0U, 3676 /* .uSharedVersion = */ 42, 3677 /* .cbInstanceShared = */ sizeof(DEVPCIBUS), 3678 /* .cbInstanceCC = */ 0, 3679 /* .cbInstanceRC = */ 0, 3680 /* .uReserved1 = */ 0, 3681 /* .pszDescription = */ "ICH9 PCI to PCI bridge", 3682 #if defined(IN_RING3) 3683 /* .pszRCMod = */ "VBoxDDRC.rc", 3684 /* .pszR0Mod = */ "VBoxDDR0.r0", 3685 /* .pfnConstruct = */ ich9pcibridgeConstruct, 3686 /* .pfnDestruct = */ ich9pcibridgeDestruct, 3687 /* .pfnRelocate = */ devpciR3BusRelocate, 3688 /* .pfnMemSetup = */ NULL, 3689 /* .pfnPowerOn = */ NULL, 3690 /* .pfnReset = */ NULL, /* Must be NULL, to make sure only bus driver handles reset */ 3691 /* .pfnSuspend = */ NULL, 3692 /* .pfnResume = */ NULL, 3693 /* .pfnAttach = */ NULL, 3694 /* .pfnDetach = */ NULL, 3695 /* .pfnQueryInterface = */ NULL, 3696 /* .pfnInitComplete = */ NULL, 3697 /* .pfnPowerOff = */ NULL, 3698 /* .pfnSoftReset = */ NULL, 3699 /* .pfnReserved0 = */ NULL, 3700 /* .pfnReserved1 = */ NULL, 3701 /* .pfnReserved2 = */ NULL, 3702 /* .pfnReserved3 = */ NULL, 3703 /* .pfnReserved4 = */ NULL, 3704 /* .pfnReserved5 = */ NULL, 3705 /* .pfnReserved6 = */ NULL, 3706 /* .pfnReserved7 = */ NULL, 3707 #elif defined(IN_RING0) 3708 /* .pfnEarlyConstruct = */ NULL, 3709 /* .pfnConstruct = */ NULL, 3710 /* .pfnDestruct = */ NULL, 3711 /* .pfnFinalDestruct = */ NULL, 3712 /* .pfnRequest = */ NULL, 3713 /* .pfnReserved0 = */ NULL, 3714 /* .pfnReserved1 = */ NULL, 3715 /* .pfnReserved2 = */ NULL, 3716 /* .pfnReserved3 = */ NULL, 3717 /* .pfnReserved4 = */ NULL, 3718 /* .pfnReserved5 = */ NULL, 3719 /* .pfnReserved6 = */ NULL, 3720 /* .pfnReserved7 = */ NULL, 3721 #elif defined(IN_RC) 3722 /* .pfnConstruct = */ NULL, 3723 /* .pfnReserved0 = */ NULL, 3724 /* .pfnReserved1 = */ NULL, 3725 /* .pfnReserved2 = */ NULL, 3726 /* .pfnReserved3 = */ NULL, 3727 /* .pfnReserved4 = */ NULL, 3728 /* .pfnReserved5 = */ NULL, 3729 /* .pfnReserved6 = */ NULL, 3730 /* .pfnReserved7 = */ NULL, 3731 #else 3732 # error "Not in IN_RING3, IN_RING0 or IN_RC!" 3733 #endif 3734 /* .u32VersionEnd = */ PDM_DEVREG_VERSION 3701 3735 }; 3702 3736 3703 #endif /* IN_RING3 */3704 -
trunk/src/VBox/Devices/Bus/DevPciMerge1.cpp.h
r76553 r80531 51 51 * 52 52 * @returns VBox status code. 53 * @param pDevIns The PCI bus device instance. 53 54 * @param pBus The bus to register with. 54 55 * @param pPciDev The PCI device structure. … … 64 65 * @remarks Caller enters the PDM critical section. 65 66 */ 66 static int pciR3MergedRegisterDeviceOnBus(P DEVPCIBUS pBus, PPDMPCIDEV pPciDev, uint32_t fFlags,67 static int pciR3MergedRegisterDeviceOnBus(PPDMDEVINS pDevIns, PDEVPCIBUS pBus, PPDMPCIDEV pPciDev, uint32_t fFlags, 67 68 uint8_t uPciDevNo, uint8_t uPciFunNo, const char *pszName, 68 69 PFNPCICONFIGREAD pfnConfigRead, PFNPCICONFIGWRITE pfnConfigWrite) … … 193 194 pPciDev->uDevFn = VBOX_PCI_DEVFN_MAKE(uPciDevNo, uPciFunNo); 194 195 pPciDev->Int.s.pBusR3 = pBus; 195 pPciDev->Int.s.pBusR0 = MMHyperR3ToR0(PDMDevHlpGetVM(pBus->CTX_SUFF(pDevIns)), pBus); 196 pPciDev->Int.s.pBusRC = MMHyperR3ToRC(PDMDevHlpGetVM(pBus->CTX_SUFF(pDevIns)), pBus); 196 Assert(pBus == PDMINS_2_DATA(pDevIns, PDEVPCIBUS)); 197 pPciDev->Int.s.pBusR0 = PDMINS_2_DATA_R0PTR(pDevIns); 198 pPciDev->Int.s.pBusRC = PDMINS_2_DATA_RCPTR(pDevIns); 197 199 pPciDev->Int.s.pfnConfigRead = pfnConfigRead; 198 200 pPciDev->Int.s.pfnConfigWrite = pfnConfigWrite; … … 223 225 PDEVPCIBUS pBus = PDMINS_2_DATA(pDevIns, PDEVPCIBUS); 224 226 AssertCompileMemberOffset(DEVPCIROOT, PciBus, 0); 225 return pciR3MergedRegisterDeviceOnBus(p Bus, pPciDev, fFlags, uPciDevNo, uPciFunNo, pszName,227 return pciR3MergedRegisterDeviceOnBus(pDevIns, pBus, pPciDev, fFlags, uPciDevNo, uPciFunNo, pszName, 226 228 devpciR3CommonDefaultConfigRead, devpciR3CommonDefaultConfigWrite); 227 229 } … … 235 237 { 236 238 PDEVPCIBUS pBus = PDMINS_2_DATA(pDevIns, PDEVPCIBUS); 237 return pciR3MergedRegisterDeviceOnBus(p Bus, pPciDev, fFlags, uPciDevNo, uPciFunNo, pszName,239 return pciR3MergedRegisterDeviceOnBus(pDevIns, pBus, pPciDev, fFlags, uPciDevNo, uPciFunNo, pszName, 238 240 devpciR3CommonDefaultConfigRead, devpciR3CommonDefaultConfigWrite); 239 241 }
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