Changeset 80684 in vbox
- Timestamp:
- Sep 9, 2019 8:13:38 PM (5 years ago)
- File:
-
- 1 edited
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- Unmodified
- Added
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trunk/src/VBox/Devices/Audio/DevHDA.h
r76565 r80684 48 48 typedef struct HDAMIXERSINK 49 49 { 50 R3PTRTYPE(PHDASTREAM) pStream;50 R3PTRTYPE(PHDASTREAM) pStream; 51 51 /** Pointer to the actual audio mixer sink. */ 52 R3PTRTYPE(PAUDMIXSINK) pMixSink;52 R3PTRTYPE(PAUDMIXSINK) pMixSink; 53 53 } HDAMIXERSINK, *PHDAMIXERSINK; 54 54 … … 59 59 { 60 60 /** Own stream tag. */ 61 uint8_t uTag;62 uint8_t Padding[7];61 uint8_t uTag; 62 uint8_t Padding[7]; 63 63 /** Pointer to associated stream. */ 64 64 R3PTRTYPE(PHDASTREAM) pStream; … … 71 71 /** Timestamp (in ns) of the last timer callback (hdaTimer). 72 72 * Used to calculate the time actually elapsed between two timer callbacks. */ 73 uint64_t 73 uint64_t tsTimerLastCalledNs; 74 74 /** IRQ debugging information. */ 75 75 struct 76 76 { 77 77 /** Timestamp (in ns) of last processed (asserted / deasserted) IRQ. */ 78 uint64_t 78 uint64_t tsProcessedLastNs; 79 79 /** Timestamp (in ns) of last asserted IRQ. */ 80 uint64_t 80 uint64_t tsAssertedNs; 81 81 /** How many IRQs have been asserted already. */ 82 uint64_t 82 uint64_t cAsserted; 83 83 /** Accumulated elapsed time (in ns) of all IRQ being asserted. */ 84 uint64_t 84 uint64_t tsAssertedTotalNs; 85 85 /** Timestamp (in ns) of last deasserted IRQ. */ 86 uint64_t 86 uint64_t tsDeassertedNs; 87 87 /** How many IRQs have been deasserted already. */ 88 uint64_t 88 uint64_t cDeasserted; 89 89 /** Accumulated elapsed time (in ns) of all IRQ being deasserted. */ 90 uint64_t 90 uint64_t tsDeassertedTotalNs; 91 91 } IRQ; 92 92 #endif 93 93 /** Whether debugging is enabled or not. */ 94 bool 94 bool fEnabled; 95 95 /** Path where to dump the debug output to. 96 96 * Defaults to VBOX_AUDIO_DEBUG_DUMP_PCM_DATA_PATH. */ 97 char 97 char szOutPath[RTPATH_MAX + 1]; 98 98 } HDASTATEDBGINFO, *PHDASTATEDBGINFO; 99 99 … … 104 104 { 105 105 /** The PCI device structure. */ 106 PDMPCIDEV 106 PDMPCIDEV PciDev; 107 107 /** R3 Pointer to the device instance. */ 108 PPDMDEVINSR3 108 PPDMDEVINSR3 pDevInsR3; 109 109 /** R0 Pointer to the device instance. */ 110 PPDMDEVINSR0 110 PPDMDEVINSR0 pDevInsR0; 111 111 /** R0 Pointer to the device instance. */ 112 PPDMDEVINSRC 112 PPDMDEVINSRC pDevInsRC; 113 113 /** Padding for alignment. */ 114 uint32_t 114 uint32_t u32Padding; 115 115 /** Critical section protecting the HDA state. */ 116 PDMCRITSECT 116 PDMCRITSECT CritSect; 117 117 /** The base interface for LUN\#0. */ 118 PDMIBASE 119 RTGCPHYS 118 PDMIBASE IBase; 119 RTGCPHYS MMIOBaseAddr; 120 120 /** The HDA's register set. */ 121 uint32_t 121 uint32_t au32Regs[HDA_NUM_REGS]; 122 122 /** Internal stream states. */ 123 HDASTREAM 123 HDASTREAM aStreams[HDA_MAX_STREAMS]; 124 124 /** Mapping table between stream tags and stream states. */ 125 HDATAG 125 HDATAG aTags[HDA_MAX_TAGS]; 126 126 /** CORB buffer base address. */ 127 uint64_t 127 uint64_t u64CORBBase; 128 128 /** RIRB buffer base address. */ 129 uint64_t 129 uint64_t u64RIRBBase; 130 130 /** DMA base address. 131 131 * Made out of DPLBASE + DPUBASE (3.3.32 + 3.3.33). */ 132 uint64_t 132 uint64_t u64DPBase; 133 133 /** Pointer to CORB buffer. */ 134 R3PTRTYPE(uint32_t *) 134 R3PTRTYPE(uint32_t *) pu32CorbBuf; 135 135 /** Size in bytes of CORB buffer. */ 136 uint32_t 136 uint32_t cbCorbBuf; 137 137 /** Padding for alignment. */ 138 uint32_t 138 uint32_t u32Padding1; 139 139 /** Pointer to RIRB buffer. */ 140 R3PTRTYPE(uint64_t *) 140 R3PTRTYPE(uint64_t *) pu64RirbBuf; 141 141 /** Size in bytes of RIRB buffer. */ 142 uint32_t 142 uint32_t cbRirbBuf; 143 143 /** DMA position buffer enable bit. */ 144 bool 144 bool fDMAPosition; 145 145 /** Flag whether the R0 and RC parts are enabled. */ 146 bool 146 bool fRZEnabled; 147 147 /** Reserved. */ 148 bool 148 bool fPadding1b; 149 149 /** Number of active (running) SDn streams. */ 150 uint8_t 150 uint8_t cStreamsActive; 151 151 /** The stream timers for pumping data thru the attached LUN drivers. */ 152 PTMTIMERR3 152 PTMTIMERR3 pTimer[HDA_MAX_STREAMS]; 153 153 #ifdef VBOX_WITH_STATISTICS 154 STAMPROFILE 155 STAMPROFILE 156 STAMPROFILE 157 STAMCOUNTER 158 STAMCOUNTER 154 STAMPROFILE StatTimer; 155 STAMPROFILE StatIn; 156 STAMPROFILE StatOut; 157 STAMCOUNTER StatBytesRead; 158 STAMCOUNTER StatBytesWritten; 159 159 #endif 160 160 /** Pointer to HDA codec to use. */ 161 R3PTRTYPE(PHDACODEC) 161 R3PTRTYPE(PHDACODEC) pCodec; 162 162 /** List of associated LUN drivers (HDADRIVER). */ 163 RTLISTANCHORR3 163 RTLISTANCHORR3 lstDrv; 164 164 /** The device' software mixer. */ 165 R3PTRTYPE(PAUDIOMIXER) 165 R3PTRTYPE(PAUDIOMIXER) pMixer; 166 166 /** HDA sink for (front) output. */ 167 HDAMIXERSINK 167 HDAMIXERSINK SinkFront; 168 168 #ifdef VBOX_WITH_AUDIO_HDA_51_SURROUND 169 169 /** HDA sink for center / LFE output. */ 170 HDAMIXERSINK 170 HDAMIXERSINK SinkCenterLFE; 171 171 /** HDA sink for rear output. */ 172 HDAMIXERSINK 172 HDAMIXERSINK SinkRear; 173 173 #endif 174 174 /** HDA mixer sink for line input. */ 175 HDAMIXERSINK 175 HDAMIXERSINK SinkLineIn; 176 176 #ifdef VBOX_WITH_AUDIO_HDA_MIC_IN 177 177 /** Audio mixer sink for microphone input. */ 178 HDAMIXERSINK 178 HDAMIXERSINK SinkMicIn; 179 179 #endif 180 180 /** Last updated wall clock (WALCLK) counter. */ 181 uint64_t 181 uint64_t u64WalClk; 182 182 /** Response Interrupt Count (RINTCNT). */ 183 uint16_t 183 uint16_t u16RespIntCnt; 184 184 /** Position adjustment (in audio frames). 185 185 * … … 192 192 * starting a stream. 193 193 */ 194 uint16_t 194 uint16_t cPosAdjustFrames; 195 195 /** Whether the position adjustment is enabled or not. */ 196 bool 196 bool fPosAdjustEnabled; 197 197 #ifdef VBOX_STRICT 198 198 /** Wall clock (WALCLK) stale count. 199 * This indicates the number of set wall clock 200 * values which did not actuallymove the counter forward (stale). */201 uint8_t 202 uint8_t 199 * This indicates the number of set wall clock values which did not actually 200 * move the counter forward (stale). */ 201 uint8_t u8WalClkStaleCnt; 202 uint8_t Padding1[2]; 203 203 #else 204 uint8_t 204 uint8_t Padding1[3]; 205 205 #endif 206 206 /** Current IRQ level. */ 207 uint8_t 207 uint8_t u8IRQL; 208 208 /** The device timer Hz rate. Defaults to HDA_TIMER_HZ_DEFAULT. */ 209 uint16_t 209 uint16_t uTimerHz; 210 210 /** Padding for alignment. */ 211 uint8_t 212 HDASTATEDBGINFO 211 uint8_t au8Padding3[3]; 212 HDASTATEDBGINFO Dbg; 213 213 /** This is for checking that the build was correctly configured in all contexts. 214 * This is set to HDASTATE_ALIGNMENT_CHECK_MAGIC.*/215 uint64_t 214 * This is set to HDASTATE_ALIGNMENT_CHECK_MAGIC. */ 215 uint64_t uAlignmentCheckMagic; 216 216 } HDASTATE, *PHDASTATE; 217 217
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