Changeset 80722 in vbox
- Timestamp:
- Sep 11, 2019 9:21:47 AM (5 years ago)
- Location:
- trunk
- Files:
-
- 4 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/include/VBox/vmm/pdmdev.h
r80704 r80722 5035 5035 RTR3PTR pvInstanceDataForRCR3; 5036 5036 5037 /** Pointer to the PCI devices for this device. 5038 * (Allocated after the shared instance data.) */ 5039 R3PTRTYPE(struct PDMPCIDEV *) apPciDevs[8]; 5040 5037 5041 /** Temporarily. */ 5038 5042 R0PTRTYPE(struct PDMDEVINSR0 *) pDevInsR0RemoveMe; … … 5059 5063 5060 5064 /** Current PDMDEVINSR3 version number. */ 5061 #define PDM_DEVINSR3_VERSION PDM_VERSION_MAKE(0xff82, 1, 0)5065 #define PDM_DEVINSR3_VERSION PDM_VERSION_MAKE(0xff82, 2, 0) 5062 5066 5063 5067 /** Converts a pointer to the PDMDEVINSR3::IBase to a pointer to PDMDEVINS. */ … … 5107 5111 /** Ring-0 pointer to the raw-mode instance data. */ 5108 5112 RTR0PTR pvInstanceDataForRCR0; 5113 5114 /** Pointer to the PCI devices for this device. 5115 * (Allocated after the shared instance data.) */ 5116 R0PTRTYPE(struct PDMPCIDEV *) apPciDevs[8]; 5117 5109 5118 #if HC_ARCH_BITS == 32 5110 5119 /** Align the internal data more naturally. */ … … 5127 5136 5128 5137 /** Current PDMDEVINSR0 version number. */ 5129 #define PDM_DEVINSR0_VERSION PDM_VERSION_MAKE(0xff83, 1, 0)5138 #define PDM_DEVINSR0_VERSION PDM_VERSION_MAKE(0xff83, 2, 0) 5130 5139 5131 5140 … … 5158 5167 */ 5159 5168 RGPTRTYPE(PPDMCRITSECT) pCritSectRoRC; 5160 /** Pointer to the ring-0 device registration structure. */ 5161 RGPTRTYPE(PCPDMDEVREGR0) pReg; 5169 /** Pointer to the raw-mode device registration structure. */ 5170 RGPTRTYPE(PCPDMDEVREGRC) pReg; 5171 /** Pointer to the PCI devices for this device. 5172 * (Allocated after the shared instance data.) */ 5173 RGPTRTYPE(struct PDMPCIDEV *) apPciDevs[8]; 5162 5174 5163 5175 /** Internal data. */ … … 5176 5188 5177 5189 /** Current PDMDEVINSR0 version number. */ 5178 #define PDM_DEVINSRC_VERSION PDM_VERSION_MAKE(0xff84, 1, 0)5190 #define PDM_DEVINSRC_VERSION PDM_VERSION_MAKE(0xff84, 2, 0) 5179 5191 5180 5192 -
trunk/include/VBox/vmm/pdmpcidevint.h
r76585 r80722 132 132 /** Pointer to the next PDM device associate with the PDM device. (R3 ptr) */ 133 133 R3PTRTYPE(PPDMPCIDEV) pNextR3; 134 /** Pointer to the internal PDM PCI bus for the device. (R3 ptr) */135 R3PTRTYPE(struct PDMPCIBUS *) pPdmBusR3;136 137 /** Pointer to the PDM device the PCI device belongs to. (R0 ptr) */138 PPDMDEVINSR0 pDevInsR0;139 134 /** Pointer to the next PDM device associate with the PDM device. (R0 ptr) */ 140 135 R0PTRTYPE(PPDMPCIDEV) pNextR0; 141 /** Pointer to the internal PDM PCI bus for the device. (R0 ptr) */142 R0PTRTYPE(struct PDMPCIBUS *) pPdmBusR0;143 144 /** Pointer to the PDM device the PCI device belongs to. (RC ptr) */145 PPDMDEVINSRC pDevInsRC;146 /** Pointer to the next PDM device associate with the PDM device. (RC ptr) */147 RCPTRTYPE(PPDMPCIDEV) pNextRC;148 /** Pointer to the internal PDM PCI bus for the device. (RC ptr) */149 RCPTRTYPE(struct PDMPCIBUS *) pPdmBusRC;150 136 151 137 /** The CFGM device configuration index (default, PciDev1..255). … … 156 142 /** Set if the it can be reassigned to a different PCI function number. */ 157 143 bool fReassignableFunNo; 158 /** Alignment padding . */144 /** Alignment padding - used by ICH9 for region swapping (DevVGA hack). */ 159 145 uint8_t bPadding0; 146 /** Index into the PDM internal bus array (PDM::aPciBuses). */ 147 uint8_t idxPdmBus; 148 /** Index into PDMDEVINSR3::apPciDevs. */ 149 uint8_t idxPciDevs; 150 151 /** Alignment padding. */ 152 uint8_t abPadding1[2+4+4]; 153 RTR0PTR apR0PaddingPdm2[2]; 154 RTR3PTR pR3PaddingPdm3; 160 155 /** @} */ 161 156 … … 166 161 /** Pointer to the PCI bus of the device. (R3 ptr) */ 167 162 R3PTRTYPE(struct DEVPCIBUS *) pBusR3; 168 /** Page used for MSI-X state. 163 /** Page used for MSI-X state. (R3 ptr) */ 169 164 R3PTRTYPE(void *) pMsixPageR3; 170 165 /** Read config callback. */ … … 179 174 R3PTRTYPE(PFNPCIBRIDGECONFIGWRITE) pfnBridgeConfigWrite; 180 175 181 /** Pointer to the PCI bus of the device. (R0 ptr) */ 176 /** Pointer to the PCI bus of the device. (R0 ptr) 177 * @note Only used by ich9pcibridgeSetIrq to find the host (root) bus. */ 182 178 R0PTRTYPE(struct DEVPCIBUS *) pBusR0; 183 /** Page used for MSI-X state. 179 /** Page used for MSI-X state. (R0 ptr) */ 184 180 R0PTRTYPE(void *) pMsixPageR0; 185 181 186 /** Pointer to the PCI bus of the device. (RC ptr) */ 182 /** Pointer to the PCI bus of the device. (RC ptr) 183 * @note Only used by ich9pcibridgeSetIrq to find the host (root) bus. */ 187 184 RCPTRTYPE(struct DEVPCIBUS *) pBusRC; 188 /** Page used for MSI-X state. 185 /** Page used for MSI-X state. (RC ptr) */ 189 186 RCPTRTYPE(void *) pMsixPageRC; 190 187 … … 212 209 #if HC_ARCH_BITS == 32 213 210 /** Add padding to align aIORegions to an 8 byte boundary. */ 214 uint8_t abPadding 1[12];211 uint8_t abPadding2[12]; 215 212 #endif 216 213 -
trunk/src/VBox/VMM/VMMR0/PDMR0Device.cpp
r80706 r80722 284 284 pDevIns, pDevIns->iInstance, pPciDev, pPciDev->uDevFn, iIrq, iLevel)); 285 285 PGVM pGVM = pDevIns->Internal.s.pGVM; 286 PPDMPCIBUS pPciBus = pPciDev->Int.s.pPdmBusR0; 286 size_t const idxBus = pPciDev->Int.s.idxPdmBus; 287 AssertReturnVoid(idxBus < RT_ELEMENTS(pGVM->pdm.s.aPciBuses)); 288 PPDMPCIBUS pPciBus = &pGVM->pdm.s.aPciBuses[idxBus]; 287 289 288 290 pdmLock(pGVM); -
trunk/src/VBox/VMM/VMMR3/PDMDevHlp.cpp
r80704 r80722 1735 1735 { 1736 1736 uPciDevNo = pPrevPciDev->uDevFn >> 3; 1737 uDefPciBusNo = pPrevPciDev->Int.s. pPdmBusR3->iBus;1737 uDefPciBusNo = pPrevPciDev->Int.s.idxPdmBus; 1738 1738 } 1739 1739 else … … 1757 1757 pOtherPciDev = pOtherPciDev->Int.s.pNextR3; 1758 1758 uPciDevNo = pOtherPciDev->uDevFn >> 3; 1759 uDefPciBusNo = pOtherPciDev->Int.s. pPdmBusR3->iBus;1759 uDefPciBusNo = pOtherPciDev->Int.s.idxPdmBus; 1760 1760 } 1761 1761 } … … 1780 1780 RT_ELEMENTS(pVM->pdm.s.aPciBuses), pDevIns->pReg->szName, pDevIns->iInstance), 1781 1781 VERR_PDM_NO_PCI_BUS); 1782 PPDMPCIBUS pBus = pPciDev->Int.s.pPdmBusR3 = &pVM->pdm.s.aPciBuses[u8Bus]; 1782 pPciDev->Int.s.idxPdmBus = u8Bus; 1783 PPDMPCIBUS pBus = &pVM->pdm.s.aPciBuses[u8Bus]; 1783 1784 if (pBus->pDevInsR3) 1784 1785 { … … 1835 1836 pPciDev->Int.s.fReassignableFunNo = uPciFunNo >= VBOX_PCI_MAX_FUNCTIONS; 1836 1837 pPciDev->Int.s.pDevInsR3 = pDevIns; 1837 pPciDev->Int.s.pPdmBusR3 = pBus; 1838 if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0) 1839 { 1840 pPciDev->Int.s.pDevInsR0 = pDevIns->pDevInsR0RemoveMe; 1841 pPciDev->Int.s.pPdmBusR0 = MMHyperR3ToR0(pVM, pBus); 1842 } 1843 else 1844 { 1845 pPciDev->Int.s.pDevInsR0 = NIL_RTR0PTR; 1846 pPciDev->Int.s.pPdmBusR0 = NIL_RTR0PTR; 1847 } 1848 1849 //if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC) 1850 //{ 1851 // pPciDev->Int.s.pDevInsRC = MMHyperR3ToRC(pVM, pDevIns); 1852 // pPciDev->Int.s.pPdmBusRC = MMHyperR3ToRC(pVM, pBus); 1853 //} 1854 //else 1855 { 1856 pPciDev->Int.s.pDevInsRC = NIL_RTRCPTR; 1857 pPciDev->Int.s.pPdmBusRC = NIL_RTRCPTR; 1858 } 1838 pPciDev->Int.s.idxPdmBus = u8Bus; 1859 1839 1860 1840 /* Set some of the public members too. */ … … 1878 1858 pPrevPciDev->Int.s.pNextR3 = pPciDev; 1879 1859 pPrevPciDev->Int.s.pNextR0 = NIL_RTRCPTR; 1880 pPrevPciDev->Int.s.pNextRC = NIL_RTRCPTR;1881 1860 } 1882 1861 else … … 1933 1912 VERR_INVALID_FLAGS); 1934 1913 1935 PPDMPCIBUS pBus = pPciDev->Int.s.pPdmBusR3; Assert(pBus); 1936 PVM pVM = pDevIns->Internal.s.pVMR3; 1914 PVM pVM = pDevIns->Internal.s.pVMR3; 1915 size_t const idxBus = pPciDev->Int.s.idxPdmBus; 1916 AssertReturn(idxBus < RT_ELEMENTS(pVM->pdm.s.aPciBuses), VERR_WRONG_ORDER); 1917 PPDMPCIBUS pBus = &pVM->pdm.s.aPciBuses[idxBus]; 1918 1937 1919 pdmLock(pVM); 1938 1920 int rc; … … 2037 2019 cbRegion = cbRegionAligned * 2; /* round up */ 2038 2020 2039 PPDMPCIBUS pBus = pPciDev->Int.s.pPdmBusR3; 2040 Assert(pBus); 2021 size_t const idxBus = pPciDev->Int.s.idxPdmBus; 2022 AssertReturn(idxBus < RT_ELEMENTS(pVM->pdm.s.aPciBuses), VERR_WRONG_ORDER); 2023 PPDMPCIBUS pBus = &pVM->pdm.s.aPciBuses[idxBus]; 2024 2041 2025 pdmLock(pVM); 2042 2026 int rc = pBus->pfnIORegionRegisterR3(pBus->pDevInsR3, pPciDev, iRegion, cbRegion, enmType, pfnCallback); … … 2070 2054 AssertPtrNull(pPciDev); 2071 2055 2072 PPDMPCIBUS pBus = pPciDev->Int.s.pPdmBusR3; 2073 AssertRelease(pBus); 2056 size_t const idxBus = pPciDev->Int.s.idxPdmBus; 2057 AssertReleaseReturnVoid(idxBus < RT_ELEMENTS(pVM->pdm.s.aPciBuses)); 2058 PPDMPCIBUS pBus = &pVM->pdm.s.aPciBuses[idxBus]; 2074 2059 AssertRelease(VMR3GetState(pVM) != VMSTATE_RUNNING); 2075 2060 … … 2159 2144 * Must have a PCI device registered! 2160 2145 */ 2161 PPDMPCIBUS pBus = pPciDev->Int.s.pPdmBusR3; 2162 Assert(pBus); 2163 PVM pVM = pDevIns->Internal.s.pVMR3; 2146 PVM pVM = pDevIns->Internal.s.pVMR3; 2147 size_t const idxBus = pPciDev->Int.s.idxPdmBus; 2148 AssertReturnVoid(idxBus < RT_ELEMENTS(pVM->pdm.s.aPciBuses)); 2149 PPDMPCIBUS pBus = &pVM->pdm.s.aPciBuses[idxBus]; 2164 2150 2165 2151 pdmLock(pVM); … … 4883 4869 if (pPciDev) 4884 4870 { 4885 PPDMPCIBUS pBus = pPciDev->Int.s.pPdmBusR3; 4886 Assert(pBus); 4871 size_t const idxBus = pPciDev->Int.s.idxPdmBus; 4872 AssertBreak(idxBus < RT_ELEMENTS(pVM->pdm.s.aPciBuses)); 4873 PPDMPCIBUS pBus = &pVM->pdm.s.aPciBuses[idxBus]; 4887 4874 4888 4875 pdmLock(pVM);
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