Changeset 80742 in vbox for trunk/src/VBox/VMM

Timestamp:

Sep 12, 2019 4:43:35 AM (5 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

133294

Message:

VMM/HMVMXR0: Nested VMX: bugref:9180 Comments, spaces.

File:

• trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp (modified) (6 diffs)

trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp

@@ -5316 +5316 @@
         PVMXVMCSINFO pVmcsInfo = pVmxTransient->pVmcsInfo;
 
-        /*
-         * Figure out fixed CR0 bits in VMX operation.
-         */
         uint64_t       fSetCr0 = pVM->hm.s.vmx.Msrs.u64Cr0Fixed0;
         uint64_t const fZapCr0 = pVM->hm.s.vmx.Msrs.u64Cr0Fixed1;
@@ -5415 +5412 @@
             Assert(pVM->hm.s.fNestedPaging || (uXcptBitmap & RT_BIT(X86_XCPT_PF)));
 
-            /* Apply the hardware specified fixed CR0 bits and enable caching. */
+            /* Apply the hardware specified CR0 fixed bits and enable caching. */
             u64GuestCr0 |= fSetCr0;
             u64GuestCr0 &= fZapCr0;
@@ -5455 +5452 @@
             Assert(u64GuestCr0 & X86_CR0_NE);
 
-            /* Apply the hardware specified fixed CR0 bits and enable caching. */
+            /* Apply the hardware specified CR0 fixed bits and enable caching. */
             u64GuestCr0 |= fSetCr0;
             u64GuestCr0 &= fZapCr0;
@@ -5603 +5600 @@
     if (ASMAtomicUoReadU64(&pVCpu->hm.s.fCtxChanged) & HM_CHANGED_GUEST_CR4)
     {
-        PCPUMCTX     pCtx        = &pVCpu->cpum.GstCtx;
-        PVMXVMCSINFO pVmcsInfo   = pVmxTransient->pVmcsInfo;
-
-        /*
-         * Figure out fixed CR4 bits in VMX operation.
-         */
+        PCPUMCTX     pCtx      = &pVCpu->cpum.GstCtx;
+        PVMXVMCSINFO pVmcsInfo = pVmxTransient->pVmcsInfo;
+
         uint64_t const fSetCr4 = pVM->hm.s.vmx.Msrs.u64Cr4Fixed0;
         uint64_t const fZapCr4 = pVM->hm.s.vmx.Msrs.u64Cr4Fixed1;
@@ -5694 +5688 @@
         }
 
-        /* Apply the hardware specified fixed CR4 bits (mainly CR4.VMXE). */
+        /* Apply the hardware specified CR4 fixed bits (mainly CR4.VMXE). */
         u64GuestCr4 |= fSetCr4;
         u64GuestCr4 &= fZapCr4;
@@ -9247 +9241 @@
         uint64_t       fSetCr0 = (pVM->hm.s.vmx.Msrs.u64Cr0Fixed0 & pVM->hm.s.vmx.Msrs.u64Cr0Fixed1);
         uint64_t const fZapCr0 = (pVM->hm.s.vmx.Msrs.u64Cr0Fixed0 | pVM->hm.s.vmx.Msrs.u64Cr0Fixed1);
-        /* Exceptions for unrestricted guest execution for fixed CR0 bits (PE, PG).
+        /* Exceptions for unrestricted guest execution for CR0 fixed bits (PE, PG).
            See Intel spec. 26.3.1 "Checks on Guest Control Registers, Debug Registers and MSRs." */
         if (fUnrestrictedGuest)