Changeset 80839 in vbox

Timestamp:

Sep 17, 2019 4:52:54 AM (5 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

133409

Message:

VMM/IEM: Nested VMX: bugref:9180 Define macros CR0 ignore mask on VM-entry and VM-exit and use it.

Location:

trunk

Files:

• include/VBox/vmm/hm_vmx.h (modified) (1 diff)
• src/VBox/VMM/VMMAll/IEMAllCImplVmxInstr.cpp.h (modified) (3 diffs)

trunk/include/VBox/vmm/hm_vmx.h

@@ -2054 +2054 @@
 /** @name VM-entry register masks.
  * @{ */
-/** CR0 bits ignored on VM-entry (ET, NW, CD and reserved bits bits 6:15, bit 17,
- *  bits 19:28). */
-#define VMX_ENTRY_CR0_IGNORE_MASK                               UINT64_C(0x7ffaffd0)
-/** DR7 bits set here are always cleared on VM-entry (bit 12, bits 14:15). */
-#define VMX_ENTRY_DR7_MBZ_MASK                                  UINT64_C(0xd000)
-/** DR7 bits set here are always set on VM-entry (bit 10). */
-#define VMX_ENTRY_DR7_MB1_MASK                                  UINT64_C(0x400)
+/** CR0 bits ignored on VM-entry while loading guest CR0 (ET, CD, NW, bits 6:15,
+ *  bit 17 and bits 19:28). */
+#define VMX_ENTRY_GUEST_CR0_IGNORE_MASK                         UINT64_C(0x7ffaffd0)
+/** DR7 bits set here are always cleared on VM-entry while loading guest DR7 (bit
+ *  12, bits 14:15). */
+#define VMX_ENTRY_GUEST_DR7_MBZ_MASK                            UINT64_C(0xd000)
+/** DR7 bits set here are always set on VM-entry while loading guest DR7 (bit
+ *  10). */
+#define VMX_ENTRY_GUEST_DR7_MB1_MASK                            UINT64_C(0x400)
+/** @} */
+
+
+/** @name VM-exit register masks.
+ * @{ */
+/** CR0 bits ignored on VM-exit while loading host CR0 (ET, CD, NW, bits 6:15,
+ *  bit 17, bits 19:28 and bits 32:63). */
+#define VMX_EXIT_HOST_CR0_IGNORE_MASK                           UINT64_C(0xffffffff7ffaffd0)
 /** @} */
 

trunk/src/VBox/VMM/VMMAll/IEMAllCImplVmxInstr.cpp.h

@@ -1710 +1710 @@
         uint64_t const uCr0Mb1       = pVCpu->cpum.GstCtx.hwvirt.vmx.Msrs.u64Cr0Fixed0;
         uint64_t const uCr0Mb0       = pVCpu->cpum.GstCtx.hwvirt.vmx.Msrs.u64Cr0Fixed1;
-        uint64_t const fCr0IgnMask   = UINT64_C(0xffffffff1ffaffc0) | X86_CR0_ET | X86_CR0_CD | X86_CR0_NW | uCr0Mb1 | ~uCr0Mb0;
+        uint64_t const fCr0IgnMask   = VMX_EXIT_HOST_CR0_IGNORE_MASK | uCr0Mb1 | ~uCr0Mb0;
         uint64_t const uHostCr0      = pVmcs->u64HostCr0.u;
         uint64_t const uGuestCr0     = pVCpu->cpum.GstCtx.cr0;
@@ -6532 +6532 @@
 
     IEM_CTX_ASSERT(pVCpu, CPUMCTX_EXTRN_CR0);
-    uint64_t const uGstCr0 = (pVmcs->u64GuestCr0.u   & ~VMX_ENTRY_CR0_IGNORE_MASK)
-                           | (pVCpu->cpum.GstCtx.cr0 &  VMX_ENTRY_CR0_IGNORE_MASK);
+    uint64_t const uGstCr0 = (pVmcs->u64GuestCr0.u   & ~VMX_ENTRY_GUEST_CR0_IGNORE_MASK)
+                           | (pVCpu->cpum.GstCtx.cr0 &  VMX_ENTRY_GUEST_CR0_IGNORE_MASK);
     CPUMSetGuestCR0(pVCpu, uGstCr0);
     CPUMSetGuestCR4(pVCpu, pVmcs->u64GuestCr4.u);
@@ -6539 +6539 @@
 
     if (pVmcs->u32EntryCtls & VMX_ENTRY_CTLS_LOAD_DEBUG)
-        pVCpu->cpum.GstCtx.dr[7] = (pVmcs->u64GuestDr7.u & ~VMX_ENTRY_DR7_MBZ_MASK) | VMX_ENTRY_DR7_MB1_MASK;
+        pVCpu->cpum.GstCtx.dr[7] = (pVmcs->u64GuestDr7.u & ~VMX_ENTRY_GUEST_DR7_MBZ_MASK) | VMX_ENTRY_GUEST_DR7_MB1_MASK;
 
     pVCpu->cpum.GstCtx.SysEnter.eip = pVmcs->u64GuestSysenterEip.s.Lo;