Changeset 8086 in vbox for trunk/src/VBox/VMM/VMMAll
- Timestamp:
- Apr 17, 2008 9:55:26 AM (17 years ago)
- File:
-
- 1 edited
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- Unmodified
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trunk/src/VBox/VMM/VMMAll/PGMAllGst.h
r8079 r8086 519 519 int rc = VINF_SUCCESS; 520 520 521 #if PGM_GST_TYPE == PGM_TYPE_32BIT \522 || PGM_GST_TYPE == PGM_TYPE_PAE \523 || PGM_GST_TYPE == PGM_TYPE_AMD64524 525 521 /* 526 522 * Register/Modify write phys handler for guest's CR3 if it changed. 527 523 */ 524 #if PGM_GST_TYPE == PGM_TYPE_32BIT 525 528 526 if (pVM->pgm.s.GCPhysGstCR3Monitored != GCPhysCR3) 529 527 { … … 555 553 } 556 554 557 # if PGM_GST_TYPE == PGM_TYPE_PAE555 #elif PGM_GST_TYPE == PGM_TYPE_PAE 558 556 /* Monitor the PDPT page */ 557 /* 558 * Register/Modify write phys handler for guest's CR3 if it changed. 559 */ 559 560 # ifndef PGMPOOL_WITH_MIXED_PT_CR3 560 561 AssertFailed(); 561 # else562 rc = pgmPoolMonitorMonitorCR3(pVM->pgm.s.CTXSUFF(pPool), PGMPOOL_IDX_PDPT, GCPhysCR3);563 562 # endif 563 if (pVM->pgm.s.GCPhysGstCR3Monitored != GCPhysCR3) 564 { 565 rc = pgmPoolMonitorMonitorCR3(pVM->pgm.s.CTXSUFF(pPool), PGMPOOL_IDX_PDPT, GCPhysCR3); 566 if (VBOX_FAILURE(rc)) 567 { 568 AssertMsgFailed(("PGMHandlerPhysicalModify/PGMR3HandlerPhysicalRegister failed, rc=%Rrc GCPhysGstCR3Monitored=%RGp GCPhysCR3=%RGp\n", 569 rc, pVM->pgm.s.GCPhysGstCR3Monitored, GCPhysCR3)); 570 return rc; 571 } 572 pVM->pgm.s.GCPhysGstCR3Monitored = GCPhysCR3; 573 } 564 574 /* 565 575 * Do the 4 PDs. … … 570 580 { 571 581 RTGCPHYS GCPhys = CTXSUFF(pVM->pgm.s.pGstPaePDPT)->a[i].u & X86_PDPE_PG_MASK; 572 # ifndef PGMPOOL_WITH_MIXED_PT_CR3573 582 if (pVM->pgm.s.aGCPhysGstPaePDsMonitored[i] != GCPhys) 574 583 { 575 if (pVM->pgm.s.aGCPhysGstPaePDsMonitored[i] != NIL_RTGCPHYS) 576 rc = PGMHandlerPhysicalModify(pVM, pVM->pgm.s.aGCPhysGstPaePDsMonitored[i], GCPhys, GCPhys + PAGE_SIZE - 1); 577 else 578 rc = PGMHandlerPhysicalRegisterEx(pVM, PGMPHYSHANDLERTYPE_PHYSICAL_WRITE, GCPhys, GCPhys + PAGE_SIZE - 1, 579 pVM->pgm.s.pfnR3GstPAEWriteHandlerCR3, 0, 580 pVM->pgm.s.pfnR0GstPAEWriteHandlerCR3, 0, 581 pVM->pgm.s.pfnGCGstPAEWriteHandlerCR3, 0, 582 pVM->pgm.s.pszR3GstPAEWriteHandlerCR3); 583 if (VBOX_SUCCESS(rc)) 584 pVM->pgm.s.aGCPhysGstPaePDsMonitored[i] = GCPhys; 584 Assert(pVM->pgm.s.enmShadowMode == PGMMODE_PAE || pVM->pgm.s.enmShadowMode == PGMMODE_PAE_NX); 585 586 rc = pgmPoolMonitorMonitorCR3(pVM->pgm.s.CTXSUFF(pPool), PGMPOOL_IDX_PAE_PD_0 + i, GCPhys); 585 587 } 586 # else /* PGMPOOL_WITH_MIXED_PT_CR3 */ 587 Assert( pVM->pgm.s.enmShadowMode == PGMMODE_PAE 588 || pVM->pgm.s.enmShadowMode == PGMMODE_PAE_NX); 589 590 rc = pgmPoolMonitorMonitorCR3(pVM->pgm.s.CTXSUFF(pPool), PGMPOOL_IDX_PAE_PD_0 + i, GCPhys); 591 # endif /* PGMPOOL_WITH_MIXED_PT_CR3 */ 588 592 589 if (VBOX_FAILURE(rc)) 593 590 { … … 600 597 else if (pVM->pgm.s.aGCPhysGstPaePDsMonitored[i] != NIL_RTGCPHYS) 601 598 { 602 rc = PGMHandlerPhysicalDeregister(pVM, pVM->pgm.s.aGCPhysGstPaePDsMonitored[i]);599 rc = pgmPoolMonitorUnmonitorCR3(pVM->pgm.s.CTXSUFF(pPool), PGMPOOL_IDX_PAE_PD_0 + i); 603 600 AssertRC(rc); 604 601 pVM->pgm.s.aGCPhysGstPaePDsMonitored[i] = NIL_RTGCPHYS; 605 602 } 606 603 } 607 #endif /* PGM_GST_TYPE == PGM_TYPE_PAE */ 608 604 605 #elif PGM_GST_TYPE == PGM_TYPE_AMD64 606 AssertFailed(); 609 607 #else 610 608 /* prot/real mode stub */ … … 623 621 { 624 622 int rc = VINF_SUCCESS; 625 626 #if PGM_GST_TYPE == PGM_TYPE_32BIT \627 || PGM_GST_TYPE == PGM_TYPE_PAE \628 || PGM_GST_TYPE == PGM_TYPE_AMD64629 623 630 624 /* … … 634 628 * before we enter GC again. 635 629 */ 630 #if PGM_GST_TYPE == PGM_TYPE_32BIT 636 631 if (pVM->pgm.s.GCPhysGstCR3Monitored != NIL_RTGCPHYS) 637 632 { … … 650 645 } 651 646 652 # 647 #elif PGM_GST_TYPE == PGM_TYPE_PAE 653 648 /* The PDPT page */ 654 649 # ifndef PGMPOOL_WITH_MIXED_PT_CR3 655 650 AssertFailed(); 656 # else657 rc = pgmPoolMonitorUnmonitorCR3(pVM->pgm.s.CTXSUFF(pPool), PGMPOOL_IDX_PDPT);658 AssertRC(rc);659 651 # endif 652 653 if (pVM->pgm.s.GCPhysGstCR3Monitored != NIL_RTGCPHYS) 654 { 655 rc = pgmPoolMonitorUnmonitorCR3(pVM->pgm.s.CTXSUFF(pPool), PGMPOOL_IDX_PDPT); 656 AssertRC(rc); 657 } 660 658 661 659 /* The 4 PDs. */ 662 660 for (unsigned i = 0; i < X86_PG_PAE_PDPE_ENTRIES; i++) 661 { 663 662 if (pVM->pgm.s.aGCPhysGstPaePDsMonitored[i] != NIL_RTGCPHYS) 664 663 { 665 # ifndef PGMPOOL_WITH_MIXED_PT_CR3666 int rc2 = PGMHandlerPhysicalDeregister(pVM, pVM->pgm.s.aGCPhysGstPaePDsMonitored[i]);667 # else /* PGMPOOL_WITH_MIXED_PT_CR3 */668 664 Assert(pVM->pgm.s.enmShadowMode == PGMMODE_PAE || pVM->pgm.s.enmShadowMode == PGMMODE_PAE_NX); 669 665 int rc2 = pgmPoolMonitorUnmonitorCR3(pVM->pgm.s.CTXSUFF(pPool), PGMPOOL_IDX_PAE_PD_0 + i); 670 # endif /* PGMPOOL_WITH_MIXED_PT_CR3 */671 666 AssertRC(rc2); 672 667 if (VBOX_FAILURE(rc2)) … … 674 669 pVM->pgm.s.aGCPhysGstPaePDsMonitored[i] = NIL_RTGCPHYS; 675 670 } 676 # endif 677 671 } 672 #elif PGM_GST_TYPE == PGM_TYPE_AMD64 673 AssertFailed(); 678 674 #else 679 675 /* prot/real mode stub */
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