Changeset 80923 in vbox

Timestamp:

Sep 20, 2019 12:01:11 PM (5 years ago)

Author:

vboxsync

Message:

Dev/Net: @bugref:9556 Lower interrupts on reset

Location:

trunk/src/VBox/Devices

Files:

• Network/DevE1000.cpp (modified) (1 diff)
• Network/DevPCNet.cpp (modified) (1 diff)
• VirtIO/Virtio.cpp (modified) (2 diffs)

trunk/src/VBox/Devices/Network/DevE1000.cpp

@@ -1638 +1638 @@
 {
     E1kLog(("%s Hard reset triggered\n", pThis->szPrf));
+    /* No interrupts should survive device reset, see @bugref(9556). */
+    if (pThis->fIntRaised)
+    {
+        /* Lower(0) INTA(0) */
+        PDMDevHlpPCISetIrq(pThis->CTX_SUFF(pDevIns), 0, 0);
+        pThis->fIntRaised = false;
+        E1kLog(("%s e1kHardReset: Lowered IRQ: ICR=%08x\n", pThis->szPrf, ICR));
+    }
     memset(pThis->auRegs,        0, sizeof(pThis->auRegs));
     memset(pThis->aRecAddr.au32, 0, sizeof(pThis->aRecAddr.au32));

trunk/src/VBox/Devices/Network/DevPCNet.cpp

@@ -3425 +3425 @@
     uint16_t checksum;
 
+    /* Lower any raised interrupts, see @bugref(9556) */
+    if (RT_UNLIKELY(pThis->iISR))
+    {
+        pThis->iISR = 0;
+        if (!PCNET_IS_ISA(pThis))
+        {
+            Log(("#%d INTA=%d\n", PCNET_INST_NR, pThis->iISR));
+            PDMDevHlpPCISetIrq(PCNETSTATE_2_DEVINS(pThis), 0, pThis->iISR);
+        }
+        else
+        {
+            Log(("#%d IRQ=%d, state=%d\n", PCNET_INST_NR, pThis->uIsaIrq, pThis->iISR));
+            PDMDevHlpISASetIrq(PCNETSTATE_2_DEVINS(pThis), pThis->uIsaIrq, pThis->iISR);
+        }
+    }
     /* Initialize the PROM */
     Assert(sizeof(pThis->MacConfigured) == 6);

trunk/src/VBox/Devices/VirtIO/Virtio.cpp

@@ -309 +309 @@
 }
 
+
+/**
+ * Raise interrupt.
+ *
+ * @param   pState      The device state structure.
+ * @param   rcBusy      Status code to return when the critical section is busy.
+ * @param   u8IntCause  Interrupt cause bit mask to set in PCI ISR port.
+ */
+int vpciRaiseInterrupt(VPCISTATE *pState, int rcBusy, uint8_t u8IntCause)
+{
+    RT_NOREF_PV(rcBusy);
+    // int rc = vpciCsEnter(pState, rcBusy);
+    // if (RT_UNLIKELY(rc != VINF_SUCCESS))
+    //     return rc;
+
+    STAM_COUNTER_INC(&pState->StatIntsRaised);
+    LogFlow(("%s vpciRaiseInterrupt: u8IntCause=%x\n",
+             INSTANCE(pState), u8IntCause));
+
+    pState->uISR |= u8IntCause;
+    PDMDevHlpPCISetIrq(pState->CTX_SUFF(pDevIns), 0, 1);
+    // vpciCsLeave(pState);
+    return VINF_SUCCESS;
+}
+
+/**
+ * Lower interrupt.
+ *
+ * @param   pState      The device state structure.
+ */
+static void vpciLowerInterrupt(VPCISTATE *pState)
+{
+    LogFlow(("%s vpciLowerInterrupt\n", INSTANCE(pState)));
+    PDMDevHlpPCISetIrq(pState->CTX_SUFF(pDevIns), 0, 0);
+}
+
+
 void vpciReset(PVPCISTATE pState)
 {
+    /* No interrupts should survive device reset, see @bugref(9556). */
+    if (pState->uISR)
+        vpciLowerInterrupt(pState);
+
     pState->uGuestFeatures = 0;
     pState->uQueueSelector = 0;
@@ -320 +361 @@
 }
 
-
-/**
- * Raise interrupt.
- *
- * @param   pState      The device state structure.
- * @param   rcBusy      Status code to return when the critical section is busy.
- * @param   u8IntCause  Interrupt cause bit mask to set in PCI ISR port.
- */
-int vpciRaiseInterrupt(VPCISTATE *pState, int rcBusy, uint8_t u8IntCause)
-{
-    RT_NOREF_PV(rcBusy);
-    // int rc = vpciCsEnter(pState, rcBusy);
-    // if (RT_UNLIKELY(rc != VINF_SUCCESS))
-    //     return rc;
-
-    STAM_COUNTER_INC(&pState->StatIntsRaised);
-    LogFlow(("%s vpciRaiseInterrupt: u8IntCause=%x\n",
-             INSTANCE(pState), u8IntCause));
-
-    pState->uISR |= u8IntCause;
-    PDMDevHlpPCISetIrq(pState->CTX_SUFF(pDevIns), 0, 1);
-    // vpciCsLeave(pState);
-    return VINF_SUCCESS;
-}
-
-/**
- * Lower interrupt.
- *
- * @param   pState      The device state structure.
- */
-static void vpciLowerInterrupt(VPCISTATE *pState)
-{
-    LogFlow(("%s vpciLowerInterrupt\n", INSTANCE(pState)));
-    PDMDevHlpPCISetIrq(pState->CTX_SUFF(pDevIns), 0, 0);
-}
 
 DECLINLINE(uint32_t) vpciGetHostFeatures(PVPCISTATE pState,