Changeset 80943 in vbox for trunk/src/VBox/Devices/VirtIO
- Timestamp:
- Sep 23, 2019 9:36:14 AM (5 years ago)
- svn:sync-xref-src-repo-rev:
- 133523
- Location:
- trunk/src/VBox/Devices/VirtIO
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/Devices/VirtIO/Virtio_1_0.cpp
r80931 r80943 545 545 * 546 546 * @param pVirtio Virtio instance state 547 * @param fWrite If write access (otherwise read access)547 * @param fWrite Set if write access, clear if read access. 548 548 * @param pv Pointer to location to write to or read from 549 549 * @param cb Number of bytes to read or write 550 550 */ 551 static int virtioCommonCfgAccessed(PVIRTIOSTATE pVirtio, intfWrite, off_t uOffset, unsigned cb, void const *pv)551 static int virtioCommonCfgAccessed(PVIRTIOSTATE pVirtio, bool fWrite, off_t uOffset, unsigned cb, void const *pv) 552 552 { 553 553 int rc = VINF_SUCCESS; … … 765 765 { 766 766 uint32_t uOffset = GCPhysAddr - pVirtio->pGcPhysCommonCfg; 767 virtioCommonCfgAccessed(pVirtio, 0/* fWrite */, uOffset, cb, (void const *)pv);767 virtioCommonCfgAccessed(pVirtio, false /* fWrite */, uOffset, cb, (void const *)pv); 768 768 } 769 769 else … … 816 816 { 817 817 uint32_t uOffset = GCPhysAddr - pVirtio->pGcPhysCommonCfg; 818 virtioCommonCfgAccessed(pVirtio, 1/* fWrite */, uOffset, cb, pv);818 virtioCommonCfgAccessed(pVirtio, true /* fWrite */, uOffset, cb, pv); 819 819 } 820 820 else … … 884 884 885 885 /** 886 * Callback function for reading from the PCI configuration space. 887 * 888 * @returns The register value. 889 * @param pDevIns Pointer to the device instance the PCI device 890 * belongs to. 891 * @param pPciDev Pointer to PCI device. Use pPciDev->pDevIns to get the device instance. 892 * @param uAddress The configuration space register address. [0..4096] 893 * @param cb The register size. [1,2,4] 894 * 895 * @remarks Called with the PDM lock held. The device lock is NOT take because 896 * that is very likely be a lock order violation. 897 */ 898 static DECLCALLBACK(uint32_t) virtioPciConfigRead(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, 899 uint32_t uAddress, unsigned cb) 886 * @callback_method_impl{FNPCICONFIGRead} 887 */ 888 static DECLCALLBACK(VBOXSTRICTRC) virtioR3PciConfigRead(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, 889 uint32_t uAddress, unsigned cb, uint32_t *pu32Value) 900 890 { 901 891 PVIRTIOSTATE pVirtio = *PDMINS_2_DATA(pDevIns, PVIRTIOSTATE *); 902 892 RT_NOREF(pPciDev); 893 894 /** @todo r=bird: this comparison just cannot be correct. */ 903 895 if (uAddress == (uint64_t)&pVirtio->pPciCfgCap->uPciCfgData) 904 896 { … … 909 901 uint32_t uOffset = pVirtio->pPciCfgCap->pciCap.uOffset; 910 902 uint8_t uBar = pVirtio->pPciCfgCap->pciCap.uBar; 911 uint32_t pv= 0;903 *pu32Value = 0; 912 904 if (uBar == VIRTIO_REGION_PCI_CAP) 913 (void)virtioR3MmioRead(pDevIns, NULL, (RTGCPHYS)((uint32_t)pVirtio->pGcPhysPciCapBase + uOffset), 914 &pv, uLength); 905 { 906 virtioR3MmioRead(pDevIns, NULL, (RTGCPHYS)((uint32_t)pVirtio->pGcPhysPciCapBase + uOffset), pu32Value, uLength); 907 Log2Func(("virtio: Guest read virtio_pci_cfg_cap.pci_cfg_data, bar=%d, offset=%d, length=%d, result=%d\n", 908 uBar, uOffset, uLength, *pu32Value)); 909 } 915 910 else 916 {917 911 Log2Func(("Guest read virtio_pci_cfg_cap.pci_cfg_data using unconfigured BAR. Ignoring")); 918 return 0; 919 } 920 Log2Func(("virtio: Guest read virtio_pci_cfg_cap.pci_cfg_data, bar=%d, offset=%d, length=%d, result=%d\n", 921 uBar, uOffset, uLength, pv)); 922 return pv; 923 } 924 return pVirtio->pfnPciConfigReadOld(pDevIns, pPciDev, uAddress, cb); 925 } 926 927 /** 928 * Callback function for writing to the PCI configuration space. 929 * 930 * @returns VINF_SUCCESS or PDMDevHlpDBGFStop status. 931 * 932 * @param pDevIns Pointer to the device instance the PCI device 933 * belongs to. 934 * @param pPciDev Pointer to PCI device. Use pPciDev->pDevIns to get the device instance. 935 * @param uAddress The configuration space register address. [0..4096] 936 * @param u32Value The value that's being written. The number of bits actually used from 937 * this value is determined by the cb parameter. 938 * @param cb The register size. [1,2,4] 939 * 940 * @remarks Called with the PDM lock held. The device lock is NOT take because 941 * that is very likely be a lock order violation. 942 */ 943 static DECLCALLBACK(VBOXSTRICTRC) virtioPciConfigWrite(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, 944 uint32_t uAddress, uint32_t u32Value, unsigned cb) 912 return VINF_SUCCESS; 913 } 914 return VINF_PDM_PCI_DO_DEFAULT; 915 } 916 917 /** 918 * @callback_method_impl{FNPCICONFIGWRITE} 919 */ 920 static DECLCALLBACK(VBOXSTRICTRC) virtioR3PciConfigWrite(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, 921 uint32_t uAddress, unsigned cb, uint32_t u32Value) 945 922 { 946 923 PVIRTIOSTATE pVirtio = *PDMINS_2_DATA(pDevIns, PVIRTIOSTATE *); 924 RT_NOREF(pPciDev); 947 925 948 926 if (uAddress == pVirtio->uPciCfgDataOff) … … 955 933 uint8_t uBar = pVirtio->pPciCfgCap->pciCap.uBar; 956 934 if (uBar == VIRTIO_REGION_PCI_CAP) 957 (void)virtioR3MmioWrite(pDevIns, NULL, (RTGCPHYS)((uint32_t)pVirtio->pGcPhysPciCapBase + uOffset), 958 (void *)&u32Value, uLength); 935 { 936 Assert(uLength <= sizeof(u32Value)); 937 virtioR3MmioWrite(pDevIns, NULL, (RTGCPHYS)((uint32_t)pVirtio->pGcPhysPciCapBase + uOffset), &u32Value, uLength); 938 } 959 939 else 960 940 { … … 966 946 return VINF_SUCCESS; 967 947 } 968 return pVirtio->pfnPciConfigWriteOld(pDevIns, pPciDev, uAddress, u32Value, cb);948 return VINF_PDM_PCI_DO_DEFAULT; 969 949 } 970 950 … … 1097 1077 { 1098 1078 RTMemFree(pVirtio); 1099 return PDMDEV_SET_ERROR(pDevIns, rc, 1100 N_("virtio: cannot register PCI Device")); /* can we put params in this error? */ 1079 return PDMDEV_SET_ERROR(pDevIns, rc, N_("virtio: cannot register PCI Device")); /* can we put params in this error? */ 1101 1080 } 1102 1081 … … 1107 1086 { 1108 1087 RTMemFree(pVirtio); 1109 return PDMDEV_SET_ERROR(pDevIns, rc, 1110 N_("virtio: cannot register SSM callbacks")); 1111 } 1112 1113 PDMDevHlpPCISetConfigCallbacks(pDevIns, &pVirtio->dev, 1114 virtioPciConfigRead, &pVirtio->pfnPciConfigReadOld, 1115 virtioPciConfigWrite, &pVirtio->pfnPciConfigWriteOld); 1088 return PDMDEV_SET_ERROR(pDevIns, rc, N_("virtio: cannot register SSM callbacks")); 1089 } 1090 1091 rc = PDMDevHlpPCIInterceptConfigAccesses(pDevIns, &pVirtio->dev, virtioR3PciConfigRead, virtioR3PciConfigWrite); 1092 AssertRCReturnStmt(rc, RTMemFree(pVirtio), rc); 1116 1093 1117 1094 … … 1272 1249 " pfnSSMDevLiveExec = %p\n pfnSSMDevSaveExec = %p\n" 1273 1250 " pfnSSMDevLoadExec = %p\n pfnSSMDevLoadDone = %p\n" 1274 " pfnPciConfigReadOld = %p\n pfnPciConfigWriteOld = %p\n",1275 1251 pcszCaller ? pcszCaller : "<unspecified>", 1276 1252 pVirtio->uDeviceFeatures, pVirtio->uDriverFeatures, pVirtio->uDeviceFeaturesSelect, … … 1283 1259 pVirtio->virtioCallbacks.pfnVirtioDevCapWrite, pVirtio->virtioCallbacks.pfnSSMDevLiveExec, 1284 1260 pVirtio->virtioCallbacks.pfnSSMDevSaveExec, pVirtio->virtioCallbacks.pfnSSMDevLoadExec, 1285 pVirtio->virtioCallbacks.pfnSSMDevLoadDone, pVirtio->pfnPciConfigReadOld, 1286 pVirtio->pfnPciConfigWriteOld 1261 pVirtio->virtioCallbacks.pfnSSMDevLoadDone 1287 1262 )); 1288 1263 … … 1339 1314 rc = SSMR3PutU64(pSSM, (uint64_t)pVirtio->virtioCallbacks.pfnSSMDevLoadExec); 1340 1315 rc = SSMR3PutU64(pSSM, (uint64_t)pVirtio->virtioCallbacks.pfnSSMDevLoadDone); 1341 rc = SSMR3PutU64(pSSM, (uint64_t)pVirtio->pfnPciConfigReadOld);1342 rc = SSMR3PutU64(pSSM, (uint64_t)pVirtio->pfnPciConfigWriteOld);1343 1316 rc = SSMR3PutGCPhys(pSSM, pVirtio->pGcPhysCommonCfg); 1344 1317 rc = SSMR3PutGCPhys(pSSM, pVirtio->pGcPhysNotifyCap); … … 1401 1374 rc = SSMR3GetU64(pSSM, (uint64_t *)&pVirtio->virtioCallbacks.pfnSSMDevLoadExec); 1402 1375 rc = SSMR3GetU64(pSSM, (uint64_t *)&pVirtio->virtioCallbacks.pfnSSMDevLoadDone); 1403 rc = SSMR3GetU64(pSSM, (uint64_t *)&pVirtio->pfnPciConfigReadOld);1404 rc = SSMR3GetU64(pSSM, (uint64_t *)&pVirtio->pfnPciConfigWriteOld);1405 1376 rc = SSMR3GetGCPhys(pSSM, &pVirtio->pGcPhysCommonCfg); 1406 1377 rc = SSMR3GetGCPhys(pSSM, &pVirtio->pGcPhysNotifyCap); -
trunk/src/VBox/Devices/VirtIO/Virtio_1_0_impl.h
r80931 r80943 177 177 VIRTQSTATE virtqState[VIRTQ_MAX_CNT]; /**< Local impl-specific queue context */ 178 178 VIRTIOCALLBACKS virtioCallbacks; /**< Callback vectors to client */ 179 180 PFNPCICONFIGREAD pfnPciConfigReadOld; /**< Prev rd. cb. intercepting PCI Cfg I/O */181 PFNPCICONFIGWRITE pfnPciConfigWriteOld; /**< Prev wr. cb. intercepting PCI Cfg I/O */182 179 183 180 PVIRTIO_PCI_CFG_CAP_T pPciCfgCap; /**< Pointer to struct in configuration area */
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